https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78176
--- Comment #29 from mpf at gcc dot gnu.org ---
I don't remember the detail of this issue but I believe I was convinced that it
is down to the lack of setting PX appropriately in HW. UX==0, PX==1. The PX
control bit forces address calcula
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86069
mpf at gcc dot gnu.org changed:
What|Removed |Added
Target||mips-*
Status
: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: mpf at gcc dot gnu.org
Target Milestone: ---
Created attachment 44241
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=44241&action=edit
test case
MIPS det
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83327
mpf at gcc dot gnu.org changed:
What|Removed |Added
CC||mpf at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
mpf at gcc dot gnu.org changed:
What|Removed |Added
CC||mpf at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71657
mpf at gcc dot gnu.org changed:
What|Removed |Added
CC||mpf at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81803
--- Comment #16 from mpf at gcc dot gnu.org ---
(In reply to Eric Botcazou from comment #15)
> > I don't think the restriction is required for functional correctness but I
> > thought we may as well take advantage of a narrower
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81803
mpf at gcc dot gnu.org changed:
What|Removed |Added
Attachment #42075|0 |1
is obsolete
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81803
--- Comment #9 from mpf at gcc dot gnu.org ---
Created attachment 42075
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=42075&action=edit
Proposed fix
Off-thread James pointed out that one of my patches I did last year appeared to
f
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81803
--- Comment #7 from mpf at gcc dot gnu.org ---
(In reply to Eric Botcazou from comment #6)
> > I have just noticed this which seems curious. Is the 39 -> 40 combine really
> > a valid transformation? It seems we've lost th
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912
--- Comment #20 from mpf at gcc dot gnu.org ---
Palmer: There is a commit listed for this bug, did that fix the issue and can
the bug be marked fixed?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80057
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|WAITING |RESOLVED
Resolution
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80057
--- Comment #4 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Mon Apr 10 13:44:39 2017
New Revision: 246807
URL: https://gcc.gnu.org/viewcvs?rev=246807&root=gcc&view=rev
Log:
Update MIPS -mvirt option description
gcc/
PR targ
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79915
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
Last reconfirmed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80086
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80057
mpf at gcc dot gnu.org changed:
What|Removed |Added
CC||mpf at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912
--- Comment #16 from mpf at gcc dot gnu.org ---
(In reply to Palmer Dabbelt from comment #15)
> Created attachment 40968 [details]
> glibc file that loops
>
> The suggested patch causes an infinate loop while building glibc for R
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912
mpf at gcc dot gnu.org changed:
What|Removed |Added
Assignee|mpf at gcc dot gnu.org |palmer at dabbelt dot
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912
--- Comment #10 from mpf at gcc dot gnu.org ---
(In reply to Kito Cheng from comment #8)
> [1]
> diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
> index 89567f7..148967b 100644
> --- a/gcc/config/riscv/riscv.c
> +
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912
--- Comment #7 from mpf at gcc dot gnu.org ---
The same fix will resolve soft-float as well I think. In the soft-float case I
believe it is reasonably logical that preferred_reload_class is wrong as there
are no registers in FPR_REGS available at
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912
--- Comment #5 from mpf at gcc dot gnu.org ---
I think there are some relatively serious issues in the riscv backend here.
What I understand so far:
1) Only floating point modes are allowed in FPRs
2) There is an alternative in the
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=9
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|NEW |RESOLVED
CC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79473
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
CC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79914
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Known to work
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78012
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Known to work
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78176
mpf at gcc dot gnu.org changed:
What|Removed |Added
Known to work||7.0
Target Milestone
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
Last reconfirmed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79914
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
Last reconfirmed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79473
--- Comment #1 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Fri Feb 24 22:35:59 2017
New Revision: 245725
URL: https://gcc.gnu.org/viewcvs?rev=245725&root=gcc&view=rev
Log:
Add documentation for -mload-store-pairs
gcc/
P
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79150
mpf at gcc dot gnu.org changed:
What|Removed |Added
Priority|P2 |P3
Known to fail
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79150
mpf at gcc dot gnu.org changed:
What|Removed |Added
Target|mips-mti-* |mips*
Priority|P3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
--- Comment #20 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Wed Feb 22 17:20:14 2017
New Revision: 245655
URL: https://gcc.gnu.org/viewcvs?rev=245655&root=gcc&view=rev
Log:
Support WORD_REGISTER_OPERATIONS require
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79660
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
--- Comment #19 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Tue Feb 21 13:29:07 2017
New Revision: 245626
URL: https://gcc.gnu.org/viewcvs?rev=245626&root=gcc&view=rev
Log:
Revert r245598
gcc/
PR target/78660
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79660
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|NEW |ASSIGNED
CC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78012
--- Comment #6 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Mon Feb 20 12:07:23 2017
New Revision: 245601
URL: https://gcc.gnu.org/viewcvs?rev=245601&root=gcc&view=rev
Log:
Ensure the mode used to create split registers is supppor
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
--- Comment #17 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Mon Feb 20 12:06:56 2017
New Revision: 245598
URL: https://gcc.gnu.org/viewcvs?rev=245598&root=gcc&view=rev
Log:
Handle WORD_REGISTER_OPERATIONS when reloading (subreg (re
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
--- Comment #18 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Mon Feb 20 12:07:06 2017
New Revision: 245599
URL: https://gcc.gnu.org/viewcvs?rev=245599&root=gcc&view=rev
Log:
Tighten condition for converting SUBREG reloads from O
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78012
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|NEW |ASSIGNED
CC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78176
--- Comment #14 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Thu Jan 19 16:05:59 2017
New Revision: 244640
URL: https://gcc.gnu.org/viewcvs?rev=244640&root=gcc&view=rev
Log:
MIPS: PR target/78176 add -mlxc1-sxc1.
gcc/
P
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78176
mpf at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
Last reconfirmed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
--- Comment #16 from mpf at gcc dot gnu.org ---
(In reply to Eric Botcazou from comment #15)
> That's incorrect, see what reload1.c:eliminate_regs_1 says about it:
>
> if (MEM_P (new_rtx)
> &
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
--- Comment #13 from mpf at gcc dot gnu.org ---
(In reply to Eric Botcazou from comment #12)
> > Maybe the load sign-extends instead of zero-extending as specified
> > initially.
>
> But I'm not sure that this matters her
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
mpf at gcc dot gnu.org changed:
What|Removed |Added
Priority|P3 |P2
Status|WAITING
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77808
--- Comment #1 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Tue Oct 4 15:28:23 2016
New Revision: 240749
URL: https://gcc.gnu.org/viewcvs?rev=240749&root=gcc&view=rev
Log:
Fix PR tree-optimization/77808
gcc/
PR tree-opti
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77654
--- Comment #4 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Fri Sep 23 15:48:01 2016
New Revision: 240439
URL: https://gcc.gnu.org/viewcvs?rev=240439&root=gcc&view=rev
Log:
Ensure points-to information is maintained for prefet
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=9
--- Comment #3 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Tue Aug 9 14:36:45 2016
New Revision: 239288
URL: https://gcc.gnu.org/viewcvs?rev=239288&root=gcc&view=rev
Log:
MIPS: Skip gcc.dg/loop-8.c due to additional invaria
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65345
--- Comment #28 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Tue Aug 9 12:36:18 2016
New Revision: 239278
URL: https://gcc.gnu.org/viewcvs?rev=239278&root=gcc&view=rev
Log:
MIPS: Use create_tmp_var_raw in mips_atomic_assign_exp
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64569
--- Comment #2 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Thu Feb 26 10:56:09 2015
New Revision: 221001
URL: https://gcc.gnu.org/viewcvs?rev=221001&root=gcc&view=rev
Log:
Add missing bug number to r221000
PR target/64569
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