https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71657
mpf at gcc dot gnu.org changed:
What |Removed |Added
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CC| |mpf at gcc dot gnu.org
--- Comment #11 from mpf at gcc dot gnu.org ---
(In reply to Tom de Vries from comment #10)
> Meaning that this PR may still occur for the other archs that define the
> target hook: mips and arc.
>
> Shouldn't we disable this optimization in the common code?
Thanks for the cc Tom.
Is there any indication of what is going wrong in LRA in the failing cases?
Infrastructure improvements suggests there is a known issue to address.
Is the x86 case about using a vector register to spill a narrower mode? If so
is there some chance of it being subreg related?
