[Bug target/78012] -mfpxx produces assembly code using odd FP registers on MIPS

[mpf at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78012

--- Comment #6 from mpf at gcc dot gnu.org ---
Author: mpf
Date: Mon Feb 20 12:07:23 2017
New Revision: 245601

URL: https://gcc.gnu.org/viewcvs?rev=245601&root=gcc&view=rev
Log:
Ensure the mode used to create split registers is suppported

gcc/
        PR target/78012
        * lra-constraints.c (split_reg): Check requested split mode
        is supported by the register.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/lra-constraints.c