ousand_var] as opposed to myarray[1000] with the
intention to control stack allocation... thanks though
On Mon, Nov 18, 2013 at 12:54 PM, Jakub Jelinek wrote:
> On Mon, Nov 18, 2013 at 12:43:50PM -0800, Hendrik Greving wrote:
>> Hmm don't VLA's obey the same lifetime rules
Hmm don't VLA's obey the same lifetime rules as regular automatic
arrays on the stack?
On Mon, Nov 18, 2013 at 11:48 AM, Jakub Jelinek wrote:
> On Mon, Nov 18, 2013 at 11:22:22AM -0800, Hendrik Greving wrote:
>> Interesting, I just read up on it and I didn't know that.
Interesting, I just read up on it and I didn't know that. Thanks. Is
it correct to say though that it is a missing optimization and
frame_pointer_needed shouldn't evaluate to true?
On Mon, Nov 18, 2013 at 10:55 AM, Andrew Pinski wrote:
> On Mon, Nov 18, 2013 at 10:47 AM, Hendrik Gre
What's the difference in the C vs. the C++ spec that makes it a VLA in GNU-C?
On Fri, Nov 15, 2013 at 10:07 AM, Andrew Pinski wrote:
> On Fri, Nov 15, 2013 at 9:31 AM, Hendrik Greving
> wrote:
>> In the below test case, "CASE_A" actually uses a frame pointer, while
printf("is is %d\n", i);
}
Thanks,
Hendrik Greving
Also keep in mind that usually costs go up significantly if
misalignment causes cache line splits (processor will fetch 2 lines).
There are non-linear costs of filling up the store queue in modern
out-of-order processors (x86). Bottom line is that it's much better to
peel e.g. for AVX2/AVX3 if the
case first. For instance I am not sure
if I understand the usage of the fixed_regs table w.r.t. to the frame
pointer. Could anybody shed some light on this by any chance?
Regards,
Hendrik Greving
I've filed bug 59084. I think it actually might affect the same x86
backend stuff as bug 41464.
Hendrik
On Mon, Nov 11, 2013 at 4:00 PM, H.J. Lu wrote:
> On Mon, Nov 11, 2013 at 2:48 PM, Hendrik Greving
> wrote:
>> Ok, thanks, that explains it... Apparently x86 splits the vect
Ok, thanks, that explains it... Apparently x86 splits the vector movs
into 2 in
ix86_expand_vector_move_misalign->ix86_avx256_split_vector_move_misalign.
But I wanted to mention that e.g. icc, despite also putting g_a, g_b,
g_c into .comm, actually generates AVX2 vmovdqu using ymm...
Examples:
f
The code for a simple loop like
for (i = 0; i < LENGTH-1; i++) {
g_c[i] = g_a[i] + g_b[i];
}
looks good for g++ (4.9.0 20131028 (experimental)) (-O3 core-avx2)
.L2:
vmovdqa g_a(%rax), %ymm0 # 26 *movv8si_internal/2 [length = 8]
vpaddd g_b(%rax), %ymm0, %ymm0 # 27 *addv8si3/2 [length = 8]
pr41118.c scan-tree-dump-times optimized "loopfn" 0
=== libgomp Summary ===
# of expected passes 2387
# of unexpected failures 5
Regards,
Hendrik Greving
I didn't realize the code violated strict aliasing. After reading it,
it seems trivial. Somehow I also thought this is only a C++ thing.
Apparently this is "defined as undefined behavior" in C99?
Thanks a lot! You just found a bug in my code.
Regards,
Thanks,
Hendrik Greving
On W
{
int modes = g_modes;
int type_a = 0;
if (modes)
{
struct my_s m;
m.l = type_a;
my_comb_t *p = GETPS(m);
p->d |= modes;
type_a = m.l;
}
printf("type_a is 0x%x\n", type_a);
return 0;
}
Regards,
Hendrik Greving
Hi,
I have a GCC regression test failing for our backend for -O3. I am
posting its code below. This might be more of a C-standard question,
but is the optimization case guaranteed not to fail from a C
perspective? When compiling it with our backend, the 'here' labels
actually match.
/* As a qual
Thanks!
On Thu, Sep 19, 2013 at 3:38 PM, H.J. Lu wrote:
> On Thu, Sep 19, 2013 at 3:03 PM, Hendrik Greving
> wrote:
>> Hi,
>>
>> I have a GCC regression test failing for our backend for -O3. I am
>> posting its code below. This might be more of a C-standard questi
Yes thanks it worked out exactly like you said. I first made the
mistake to constrain the match_scratch 'rX' and then wondering why I
am still seeing a scratch after reload. I realized you were talking
about a real alternative 'r,X'.
Regards,
Hendrik Greving
On Wed, Sep
gister pressure, does it?
Thanks
On Tue, Sep 17, 2013 at 10:33 AM, Richard Sandiford
wrote:
> Hendrik Greving writes:
>> For a special mechanism we are generating jump_insn with a 'set' side
>> effect in our backend. RTL looks e.g. like this:
>>
>> (jump_ins
pansion is done from a builtin function (which is
where I am getting either memory or register arguments)..
Your approach sounds better.
On Tue, Sep 17, 2013 at 10:33 AM, Richard Sandiford
wrote:
> Hendrik Greving writes:
>> For a special mechanism we are generating jump_insn with a &
r that. I would strongly prefer using
pseudo's, but pseudo's also seem to require reload.
Is there any way to enable above to be able to be supported in 'reload'?
Best Regards,
Hendrik Greving
Yes I guess otherwise you could never produce a complex address like
that. Actually I think I remember that day that I found that C
explicitly leaves it undefined and to the machine.
Thanks
Hendrik
On Wed, Aug 7, 2013 at 1:40 PM, Oleg Endo wrote:
> On Tue, 2013-07-09 at 09:37 -0700, Hend
Regards,
Thanks,
Hendrik Greving
.
Regards,
Hendrik Greving
-- Forwarded message --
From: Steve Ellcey
Date: Mon, Jul 22, 2013 at 1:04 PM
Subject: Re: GCC 4.8.1 MIPS
To: Hendrik Greving
On Mon, 2013-07-22 at 12:16 -0700, Hendrik Greving wrote:
> In file included from build/gencondmd.c:40:0:
> ../../gcc-4.8
I found this email thread
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48459
It sounds like I should define TARGET_DEBUG_UNWIND_INFO and return
UI_NONE for now?
On Thu, Jul 25, 2013 at 3:57 PM, Hendrik Greving
wrote:
> I am getting a crash with my backend when running arbitrary code with
&
I am reaching this code like this:
(gdb) p targetm.debug_unwind_info ()
$1 = UI_DWARF2
(gdb) p targetm_common.except_unwind_info (&global_options)
$2 = UI_SJLJ
On Thu, Jul 25, 2013 at 3:57 PM, Hendrik Greving
wrote:
> I am getting a crash with my backend when running arbitrary code wi
need to define this macro for your
target. In order to disable this feature, do I also need to disable
some frame unwind info macros?
Thanks,
Regards,
Hendrik Greving
On Tue, Jul 23, 2013 at 9:58 AM, Hendrik Greving
wrote:
> If I set use_gcc_stdint=wrap, does tm.h suppose to include
> config/glibc-stdint.h?
> Please reply to the mailing list, not just to me. Thanks.
> If you are using glibc, you shoud add glibc-stdint.h to tm_file in
> gcc/
ake target
`../../../../src/tools/fsf_4_8_1/gcc/ginclude/stdint.h', needed by
`stmp-int-hdrs'. Stop.
make[2]: Leaving directory `/path/to/objdir/gcc'
make[1]: *** [all-gcc] Error 2
make[1]: Leaving directory `/path/to/objdir'
make: *** [all] Error 2
Anybody knows what that is?
Regards,
Hendrik Greving
I was wrong. It is used in varasm.c:named_section.
On Mon, Jul 22, 2013 at 11:22 AM, Hendrik Greving
wrote:
> Is this hook still used? I don't see anything in the tool-chain
> referring to it. It is documented however.
> Regards,
> Thanks,
> Hendrik Greving
Is this hook still used? I don't see anything in the tool-chain
referring to it. It is documented however.
Regards,
Thanks,
Hendrik Greving
The enum opt_code in gcc/options.h looks like this;
enum opt_code
{
N_OPTS,
OPT_SPECIAL_unknown,
OPT_SPECIAL_ignore,
OPT_SPECIAL_program_name,
OPT_SPECIAL_input_file
};
I have a feeling I am missing something. Any idea what?
Thanks,
Regards,
Hendrik Greving
On Sat, Jul 20, 2013 at 6
declared in this scope
../../gcc-4.8.1/gcc/lto-wrapper.c:410:7: error: ‘OPT_fcommon’ was not
declared in this scope
[..]
and more...
Do I need newer binutils? i386 target compiles fine.
Regards,
Hendrik Greving
other backends (e.g. mips)
also defining this in .h.
Thanks,
Regards,
Hendrik Greving
Along the same lines, what's the difference of target_flags (I know
from old compilers) and target_flags_explicit (I do not know)?
Thanks,
Regards,
Hendrik Greving
On Mon, Jul 15, 2013 at 10:30 AM, Hendrik Greving
wrote:
> Hi,
>
> when defining target options with Mask() and &qu
o me when checking
mips/i386 definitions for instance.
Thanks,
Hendrik Greving
which doesn't say much) available for these kind of
patches?
Regards,
Hendrik Greving
On a machine with ABI ILP32LL64:
(insn 123 122 124 (nil) (set (reg:SI 392)
(mem:SI (plus:SI (reg/v:SI 386)
(reg/v:SI 349)) [0 sec 0 space 0, cmsmode 0 S4 A32])) -1 (nil)
(nil))
If we support legitimate memory addresses like [r1+r2] (e.g. indexed
addresses), can the abo
A question regarding regalloc (probably greg?)
I understand that matching constraints can constrain allocation to
re-use registers, e.g. for an 'add' actually has 2 instruction
operands (instead of 3). This is documented well. But what about if I
do not necessarily constrain the output template, e
I think the answer is yes, please disregard.
On Wed, Jun 19, 2013 at 9:05 AM, Hendrik Greving
wrote:
> If the 'address' in question is (mem:m), then this is usually false is
> that right? Compiler always asks for the address excluding (mem:m), is
> that true (it would mean s
If the 'address' in question is (mem:m), then this is usually false is
that right? Compiler always asks for the address excluding (mem:m), is
that true (it would mean some kind of pointer to pointer)? Is this
also true if reload check inline asm statements with memory
constraints?
Thanks,
Hendrik
_stat"))) [7427 sec 0 space 0,
cmsmode 0 S8 A64])
(reg:DI 56 r56)) 67 {*movdi} (nil)
(nil))
- Hendrik Greving
On Tue, Jun 18, 2013 at 8:43 AM, Hendrik Greving
wrote:
> If I'm running into
>
> /* Figure out which alternative currently matc
If I'm running into
/* Figure out which alternative currently matches. */
if (! constrain_operands (1))
fatal_insn_not_found (insn);
'insn does not satisfy its constraints'
By the way, the instruction is
(insn 325 31 44 0 (nil) (set (mem/s:DI (plus:SI (reg:SI 58 r58 [884])
reloads_subreg_address)? Same question for
req_equiv_address, why does this matter whether or not we end up
widening/narrowing the memory location?
Generally speaking, does it look fine to you that we end up
spilling/reloading mem:HI on the one hand, but mem:SI on the other?
Thanks!! Regards,
Hendrik
Hi
we need a (very) stable GCC version for our project. Is 4.8.1 a good
pick or is some of the 4.7.x versions better?
Regards,
Hendrik
addsi insn 2219 in 22.lreg
(we only have addsi, not addhi), is getting a reload, but what happens
to be a HI, is now fully SI resulting into a 32 bit load later in the
assembly.
Question: is it possible to say, is this a bug or a feature?
Thanks, Regards.
Hendrik Greving
ant way to make structures visible to
GTY? Can I make GTY look at header files? I am absolutely not familiar
with GTY.
Thanks,
Hendrik Greving
00__00"...
where do they come from? It is not source code is it?
I hope this is not too general of a question.
Thanks, Regards,
Hendrik Greving
, call_used_reg and
call_fixed_reg, just as HARD_REG_SET representation?
And secondly, is call_used_reg_set always a subset of fixed_reg_set,
and call_fixed_reg_set always a subset of call_used_reg_set as well as
subset of fixed_reg_set?
Thanks for help,
Regards,
Hendrik Greving
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