Re: [PATCH] drm/radeon/kms: add support for streamout

property of what you introduce is part of > the API and thus we can't change it. I know it's painful. > > Cheers, > Jerome > >> > >> > Signed-off-by: Marek Olšák >> > --- >> >  drivers/gpu/drm/radeon/evergreen_cs.c     |  104 >&g

Re: [PATCH] drm/radeon/kms: add support for streamout v4

n Tue, Jan 24, 2012 at 05:17:18PM -0500, alexdeuc...@gmail.com wrote: >> From: Marek Olšák >> >> v2: agd5f: add strmout CS checking, copy_dw register checking >> >> v3: agd5f: don't use cs_check_reg() for copy_dw checking as it >> will incorrectly patch the

Re: [PATCH] drm/radeon: Add support for userspace fence waits

2012/1/31 Jerome Glisse : > On Tue, Jan 31, 2012 at 06:56:01PM +0100, Michel Dänzer wrote: >> On Die, 2012-01-31 at 16:59 +, Simon Farnsworth wrote: >> > Userspace currently busywaits for fences to complete; on my workload, this >> > busywait consumes 10% of the available CPU time. >> > >> > Pr

Re: [PATCH] drm/radeon: Add support for userspace fence waits

2012/2/1 Michel Dänzer : > On Die, 2012-01-31 at 22:08 +0100, Marek Olšák wrote: >> 2012/1/31 Jerome Glisse : >> > On Tue, Jan 31, 2012 at 06:56:01PM +0100, Michel Dänzer wrote: >> >> On Die, 2012-01-31 at 16:59 +, Simon Farnsworth wrote: >> >> >

[PATCH] drm/radeon/kms: set SX_MISC in the r6xx blit code

Mesa may set it to 1, causing all primitives to be killed. Signed-off-by: Marek Olšák --- I hope it's right. drivers/gpu/drm/radeon/r600_blit_shaders.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gp

[PATCH] r6xx: initialize SX_MISC

If Mesa set it to 1, the DDX would not render anything = the monitor would basically freeze. --- If it's right, please apply it to xf86-video-ati. I don't have commit access. src/r6xx_accel.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/src/r6xx_accel.c b/src/r6xx_acce

[PATCH] drm/radeon/kms: set SX_MISC in the r6xx blit code (v2)

Mesa may set it to 1, causing all primitives to be killed. v2: also update the r7xx code Signed-off-by: Marek Olšák Cc: sta...@kernel.org --- drivers/gpu/drm/radeon/r600_blit_shaders.c |8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon

[PATCH] drm/radeon/kms: skip cb/db checking if SX_MISC is 1 on r600+

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c |8 drivers/gpu/drm/radeon/r600_cs.c |8 drivers/gpu/drm/radeon/reg_srcs/cayman|1 - drivers/gpu/drm/radeon/reg_srcs/evergreen |1 - drivers/gpu/drm/radeon/reg_srcs/r600

[PATCH 1/7] drm/radeon/kms: make some DRM errors more informative

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c |8 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index 8bf576a..4674a68 100644 --- a/drivers/gpu/drm/radeon

[PATCH 3/7] drm/radeon/kms: optimize streamout checking for evergreen

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c | 37 ++-- 1 files changed, 21 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index b39a089..0427b96 100644 --- a

[PATCH 2/7] drm/radeon/kms: compute GPU addresses correctly on evergreen

There are also two fixes: - In DRAW_INDEX_2, we read idx_value, but should have read idx+1. - When correcting SQ_VTX_CONSTANT_WORD1_0.SIZE, we should subtract the offset. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c | 130 ++--- 1 files

[PATCH 4/7] drm/radeon/kms: skip db/cb/streamout checking when possible on evergreen

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c | 91 - 1 files changed, 66 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index 0427b96..7327bc7 100644 --- a

[PATCH 6/7] drm/radeon/kms: compute GPU addresses correctly on r600

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r600_cs.c | 89 +- 1 files changed, 68 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index b3c40e0..d9ebec3 100644 --- a/drivers/gpu/drm

[PATCH 5/7] drm/radeon/kms: remove some unused variables in evergreen_cs_track

and document the other unused ones. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c | 58 +++-- drivers/gpu/drm/radeon/reg_srcs/cayman| 12 ++ drivers/gpu/drm/radeon/reg_srcs/evergreen | 12 ++ 3 files changed, 30 insertions

[PATCH 7/7] drm/radeon/kms: skip db/cb/streamout checking when possible on r600

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r600_cs.c | 270 +- 1 files changed, 150 insertions(+), 120 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index d9ebec3..0ec3f20 100644 --- a/drivers/gpu

[PATCH 1/2] drm/radeon: add some additional 6xx/7xx/EG register init

From: Alex Deucher - SMX_SAR_CTL0 needs to be programmed correctly to prevent problems with memory exports in certain cases. - VC_ENHANCE needs to be initialized on 6xx/7xx. Signed-off-by: Alex Deucher Cc: sta...@vger.kernel.org --- drivers/gpu/drm/radeon/evergreen.c |3 +++ drivers/gpu/d

[PATCH 2/2] drm/radeon: add support for STRMOUT_BASE_UPDATE on 7xx

From: Alex Deucher Required for streamout. Bump drm minor. Marek v2: fix pkt->count check Signed-off-by: Alex Deucher Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r600_cs.c| 42 +++ drivers/gpu/drm/radeon/r600d.h |1 + drivers/gpu/

[PATCH 1/2] radeon: simplify ZS buffer checking on r600

Setting those flags has no effect anywhere else. --- radeon/radeon_surface.c |9 + 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index c80f7f4..5800c33 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@

[PATCH 2/2] radeon: optimize allocation for depth w/o stencil and stencil w/o depth on EG

If we don't need stencil, don't allocate it. If we need only stencil (like PIPE_FORMAT_S8_UINT), don't allocate depth. --- radeon/radeon_surface.c | 19 +-- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 5800

[PATCH] drm/radeon/kms: allow "invalid" DB formats as a means to disable DB

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c |6 -- drivers/gpu/drm/radeon/evergreend.h |2 ++ drivers/gpu/drm/radeon/r600_cs.c |6 -- drivers/gpu/drm/radeon/radeon_drv.c |3 ++- 4 files changed, 12 insertions(+), 5 deletions(-) diff

[PATCH 2/2] radeon: optimize allocation for depth w/o stencil and stencil w/o depth on EG

If we don't need stencil, don't allocate it. If we need only stencil (like PIPE_FORMAT_S8_UINT), don't allocate depth. v2: actually do it correctly --- radeon/radeon_surface.c | 23 --- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/radeon/radeon_surface.c b/

Re: [PATCH 2/2] radeon: optimize allocation for depth w/o stencil and stencil w/o depth on EG

On Mon, Jul 30, 2012 at 4:56 PM, Jerome Glisse wrote: > On Sun, Jul 29, 2012 at 1:04 PM, Marek Olšák wrote: >> If we don't need stencil, don't allocate it. >> If we need only stencil (like PIPE_FORMAT_S8_UINT), don't allocate depth. >> >> v2: actually

Re: [PATCH] drm/radeon/kms: allow "invalid" DB formats as a means to disable DB

After some discussion in private, we've come to the conclusion that this is a very important fix. So if it's possible: Cc: sta...@kernel.org Applicable to 3.5 stable kernel only. Marek On Sun, Jul 29, 2012 at 4:24 PM, Marek Olšák wrote: > Signed-off-by: Marek Olšák > --- &g

[PATCH] drm/radeon/kms: allow "invalid" DB formats as a means to disable DB

Signed-off-by: Marek Olšák Reviewed-by: Alex Deucher Reviewed-by: Michel Dänzer Cc: sta...@vger.kernel.org [3.5] --- drivers/gpu/drm/radeon/evergreen_cs.c |6 -- drivers/gpu/drm/radeon/evergreend.h |2 ++ drivers/gpu/drm/radeon/r600_cs.c |6 -- drivers/gpu/drm/radeon

[PATCH 1/3] drm/radeon/kms: reorder code in r600_check_texture_resource

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r600_cs.c | 52 +++--- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 1119e31..ff61402 100644 --- a/drivers/gpu/drm

[PATCH 2/3] drm/radeon/kms: add MSAA texture support for r600-evergreen

Most of the checking seems to be in place already. As you can see, log2(number of samples) resides in LAST_LEVEL. This is required for MSAA support (namely for depth-stencil resolve and blitting between MSAA resources). Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c

[PATCH 3/3] drm/radeon/kms: implement timestamp userspace query

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r600.c | 12 +++ drivers/gpu/drm/radeon/r600d.h |3 +++ drivers/gpu/drm/radeon/radeon.h|1 + drivers/gpu/drm/radeon/radeon_asic.h |2 ++ drivers/gpu/drm/radeon/radeon_device.c |1 + drivers

[PATCH 1/2] radeon: force 2D tiling for MSAA surfaces

--- radeon/radeon_surface.c | 24 ++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 874a092..499e994 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -154,7 +154,7 @@ static void su

[PATCH 2/2] radeon: tweak TILE_SPLIT for MSAA surfaces

--- radeon/radeon_surface.c | 37 +++-- 1 file changed, 31 insertions(+), 6 deletions(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 499e994..892dca6 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -871,12 +871,37 @@

Re: [PATCH 1/2] radeon: force 2D tiling for MSAA surfaces

On Thu, Aug 9, 2012 at 5:41 PM, Paul Menzel wrote: > Dear Marek, > > > Am Donnerstag, den 09.08.2012, 16:37 +0200 schrieb Marek Olšák: >> --- >> radeon/radeon_surface.c | 24 ++-- >> 1 file changed, 22 insertions(+), 2 deletions(-) > &

[PATCH] drm/radeon: don't check mipmap alignment if MIP_ADDRESS is FMASK

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c |2 +- drivers/gpu/drm/radeon/radeon_drv.c |3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index d8f5d5f..a759a3d

Re: [PATCH] drm/radeon: don't check mipmap alignment if MIP_ADDRESS is FMASK

not apply to FMASK. Marek On Mon, Mar 4, 2013 at 6:50 PM, Paul Menzel wrote: > Am Montag, den 04.03.2013, 11:13 -0500 schrieb Alex Deucher: >> On Fri, Mar 1, 2013 at 7:40 AM, Marek Olšák wrote: >> > Signed-off-by: Marek Olšák >> >> Added to my -fixes queue. > &g

[PATCH] radeon: add RADEON_SURF_FMASK flag which disables 2D->1D tiling transition

I will release a new version of libdrm after this is committed. --- radeon/radeon_surface.c |9 ++--- radeon/radeon_surface.h |1 + 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 288b5e2..56012da 100644 --- a/radeo

[ANNOUNCE] libdrm 2.4.45

ids radeon: add new richland pci ids radeon: add HAINAN family radeon: add HAINAN pci ids Dave Airlie (1): drm: add qxl drm header file Marek Olšák (2): radeon: add RADEON_SURF_FMASK flag which disables 2D->1D tiling transition configure.ac: bump version

Re: [PATCH 2/3] drm/radeon: implement bo copy callback using CP DMA (v2)

I have just discovered that WAIT_UNTIL=WAIT_3D_IDLE must be set before using CP DMA. Marek On Thu, Jul 11, 2013 at 9:35 PM, wrote: > From: Alex Deucher > > Lighter weight than using the 3D engine. > > v2: fix ring count > > Signed-off-by: Alex Deucher > --- > drivers/gpu/drm/radeon/r600.c

Re: [PATCH] fix mesa tarball creation again

Pushed, thanks. Marek On Sat, Apr 16, 2011 at 10:11 AM, Thierry Vignaud wrote: > Hi > > The following patch fixes mesa tarball creation again > ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dr

[PATCH] drm/radeon/kms: add missing Evergreen texture formats to the CS parser

BC6 and BC7 are described in ARB_texture_compression_bptc. No idea what FMT_32_AS_32_32_32_32 is good for. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r600_cs.c | 28 ++-- drivers/gpu/drm/radeon/r600d.h |3 +++ 2 files changed, 21 insertions(+), 10

[PATCH] drm/radeon/kms: do bounds checking for 3D_LOAD_VBPNTR and bump array limit

: sta...@kernel.org Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r100_track.h |8 +++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h index 2fef9de..686f9dc 100644 --- a/drivers/gpu/drm/radeon/r100_tr

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

write for each buffer, in addition to the sync object of the last use of a buffer. ttm_bo_wait then operates with one the sync objects. Signed-off-by: Marek Olšák --- drivers/gpu/drm/nouveau/nouveau_bo.c|3 +- drivers/gpu/drm/nouveau/nouveau_gem.c |5 +- drivers/gpu/drm/radeon/r

[PATCH 2/2] drm/radeon/kms: add a new gem_wait ioctl with read/write flags

The new DRM_RADEON_GEM_WAIT ioctl combines GEM_WAIT_IDLE and GEM_BUSY (there is a NO_WAIT flag to get the latter) with USAGE_READ and USAGE_WRITE flags to take advantage of the new ttm_bo_wait changes. Also bump the DRM version. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/radeon.h

Re: [PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

c object of the last use of a buffer. ttm_bo_wait then operates with one the sync objects. Signed-off-by: Marek Olšák Reviewed-by: Jerome Glisse --- drivers/gpu/drm/nouveau/nouveau_bo.c|3 +- drivers/gpu/drm/nouveau/nouveau_gem.c |5 +- drivers/gpu/drm/radeon/radeon_cs.c |

[PATCH] drm/radeon/kms: allow r500 US_FORMAT regs in the CS checker

And bump the DRM version to 2.8.0. The purpose of these regs is to work around a TX hw bug in R520. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/radeon_drv.c |5 +++-- drivers/gpu/drm/radeon/reg_srcs/rv515 | 16 2 files changed, 19 insertions(+), 2 deletions

[PATCH] drm/radeon/kms: add ARGB2101010 colorbuffer support for r500

This should be part of DRM 2.8.0. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r300.c |7 +++ drivers/gpu/drm/radeon/radeon_drv.c |2 +- 2 files changed, 8 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index

[PATCH] drm/radeon/kms: manage r300 CMASK RAM access and allow CMASK clear

: Marek Olšák --- drivers/gpu/drm/radeon/r300.c |9 drivers/gpu/drm/radeon/r300d.h |1 + drivers/gpu/drm/radeon/radeon.h |3 +- drivers/gpu/drm/radeon/radeon_drv.c |2 +- drivers/gpu/drm/radeon/radeon_kms.c | 39 -- include/drm

[PATCH] drm/radeon/kms: release CMASK access in preclose_kms

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/radeon_kms.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 28a53e4..a794e17 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b

[PATCH] drm/radeon/kms: optimize CS state checking for r100->r500

the kernel when running Torcs dropped from 33% to 23% and the frame rate is higher, which is a good thing. r600 might need something like this as well. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r100.c | 40 +++--- drivers/gpu/drm/radeon

Re: [PATCH] drm/radeon/kms: optimize CS state checking for r100->r500

On Sat, Feb 12, 2011 at 7:21 PM, Marek Olšák wrote: > The colorbuffer, zbuffer, and texture states are checked only once when > they get changed. This improves performance in the apps which emit > lots of draw packets and few state changes. > > This drops performance in glxgear

[PATCH 1/2] drm/radeon/kms: fix tracking of BLENDCNTL, COLOR_CHANNEL_MASK, and GB_Z on r300

Also move ZB_DEPTHCLEARVALUE to the list of safe regs. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r300.c |3 +-- drivers/gpu/drm/radeon/reg_srcs/r300 |3 +-- drivers/gpu/drm/radeon/reg_srcs/r420 |4 +--- drivers/gpu/drm/radeon/reg_srcs/rs600 |3 +-- drivers

[PATCH 2/2] drm/radeon/kms: check AA resolve registers on r300

This is an important security fix because we allowed arbitrary values to be passed to AARESOLVE_OFFSET. This also puts the right buffer address in the register. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r100.c | 25 + drivers/gpu/drm/radeon

[PATCH] drm/radeon/kms: do not reject X16 and Y16X16 floating-point formats on r300

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r300.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 768c60e..069efa8 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300

Re: drm/radeon: using libdrm_radeon for a new display server

On Mon, Mar 28, 2011 at 9:35 AM, Chia-I Wu wrote: > Hi list, > > I have a simple scenario that there are clients rendering to buffer > objects using the CPU, and the display server compositing the buffers > using OpenGL and doing page flips to present the final contents. It > is like doing the f

[PATCH] drm/radeon/kms: r300 fix CS checker to allow zbuffer-only fastfill

; charset=utf-8 Content-Transfer-Encoding: 8bit Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r100.c |2 +- drivers/gpu/drm/radeon/r100_track.h |2 +- drivers/gpu/drm/radeon/r300.c |2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm

R600g ported to mesa git

Hi Jerome, I've ported your R600 Gallium3D driver to current mesa git. The list of changes: - Wrapped the buffer and texture create/destroy/transfer/... functions using u_resource, which is then used to implement the resource functions. - Implemented texture transfers. I left the buffer and textu

[PATCH] drm/radeon: add a way to revoke hyper-z access

Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/radeon_kms.c | 24 +++- 1 files changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index ddcd3b1..0e5deea 100644 --- a/drivers/gpu/drm

[PATCH] drm/radeon/kms: allow FG_ALPHA_VALUE on r5xx

This is a CS checker fix. I need this for FP16 alpha-test. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/reg_srcs/rv515 |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515 index 8293855

[PATCH 1/2] drm/radeon/kms: increase lockup detection interval to 10 sec for r100-r500

now lowered to 0.1 fps. Now the question comes down to whether we should (often unsuccessfully) reset the GPU at all? Once we have stable enough drivers, we won't have to. Has the time come already? If possible, this commit should go to stable as well. Signed-off-by: Marek Olšák --- driver

[PATCH 2/2] drm/radeon/kms: fix the colorbuffer CS checker for r300-r500

sktop.org/show_bug.cgi?id=29762 - https://bugs.freedesktop.org/show_bug.cgi?id=28869 And maybe some others which seem to look the same. If possible, this commit should go to stable as well. Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r100.c | 11 ++- 1 files changed, 6 inserti

Re: [PATCH 1/2] drm/radeon/kms: increase lockup detection interval to 10 sec for r100-r500

Oh I almost forgot. I removed the funky "(elapsed >= 3000)" conditional which funnily did not mean a hardlock. I don't understand what it was meant to be and what it was for. Any idea? Marek On Sun, Sep 12, 2010 at 5:09 AM, Marek Olšák wrote: > One subtest of mesa/dem

Re: [PATCH 2/2] drm/radeon/kms: fix the colorbuffer CS checker for r300-r500

Tested-by: Sven Arvidsson Posted here: https://bugs.freedesktop.org/show_bug.cgi?id=30036#c6 On Sun, Sep 12, 2010 at 5:09 AM, Marek Olšák wrote: > This commit fixes bogus CS rejection if it contains a sequence > of the following operations: > > - Set the color buffer 0. track

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

On Tue, Oct 4, 2011 at 1:48 PM, Thomas Hellstrom wrote: > Bah, I totally missed this patch and thus never reviewed it :( Probably on > vacation. > > There are a couple of things I'd like to point out. > > 1) The bo subsystem may never assume that fence objects are ordered, so that > when we unref

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

On Wed, Oct 5, 2011 at 7:54 AM, Thomas Hellstrom wrote: > In any case, I'm not saying fences is the best way to flush but since the bo > code assumes that signaling a sync object means "make the buffer contents > available for CPU read / write", it's usually a good way to do it; there's > even a s

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

On Fri, Oct 7, 2011 at 3:42 PM, Jerome Glisse wrote: > Forget to mention that we would need a new wait_fence ioctl to wait > for a specific fence seq on a specific ring We need a wait_fence ioctl anyway and even with a timeout parameter. It's a mandatory OpenGL feature. r600g uses a loop with sch

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

On Fri, Oct 7, 2011 at 3:38 PM, Jerome Glisse wrote: > I should have look at the patch long ago ... anyway i think a better > approach would be to expose fence id as 64bits unsigned to each > userspace client. I was thinking of mapping a page readonly (same page > as the one gpu write back) at som

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

On Fri, Oct 7, 2011 at 10:00 AM, Thomas Hellstrom wrote: > OK. First I think we need to make a distinction: bo sync objects vs driver > fences. The bo sync obj api is there to strictly provide functionality that > the ttm bo subsystem is using, and that follows a simple set of rules: > > 1) the b

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

On Sat, Oct 8, 2011 at 1:32 PM, Thomas Hellstrom wrote: > On 10/08/2011 01:27 PM, Ville Syrj?l? wrote: >> >> On Sat, Oct 08, 2011 at 01:10:13PM +0200, Thomas Hellstrom wrote: >> >>> >>> On 10/08/2011 12:26 PM, Ville Syrj?l? wrote: >>> On Fri, Oct 07, 2011 at 10:58:13AM +0200, Thomas Hell

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

Hi Thomas, I have made no progress so far due to lack of time. Would you mind if I fixed the most important things first, which are: - sync objects are not ordered, (A) - every sync object must have its corresponding sync_obj_arg, (B) and if I fixed (C) some time later. I planned on moving the t

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

Alright then. Dave, if you are reading this, feel free not to include the two patches I sent you in the next pull request. Marek On Mon, Oct 24, 2011 at 7:28 PM, Thomas Hellstrom wrote: > Marek, > > The problem is that the patch adds a lot of complicated code where it's not > needed, and I don

[PATCH] drm/radeon/kms: add a CS ioctl flag not to rewrite tiling flags in the CS

This adds a new optional chunk to the CS ioctl that specifies optional flags to the CS parser. Why this is useful is explained below. Note that some regs no longer need the NOP relocation packet if this feature is enabled. Tested on r300g and r600g with this flag disabled and enabled. Assume there

[PATCH 1/3] drm/radeon/kms: reorder code in r600_check_texture_resource

Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/r600_cs.c | 52 +++--- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 1119e31..ff61402 100644 --- a/drivers/gpu/drm/ra

[PATCH 2/3] drm/radeon/kms: add MSAA texture support for r600-evergreen

Most of the checking seems to be in place already. As you can see, log2(number of samples) resides in LAST_LEVEL. This is required for MSAA support (namely for depth-stencil resolve and blitting between MSAA resources). Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/evergreen_cs.c |7

[PATCH 3/3] drm/radeon/kms: implement timestamp userspace query

Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/r600.c | 12 +++ drivers/gpu/drm/radeon/r600d.h |3 +++ drivers/gpu/drm/radeon/radeon.h|1 + drivers/gpu/drm/radeon/radeon_asic.h |2 ++ drivers/gpu/drm/radeon/radeon_device.c |1 + drivers/

[PATCH 1/2] radeon: force 2D tiling for MSAA surfaces

--- radeon/radeon_surface.c | 24 ++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 874a092..499e994 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -154,7 +154,7 @@ static void su

[PATCH 2/2] radeon: tweak TILE_SPLIT for MSAA surfaces

--- radeon/radeon_surface.c | 37 +++-- 1 file changed, 31 insertions(+), 6 deletions(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 499e994..892dca6 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -871,12 +871,37 @@

[PATCH 1/2] radeon: force 2D tiling for MSAA surfaces

On Thu, Aug 9, 2012 at 5:41 PM, Paul Menzel wrote: > Dear Marek, > > > Am Donnerstag, den 09.08.2012, 16:37 +0200 schrieb Marek Ol??k: >> --- >> radeon/radeon_surface.c | 24 ++-- >> 1 file changed, 22 insertions(+), 2 deletions(-) > > [?] > > do you have some numbers indica

[ANNOUNCE] libdrm 2.4.38

Alex Deucher (2): radeon: add some missing evergreen pci ids radeon: add some new SI pci ids Chris Wilson (1): intel: Bail gracefully if we encounter an unknown Intel device Cooper Yuan (1): libdrm/exynos: padding gem_mmap structure to 64-bit aligned Damien Lespiau (1):

[ANNOUNCE] libdrm 2.4.38

The thing is I didn't have the permission to upload the files, so another core developer did it for me (Jerome Glisse). It's probably just a different version of gcc between his machine and mine that caused this issue. The files should be okay and the announcement is wrong. Sorry about that. Marek

[PATCH] drm/radeon: allow CMASK and FMASK in the CS checker on r600-r700

MSAA is impossible without them. Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/r600_cs.c | 94 +- drivers/gpu/drm/radeon/r600d.h | 17 ++ drivers/gpu/drm/radeon/radeon_drv.c |3 +- drivers/gpu/drm/radeon/reg_srcs/r600 |8 --- 4 f

[PATCH] r600g: fix allocation of MSAA surfaces on r600-r700

--- radeon/radeon_surface.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 892dca6..98f4aaf 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -165,7 +165,7 @@ static void surf_minify(struct radeon_s

[PATCH] drm/radeon: fix checking of MSAA renderbuffers on r600-r700

Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/r600_cs.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 1bec5b8..ab74e6b 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/

[PATCH] drm/radeon: allow CMASK and FMASK in the CS checker on r600-r700

Please can someone tell me if this patch will end up in kernel 3.6 or 3.7. If it is merged in Linus's tree in the coming days, I'll try to complete R600-R700 MSAA support (and therefore GL3.0) for Mesa 9.0. Marek On Sun, Aug 19, 2012 at 2:22 AM, Marek Ol??k wrote: > MSAA is impossible without t

[PATCH] drm/radeon: fix checking of MSAA renderbuffers on r600-r700

On Mon, Aug 20, 2012 at 7:35 AM, Paul Menzel wrote: > Dear Marek, > > > thank you for all your work on MSAA. > > > Am Sonntag, den 19.08.2012, 21:23 +0200 schrieb Marek Ol??k: > > Unfortunately you do not provide any commit message. What is the problem > and what are the symptoms? When was it intr

[PATCH] radeon: align r600 msaa buffers to a multiple of macrotile size * num samples

I am not sure whether this is needed, but better be safe than sorry. --- radeon/radeon_surface.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 98f4aaf..4118a37 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_

[PATCH 1/2] drm/radeon: fix reading CB_COLORn_MASK from the CS

Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/r600_cs.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index ab74e6b..7799e28 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/rad

[PATCH 2/2] drm/radeon: initialize tracked CS state

This should help catch uninitialized registers and reject commands because of that. Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/r600_cs.c |9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c i

[PATCH] drm/radeon: add proper checking of RESOLVE_BOX command for r600-r700

Checking of the second colorbuffer was skipped on r700, because CB_TARGET_MASK was 0xf. With r600, CB_TARGET_MASK is changed to 0xff, so we must set the number of samples of the second colorbuffer to 1 in order to pass the CS checker. The DRM version is bumped, because RESOLVE_BOX is always rejecte

[ANNOUNCE] libdrm 2.4.39

Dave Airlie (1): radeon: add prime import/export support Kenneth Graunke (1): intel: Use VG_CLEAR on the context destroy ioctl as well. Marek Ol??k (3): radeon: fix allocation of MSAA surfaces on r600-r700 radeon: align r600 msaa buffers to a multiple of macrotile size * n

[PATCH] drm/radeon: add a CS flag END_OF_FRAME

No version bump is required because setting the flag on older DRM has no effect. This only reserves the bit and doesn't use it. I assume we will use it for buffer eviction heuristics. Signed-off-by: Marek Ol??k --- include/uapi/drm/radeon_drm.h |1 + 1 file changed, 1 insertion(+) diff --g

[PATCH] drm/radeon: Add support for userspace fence waits

2012/2/1 Michel D?nzer : > On Die, 2012-01-31 at 22:08 +0100, Marek Ol??k wrote: >> 2012/1/31 Jerome Glisse : >> > On Tue, Jan 31, 2012 at 06:56:01PM +0100, Michel D?nzer wrote: >> >> On Die, 2012-01-31 at 16:59 +, Simon Farnsworth wrote: >> >> > Userspace currently busywaits for fences to comp

[PATCH] drm/radeon/kms: add support for streamout

People can start using transform feedback on r6xx with this. Strict CS checking will be implemented later. Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/evergreen_cs.c | 104 +++-- drivers/gpu/drm/radeon/evergreend.h | 10 +++ drivers/gpu/drm/radeon/

[PATCH] drm/radeon/kms: add support for streamout

You're both right. I wanted to put this patch out so that somebody else could try this stuff out. I'll finish it when time allows. Marek On Mon, Jan 9, 2012 at 4:26 PM, Jerome Glisse wrote: > On Thu, Jan 05, 2012 at 10:21:31PM -0500, Alex Deucher wrote: >> On Thu, Jan 5, 2012 at 9:30 PM, Marek O

[PATCH] drm/radeon/kms: add support for streamout v4

Sorry Jerome, I didn't have time to properly finish the patch and update the CS checker properly. Also evergreen_cs_track_check has been a no-op for a long time and this patch doesn't make it any more exploitable. Marek On Wed, Jan 25, 2012 at 12:43 AM, Jerome Glisse wrote: > On Tue, Jan 24, 20

[PATCH] drm/radeon: Add support for userspace fence waits

2012/1/31 Jerome Glisse : > On Tue, Jan 31, 2012 at 06:56:01PM +0100, Michel D?nzer wrote: >> On Die, 2012-01-31 at 16:59 +, Simon Farnsworth wrote: >> > Userspace currently busywaits for fences to complete; on my workload, this >> > busywait consumes 10% of the available CPU time. >> > >> > Pr

[PATCH 1/2] drm/radeon/kms: increase lockup detection interval to 10 sec for r100-r500

One subtest of mesa/demos/gltestperf takes 9 seconds to complete, so to prevent an unnecessary gpu reset followed by a hardlock, I am increasing the interval to 10 seconds after which a GPU is considered in a locked-up state. This is on RV530. However, with a little slower GPU, we would surpass the

[PATCH 2/2] drm/radeon/kms: fix the colorbuffer CS checker for r300-r500

This commit fixes bogus CS rejection if it contains a sequence of the following operations: - Set the color buffer 0. track->cb[i].robj becomes non-NULL. - Render. - Set a larger zbuffer than the previously-set color buffer. - Set a larger scissor area as well. - Set the color channel mask to 0 to

[PATCH 1/2] drm/radeon/kms: increase lockup detection interval to 10 sec for r100-r500

Oh I almost forgot. I removed the funky "(elapsed >= 3000)" conditional which funnily did not mean a hardlock. I don't understand what it was meant to be and what it was for. Any idea? Marek On Sun, Sep 12, 2010 at 5:09 AM, Marek Ol??k wrote: > One subtest of mesa/demos/gltestperf takes 9 secon

[PATCH 2/2] drm/radeon/kms: fix the colorbuffer CS checker for r300-r500

Tested-by: Sven Arvidsson Posted here: https://bugs.freedesktop.org/show_bug.cgi?id=30036#c6 On Sun, Sep 12, 2010 at 5:09 AM, Marek Ol??k wrote: > This commit fixes bogus CS rejection if it contains a sequence > of the following operations: > > - Set the color buffer 0. track->cb[i].robj becom

[PATCH] fix mesa tarball creation again

Pushed, thanks. Marek On Sat, Apr 16, 2011 at 10:11 AM, Thierry Vignaud wrote: > Hi > > The following patch fixes mesa tarball creation again > -- next part -- An HTML attachment was scrubbed... URL:

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

Sometimes we want to know whether a buffer is busy and wait for it (bo_wait). However, sometimes it would be more useful to be able to query whether a buffer is busy and being either read or written, and wait until it's stopped being either read or written. The point of this is to be able to avoid

[PATCH 2/2] drm/radeon/kms: add a new gem_wait ioctl with read/write flags

The new DRM_RADEON_GEM_WAIT ioctl combines GEM_WAIT_IDLE and GEM_BUSY (there is a NO_WAIT flag to get the latter) with USAGE_READ and USAGE_WRITE flags to take advantage of the new ttm_bo_wait changes. Also bump the DRM version. Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/radeon.h

[PATCH 1/2] drm/ttm: add a way to bo_wait for either the last read or last write

On Fri, Aug 12, 2011 at 7:21 PM, Jerome Glisse wrote: >> diff --git a/drivers/gpu/drm/ttm/ttm_execbuf_util.c >> b/drivers/gpu/drm/ttm/ttm_execbuf_util.c >> index 3832fe1..0438296 100644 >> --- a/drivers/gpu/drm/ttm/ttm_execbuf_util.c >> +++ b/drivers/gpu/drm/ttm/ttm_execbuf_util.c >> @@ -223,6 +2

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