On Fri, Jul 11, 2025 at 08:04:37AM +, Alice Ryhl wrote:
> The prefix as_* should not be used for a constructor. Constructors
> usually use the prefix from_* instead.
>
> Some prior art in the stdlib: Box::from_raw, CString::from_raw,
> Rc::from_raw, Arc::from_raw, Waker::from_raw, File::from_r
On Wed, 2025-07-16 at 09:43 +, cao, lin wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
>
>
> Hi Philipp,
>
>
> Thank you for the review. I found that this optimization was
> introduced 9 years ago in commit
> 777dbd458c89d4ca74a659f85ffb5bc817f29a35 ("drm/amdgpu: dr
On 7/15/25 5:50 PM, Dmitry Baryshkov wrote:
> Various parts of the display driver can be triggering the display
> snapshot (including the IOMMU fault handlers). Move the call to
> msm_disp_snapshot_init() before KMS initialization, otherwise it is
> possible to ocassionally trigger the kernel fault
Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced this warning:
drivers/gpu/drm/drm_bridge.c:1242: warning: Function parameter or struct member
'connector' not described in 'drm_bridge_detect'
Introduced by commit
5d156a9c3d5e ("drm/bridge: Pass down conne
On Wed Jul 16, 2025 at 12:16 PM CEST, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the rust tree got a conflict in:
>
> rust/kernel/drm/gem/mod.rs
>
> between commit:
>
> 917b10d90990 ("drm: rust: rename as_ref() to from_raw() for drm
> constructors")
>
> from the drm-misc
On Thu, Jul 10, 2025 at 11:08:33AM -0400, Rodrigo Vivi wrote:
> From: Alexander Usyskin
>
> Introduce a new MEI client driver to support Late Binding firmware
> upload/update for Intel discrete graphics platforms.
>
> Late Binding is a runtime firmware upload/update mechanism that allows
> paylo
> Subject: Re: [PATCH 2/9] mei: late_bind: add late binding component driver
>
> On Thu, Jul 10, 2025 at 11:08:33AM -0400, Rodrigo Vivi wrote:
> > From: Alexander Usyskin
> >
> > Introduce a new MEI client driver to support Late Binding firmware
> > upload/update for Intel discrete graphics platf
On 25-07-16 11:15:05, Laurentiu Palcu wrote:
> Currently, besides probe(), the platform data is read in both suspend()
> and resume(). Let's avoid this by making pdata a member of imx95_blk_ctl
> structure.
>
> Signed-off-by: Laurentiu Palcu
Reviewed-by: Abel Vesa
On Wed, Jul 16, 2025 at 01:32:42PM +0200, Philipp Stanner wrote:
> On Wed, 2025-07-16 at 13:15 +0200, Greg Kroah-Hartman wrote:
> > On Wed, Jul 16, 2025 at 12:58:28PM +0200, Christian König wrote:
> > > On 16.07.25 12:46, Philipp Stanner wrote:
> > > > +Cc Greg, Sasha
> > > >
> > > > On Wed, 2025-
On 25-07-16 11:15:06, Laurentiu Palcu wrote:
> If runtime PM is used for the clock providers and they're part of a
> power domain, then the power domain supply will be cut off when runtime
> suspended. That means all BLK CTL registers belonging to that power
> domain will be reset. Save the registe
On Wed, Jul 16, 2025 at 11:58:19AM +, Usyskin, Alexander wrote:
> > Subject: Re: [PATCH 2/9] mei: late_bind: add late binding component driver
> >
> > On Thu, Jul 10, 2025 at 11:08:33AM -0400, Rodrigo Vivi wrote:
> > > From: Alexander Usyskin
> > >
> > > Introduce a new MEI client driver to s
Hi Tvrtko,
On 16/07/25 05:48, Tvrtko Ursulin wrote:
The "skip reset" test waits for the timeout handler to run for the
duration of 2 * MOCK_TIMEOUT, and because the mock scheduler opted to
Would it make any sense to wait for 1.5 * MOCK_TIMEOUT? This way we
would guarantee that only one timeout
This fix the make htmldocs warnings:
drivers/gpu/drm/drm_bridge.c:1242: warning: Function parameter or struct
member 'connector' not described in 'drm_bridge_detect'
Fixes: 5d156a9c3d5e ("drm/bridge: Pass down connector to drm bridge detect
hook")
Signed-off-by: Andy Yan
---
drivers/gpu/drm/dr
Hi all,
At 2025-07-16 18:31:15, "Stephen Rothwell" wrote:
>Hi all,
>
>After merging the drm-misc tree, today's linux-next build (htmldocs)
>produced this warning:
>
>drivers/gpu/drm/drm_bridge.c:1242: warning: Function parameter or struct
>member 'connector' not described in 'drm_bridge_detect
On Wed, 16 Jul 2025 09:36:01 +, 陈涛涛 Taotao Chen wrote:
> From: Taotao Chen
>
> This patch series refactors the address_space_operations write_begin()
> and write_end() callbacks to take const struct kiocb * as their first
> argument, allowing IOCB flags such as IOCB_DONTCACHE to propagate to
From: Taotao Chen
Change the address_space_operations callbacks write_begin() and
write_end() to take struct kiocb * as the first argument instead of
struct file *.
Update all affected function prototypes, implementations, call sites,
and related documentation across VFS, filesystems, and block
From: Taotao Chen
This patch series refactors the address_space_operations write_begin()
and write_end() callbacks to take const struct kiocb * as their first
argument, allowing IOCB flags such as IOCB_DONTCACHE to propagate to the
filesystem's buffered I/O path.
Ext4 is updated to implement han
From: Taotao Chen
Add write_begin_get_folio() to simplify the common folio lookup logic
used by filesystem ->write_begin() implementations.
This helper wraps __filemap_get_folio() with common flags such as
FGP_WRITEBEGIN, conditional FGP_DONTCACHE, and set folio order based
on the write length.
From: Taotao Chen
Replace the write_begin/write_end loop in
i915_gem_object_create_shmem_from_data() with call to kernel_write().
This function initializes shmem-backed GEM objects. kernel_write()
simplifies the code by removing manual folio handling.
Part of a series refactoring address_space_
From: Taotao Chen
Refactors shmem_pwrite() to replace the ->write_begin/end logic
with a write_iter-based implementation using kiocb and iov_iter.
While kernel_write() was considered, it caused about 50% performance
regression. vfs_write() is not exported for kernel use. Therefore,
file->f_op->w
From: Taotao Chen
Set FOP_DONTCACHE in ext4_file_operations to declare support for
uncached buffered I/O.
To handle this flag, update ext4_write_begin() and ext4_da_write_begin()
to use write_begin_get_folio(), which encapsulates FGP_DONTCACHE logic
based on iocb->ki_flags.
Part of a series ref
Currently the job free work item will lock sched->job_list_lock first time
to see if there are any jobs, free a single job, and then lock again to
decide whether to re-queue itself if there are more finished jobs.
Since drm_sched_get_finished_job() already looks at the second job in the
queue we c
The "skip reset" test waits for the timeout handler to run for the
duration of 2 * MOCK_TIMEOUT, and because the mock scheduler opted to
remove the "skip reset" flag once it fires, this gives opportunity for the
timeout handler to run twice. Second time the job will be removed from the
mock schedul
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Philipp,
Thank you for the review. I found that this optimization was introduced 9 years
ago in commit 777dbd458c89d4ca74a659f85ffb5bc817f29a35 ("drm/amdgpu: drop a
dummy wakeup scheduler").
Given that the codebase has undergone signi
From: Andy Yan
The DW DP TX Controller is compliant with the DisplayPort Specification
Version 1.4 with the following features:
* DisplayPort 1.4a
* Main Link: 1/2/4 lanes
* Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps
* AUX channel 1Mbps
* Single Stream Transport(SST)
* Multistream
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Philipp, Christian,
I modified the commit msg as:
drm/sched: Remove optimization that causes hang when killing dependent jobs
When application A submits jobs and application B submits a job with a
dependency on A's fence, the normal fl
From: Andy Yan
Add driver extension for Synopsys DesignWare DPTX IP used
on Rockchip RK3588 SoC.
Signed-off-by: Andy Yan
Acked-by: Dmitry Baryshkov
Tested-by: Nicolas Frattaroli
---
(no changes since v4)
Changes in v4:
- Drop unused function
- Add platform_set_drvdata
Changes in v2:
- no
From: Andy Yan
The DP1 is compliant with the DisplayPort Specification
Version 1.4, and share the USBDP combo PHY1 with USB 3.1
HOST1 controller.
Signed-off-by: Andy Yan
---
(no changes since v1)
.../arm64/boot/dts/rockchip/rk3588-extra.dtsi | 30 +++
1 file changed, 30 inser
From: Andy Yan
The Rockchip RK3588 SoC integrates the Synopsys DesignWare DPTX
controller. And this DPTX controller need share a USBDP PHY with
the USB 3.0 OTG controller during operation.
Signed-off-by: Andy Yan
Reviewed-by: Rob Herring (Arm)
---
(no changes since v2)
Changes in v2:
- Link
From: Andy Yan
Enable the Mini DisplayPort on this board.
Note that ROCKCHIP_VOP2_EP_DP0 is defined as 10 in dt-binding header,
but it will trigger a dtc warning like "graph node unit address error,
expected "a"" if we use it directly after endpoint, so we use "a"
instead here.
Signed-off-by: An
From: Andy Yan
RA620 is a DP to HDMI bridge converter from RADXA, which first
found be used on ROCK 5 ITX.
This chip can be used without involving software.
Signed-off-by: Andy Yan
Acked-by: Krzysztof Kozlowski
---
(no changes since v3)
Changes in v3:
- First introduced in this version.
From: Andy Yan
The HDMI0(Port next to Headphone Jack) is drived by DP1 on rk3588
via RA620(a dp2hdmi converter).
Add related dt nodes to enable it.
Note: ROCKCHIP_VOP2_EP_DP1 is defined as 11 in dt-binding header,
but it will trigger a dtc warning like "graph node unit address
error, expected "
From: Andy Yan
The DP0 is compliant with the DisplayPort Specification
Version 1.4, and share the USBDP combo PHY0 with USB 3.1
HOST0 controller.
Signed-off-by: Andy Yan
---
(no changes since v1)
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 +++
1 file changed, 30 inser
From: Andy Yan
There are two DW DPTX based DisplayPort Controller on rk3588 which
are compliant with the DisplayPort Specification Version 1.4 with
the following features:
* DisplayPort 1.4a
* Main Link: 1/2/4 lanes
* Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps
* AUX channel 1Mbps
From: Andy Yan
Add an entry for the DW DPTX Controller bridge driver.
Signed-off-by: Andy Yan
---
Changes in v5:
- First included in this version.
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ee2ef9d9db2ab..f0552f7075c62 100644
---
From: Andy Yan
The RA620 is an active DP to HDMI converter chip, basically
no software is involved to drive it.
Add it to simple bridge to make it can be find by the drm bridge chain.
Signed-off-by: Andy Yan
Reviewed-by: Dmitry Baryshkov
---
(no changes since v3)
Changes in v3:
- First int
On Wed, 2025-07-16 at 13:15 +0200, Greg Kroah-Hartman wrote:
> On Wed, Jul 16, 2025 at 12:58:28PM +0200, Christian König wrote:
> > On 16.07.25 12:46, Philipp Stanner wrote:
> > > +Cc Greg, Sasha
> > >
> > > On Wed, 2025-07-16 at 12:40 +0200, Michel Dänzer wrote:
> > > > On 16.07.25 11:57, Philipp
On 7/16/2025 4:31 PM, Christian König wrote:
On 16.07.25 12:47, Christian König wrote:
On 16.07.25 12:28, Arunpravin Paneer Selvam wrote:
Hi Dave,
I am trying to push this series into drm-misc-fixes, but I get the below error
when dim push-branch drm-misc-fixes.
dim:ERROR:e24c180b4300("drm
Currently the domain ids are added for each instance of domains, this is
totally not scalable approach. Clean this mess and create domain ids for
only domains not its instances.
Co-developed-by: Srinivas Kandagatla
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Ling Xu
---
drivers/misc/fast
Some platforms (like sa8775p) feature one or more GPDSPs (General
Purpose DSPs). Similar to other kinds of Hexagon DSPs, they provide
a FastRPC implementation, allowing code execution in both signed and
unsigned protection domains. Extend the checks to allow domain names
starting with "gdsp" (possi
Add GDSP0 and GDSP1 fastrpc compute-cb nodes for sa8775p SoC.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
Signed-off-by: Ling Xu
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 57 +++
1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa87
Domain ID in the uAPI is misleading. Remove checks and log messages
related to 'domain' field in capability structure. Update UAPI to
mark the field as unused.
Signed-off-by: Ling Xu
---
drivers/misc/fastrpc.c | 14 +-
include/uapi/misc/fastrpc.h | 2 +-
2 files changed, 2 inse
The fastrpc driver has support for 5 types of remoteprocs. There are
some products which support GDSP remoteprocs. GDSP is General Purpose
DSP where tasks can be offloaded. Add fastrpc nodes and task offload
support for GDSP. Also strict domain IDs for domain.
Patch [v9]:
https://lore.kernel.org/l
There are some products which support GDSP remoteprocs. GDSP is General
Purpose DSP where tasks can be offloaded. There are 2 GDSPs named gdsp0
and gdsp1. Add "gdsp0" and "gdsp1" as the new supported labels for GDSP
fastrpc domains.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Ling Xu
---
Docum
Hi Tvrtko,
On 16/07/25 05:51, Tvrtko Ursulin wrote:
Currently the job free work item will lock sched->job_list_lock first time
to see if there are any jobs, free a single job, and then lock again to
decide whether to re-queue itself if there are more finished jobs.
Since drm_sched_get_finished_
Convert the tidss encoder to use devm_drm_bridge_alloc(). Instead of
allocating the memory by drmm_simple_encoder_alloc() use
devm_drm_bridge_alloc() and initialize the encoder afterwards.
Fixes: a7748dd127ea ("drm/bridge: get/put the bridge reference in
drm_bridge_add/remove()")
Signed-off-by: M
On 16/07/2025 14:31, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 05:51, Tvrtko Ursulin wrote:
Currently the job free work item will lock sched->job_list_lock first
time
to see if there are any jobs, free a single job, and then lock again to
decide whether to re-queue itself if there are more f
On Wed, 2025-07-16 at 11:05 -0300, Maíra Canal wrote:
> Hi Tvrtko,
>
> On 16/07/25 10:41, Tvrtko Ursulin wrote:
> >
> > On 16/07/2025 13:47, Maíra Canal wrote:
> > > Hi Tvrtko,
> > >
> > > On 16/07/25 05:48, Tvrtko Ursulin wrote:
> > > > The "skip reset" test waits for the timeout handler to run
Hi Tvrtko,
On 16/07/25 11:13, Tvrtko Ursulin wrote:
On 16/07/2025 15:05, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 10:41, Tvrtko Ursulin wrote:
On 16/07/2025 13:47, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 05:48, Tvrtko Ursulin wrote:
The "skip reset" test waits for the timeout handler
On Wed, Jul 16, 2025 at 02:26:26PM +, Usyskin, Alexander wrote:
> > > > > + if (bytes < sizeof(rsp)) {
> > > > > + dev_err(dev, "bad response from the firmware: size %zd <
> > > > %zu\n",
> > > > > + bytes, sizeof(rsp));
> > > > > + ret = -EPROTO;
On 16/07/2025 15:30, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 10:49, Tvrtko Ursulin wrote:
On 16/07/2025 14:31, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 05:51, Tvrtko Ursulin wrote:
Currently the job free work item will lock sched->job_list_lock
first time
to see if there are any jobs,
Reduce to one spin_unlock for hopefully a little bit clearer flow in the
function. It may appear that there is a behavioural change with the
drm_sched_start_timeout_unlocked() now not being called if there were
initially no jobs on the pending list, and then some appeared after
unlock, however if t
On Tue, Jul 15, 2025 at 05:59:44PM -0500, Dan Carpenter wrote:
> The fwnode_create_software_node() function returns error pointers. It
> never returns NULL. Update the checks to match.
>
> Fixes: f0e53aadd702 ("drm/xe: Support for I2C attached MCUs")
Reviewed-by: Rodrigo Vivi
and pushing soon
On 7/16/25 5:00 PM, Dmitry Baryshkov wrote:
> On Wed, Jul 16, 2025 at 06:58:34PM +0530, Ling Xu wrote:
>> Domain ID in the uAPI is misleading. Remove checks and log messages
>> related to 'domain' field in capability structure. Update UAPI to
>> mark the field as unused.
>>
>> Signed-off-by: Ling X
On 7/16/25 3:22 AM, Maxime Ripard wrote:
Hi Mario,
On Mon, Jul 14, 2025 at 04:21:46PM -0500, Mario Limonciello wrote:
From: Mario Limonciello
On systems with multiple GPUs there can be uncertainty which GPU is the
primary one used to drive the display at bootup. In order to disambiguate
this
On Wed, Jul 16, 2025 at 05:21:20PM +0200, Konrad Dybcio wrote:
> On 7/16/25 5:00 PM, Dmitry Baryshkov wrote:
> > On Wed, Jul 16, 2025 at 06:58:34PM +0530, Ling Xu wrote:
> >> Domain ID in the uAPI is misleading. Remove checks and log messages
> >> related to 'domain' field in capability structure.
Hi
Am 16.07.25 um 17:06 schrieb Maxime Ripard:
Hi Thomas,
On Mon, Jul 14, 2025 at 01:02:33PM +0200, Thomas Zimmermann wrote:
Hi
Am 25.06.25 um 17:14 schrieb Maxime Ripard:
For some reason, the HDMI VSDBs in our kunit EDIDs had a length longer
than expected.
While this was harmless, we shoul
On Thu, 10 Jul 2025 23:31:11 -0500, Anusha Srivatsa wrote:
> Use the new API devm_drm_panel_alloc() for panel allocations.
> A major chunk of driver conversion was sent in a 3 part series
> which is already merged. The coccinelle patch that was used to
> identify unsafe panel allocations didnt flag
The AM62P and AM67A/J722S feature the same BXS-4 GPU as the J721S2.
In theory, one have to just add the DT node. But it turns out, that
the clock handling is not working. If I understood Nishan Menon
correct, it is working on the J721S2 because there, the clock is
shared, while on the AM62P the GPU
The AM62P and the J722S features the same BXS-4 GPU as the J721S2. Add a
new SoC specific compatible.
Signed-off-by: Michael Walle
---
Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpu/img,powerv
The J722S won't let you set the clock frequency if there is no device
using it. Thus, the assigned-clocks property won't work per se.
As a workaround, set the clock again during the probing of the driver.
Signed-off-by: Michael Walle
---
drivers/gpu/drm/imagination/pvr_device.c | 9 +
1
The J722S features a BXS-4 GPU. Add the node for it.
Signed-off-by: Michael Walle
---
.../boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am62p-j
On 16/07/2025 13:47, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 05:48, Tvrtko Ursulin wrote:
The "skip reset" test waits for the timeout handler to run for the
duration of 2 * MOCK_TIMEOUT, and because the mock scheduler opted to
Would it make any sense to wait for 1.5 * MOCK_TIMEOUT? This w
Hi Tvrtko,
On 16/07/25 10:41, Tvrtko Ursulin wrote:
On 16/07/2025 13:47, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 05:48, Tvrtko Ursulin wrote:
The "skip reset" test waits for the timeout handler to run for the
duration of 2 * MOCK_TIMEOUT, and because the mock scheduler opted to
Would it
On Wed, Jul 16, 2025 at 04:11:27PM +0200, Philipp Stanner wrote:
> On Wed, 2025-07-16 at 14:05 +0200, Greg Kroah-Hartman wrote:
> > On Wed, Jul 16, 2025 at 01:32:42PM +0200, Philipp Stanner wrote:
> > > On Wed, 2025-07-16 at 13:15 +0200, Greg Kroah-Hartman wrote:
> > > > On Wed, Jul 16, 2025 at 12:
> Subject: Re: [PATCH 2/9] mei: late_bind: add late binding component driver
>
> On Wed, Jul 16, 2025 at 11:58:19AM +, Usyskin, Alexander wrote:
> > > Subject: Re: [PATCH 2/9] mei: late_bind: add late binding component driver
> > >
> > > On Thu, Jul 10, 2025 at 11:08:33AM -0400, Rodrigo Vivi w
On Sat, Jul 05, 2025 at 10:58:03AM +0800, jiang.pe...@zte.com.cn wrote:
> From: Peng Jiang
>
> Fix kernel-doc descriptions in virtio_dma_buf.c to fix W=1 warnings:
>
> drivers/virtio/virtio_dma_buf.c:41 function parameter 'dma_buf' not described
> in 'virtio_dma_buf_attach'
> drivers/virtio/vir
On Wed, 2025-07-16 at 14:05 +0200, Greg Kroah-Hartman wrote:
> On Wed, Jul 16, 2025 at 01:32:42PM +0200, Philipp Stanner wrote:
> > On Wed, 2025-07-16 at 13:15 +0200, Greg Kroah-Hartman wrote:
> > > On Wed, Jul 16, 2025 at 12:58:28PM +0200, Christian König wrote:
> > > > On 16.07.25 12:46, Philipp
On 16/07/2025 15:05, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 10:41, Tvrtko Ursulin wrote:
On 16/07/2025 13:47, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 05:48, Tvrtko Ursulin wrote:
The "skip reset" test waits for the timeout handler to run for the
duration of 2 * MOCK_TIMEOUT, and beca
Hi Tvrtko,
On 16/07/25 10:49, Tvrtko Ursulin wrote:
On 16/07/2025 14:31, Maíra Canal wrote:
Hi Tvrtko,
On 16/07/25 05:51, Tvrtko Ursulin wrote:
Currently the job free work item will lock sched->job_list_lock first
time
to see if there are any jobs, free a single job, and then lock again to
Am Sonntag, 13. Juli 2025, 10:38:58 Mitteleuropäische Sommerzeit schrieb Tomeu
Vizoso:
> See Chapter 36 "RKNN" from the RK3588 TRM (Part 1).
>
> The IP is divided in three cores, programmed independently. The first
> core though is special, being able to delegate work to the other cores.
>
> The
On Wed, Jul 16, 2025 at 06:58:34PM +0530, Ling Xu wrote:
> Domain ID in the uAPI is misleading. Remove checks and log messages
> related to 'domain' field in capability structure. Update UAPI to
> mark the field as unused.
>
> Signed-off-by: Ling Xu
> ---
> drivers/misc/fastrpc.c | 14 +
Hi Thomas,
On Mon, Jul 14, 2025 at 01:02:33PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 25.06.25 um 17:14 schrieb Maxime Ripard:
> > For some reason, the HDMI VSDBs in our kunit EDIDs had a length longer
> > than expected.
> >
> > While this was harmless, we should get rid of it to make it som
On Wed, Jul 16, 2025 at 06:58:35PM +0530, Ling Xu wrote:
> Currently the domain ids are added for each instance of domains, this is
> totally not scalable approach. Clean this mess and create domain ids for
> only domains not its instances.
>
> Co-developed-by: Srinivas Kandagatla
> Signed-off-by
Hi,
On Tue, Jul 15, 2025 at 10:32 PM Brigham Campbell
wrote:
>
> On Mon Jul 14, 2025 at 3:46 PM MDT, Doug Anderson wrote:
> > Hi,
> >
> > On Tue, Jul 8, 2025 at 12:39 AM Brigham Campbell
> > wrote:
> >>
> >> Update jdi-lpm102a188a panel driver to use the "multi" variant of MIPI
> >> functions i
On 15/07/2025 16:33, Caterina Shablia wrote:
> El martes, 15 de julio de 2025 17:08:09 (hora de verano de Europa central),
> Caterina Shablia escribió:
>> El viernes, 11 de julio de 2025 15:30:21 (hora de verano de Europa central),
>> Steven Price escribió:
>>> On 07/07/2025 18:04, Caterina Shabli
On 15/07/2025 17:09, Caterina Shablia wrote:
> El martes, 15 de julio de 2025 17:08:09 (hora de verano de Europa central),
> Caterina Shablia escribió:
>> El viernes, 11 de julio de 2025 15:30:21 (hora de verano de Europa central),
>> Steven Price escribió:
>>> On 07/07/2025 18:04, Caterina Shabli
On 15/07/2025 16:17, Caterina Shablia wrote:
> El viernes, 11 de julio de 2025 16:03:26 (hora de verano de Europa central),
> Steven Price escribió:
>> On 07/07/2025 18:04, Caterina Shablia wrote:
>>> From: Boris Brezillon
>>>
>>> This allows us to optimize mapping of a relatively small
>>> porti
On Tue, Jul 15, 2025 at 4:07 AM Krzysztof Kozlowski wrote:
> On Mon, Jul 14, 2025 at 06:18:01PM -0400, Richard Yao wrote:
> > +static const struct ili9881c_desc txw700100s0_desc = {
> > + .init = txw700100s0_init,
> > + .init_length = ARRAY_SIZE(txw700100s0_init),
> > + .mode = &txw70
inb/outb speccial wire not support on other ARCH.
Should detect whether arch platform support or not.
Signed-off-by: zhangzhijie
---
drivers/gpu/drm/i915/display/intel_vga.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c
b/drivers/gpu/drm/i9
On Mon, Jul 14, 2025 at 21:51, Rob Clark wrote:
>
> On Mon, Jul 14, 2025 at 10:36 AM Dale Whinham wrote:
> >
> > From: Jérôme de Bretagne
> >
> > The OLED display in the Surface Pro 11 reports a maximum link rate of
> > zero in its DPCD, causing it to fail to probe correctly.
> >
> > The Surface
On Tue, Jul 15 2025 12:45:00 +0200 Krzysztof Kozlowski wrote:
>You should disclose that you used some AI tool for that... and that
>other report(s) was really fake finding. People should know you
>generated it with AI, so they could make informed decision whether to
>even allocate time here.
Alth
On Tue, Jul 15 2025 12:44:40 +0200 Krzysztof Kozlowski wrote:
>You should disclose that you used some AI tool for that... and that
>other report(s) was really fake finding. People should know you
>generated it with AI, so they could make informed decision whether to
>even allocate time here.
Alt
On Wed Jul 16, 2025 at 12:05 PM CEST, lin cao wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
Two small off-topic remarks from my side. :)
Can you please remove "AMD Official Use Only" header when sending to public
mailing lists? Otherwise people may have to delete your mails un
Javier Martinez Canillas writes:
> This patch-series adds support for the Sitronix ST7567 Controller, which is a
> monochrome Dot Matrix LCD Controller that has SPI, I2C and parallel
> interfaces.
>
> The st7571-i2c driver only has support for I2C so displays using other
> transport
> interface
Hi all,
Today's linux-next merge of the rust tree got a conflict in:
rust/kernel/drm/gem/mod.rs
between commit:
917b10d90990 ("drm: rust: rename as_ref() to from_raw() for drm constructors")
from the drm-misc tree and commit:
8802e1684378 ("rust: types: add Opaque::cast_from")
from the
Hi Dave,
I am trying to push this series into drm-misc-fixes, but I get the below
error when dim push-branch drm-misc-fixes.
dim:ERROR:e24c180b4300("drm/amdgpu:Reset the clear flag in buddy during
resume"): Mandatory Maintainer Acked-by missing., aborting
Looks like maintainers Acked-by is
On 16.07.25 11:43, cao, lin wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
>
> Hi Philipp,
>
> Thank you for the review. I found that this optimization was introduced 9
> years ago in commit 777dbd458c89d4ca74a659f85ffb5bc817f29a35 ("drm/amdgpu:
> drop a dummy wakeup sched
On 7/15/25 7:28 PM, Dmitry Baryshkov wrote:
> Fix c&p error in dpu_plane_virtual_atomic_check(), compare CRTC width
> too, in addition to CRTC height.
>
> Fixes: 8c62a31607f6 ("drm/msm/dpu: allow using two SSPP blocks for a single
> plane")
> Reported-by: kernel test robot
> Closes:
> https://l
On 16.07.25 11:57, Philipp Stanner wrote:
> On Wed, 2025-07-16 at 09:43 +, cao, lin wrote:
>>
>> Hi Philipp,
>>
>>
>> Thank you for the review. I found that this optimization was
>> introduced 9 years ago in commit
>> 777dbd458c89d4ca74a659f85ffb5bc817f29a35 ("drm/amdgpu: drop a dummy
>> wakeup
On 16.07.25 12:13, Danilo Krummrich wrote:
> On Wed Jul 16, 2025 at 12:05 PM CEST, lin cao wrote:
>> [AMD Official Use Only - AMD Internal Distribution Only]
>
> Two small off-topic remarks from my side. :)
>
> Can you please remove "AMD Official Use Only" header when sending to public
> mailing
+Cc Greg, Sasha
On Wed, 2025-07-16 at 12:40 +0200, Michel Dänzer wrote:
> On 16.07.25 11:57, Philipp Stanner wrote:
> > On Wed, 2025-07-16 at 09:43 +, cao, lin wrote:
> > >
> > > Hi Philipp,
> > >
> > >
> > > Thank you for the review. I found that this optimization was
> > > introduced 9 ye
On 16.07.25 12:28, Arunpravin Paneer Selvam wrote:
> Hi Dave,
>
> I am trying to push this series into drm-misc-fixes, but I get the below
> error when dim push-branch drm-misc-fixes.
>
> dim:ERROR:e24c180b4300("drm/amdgpu:Reset the clear flag in buddy during
> resume"): Mandatory Maintainer Ac
On 16.07.25 12:46, Philipp Stanner wrote:
> +Cc Greg, Sasha
>
> On Wed, 2025-07-16 at 12:40 +0200, Michel Dänzer wrote:
>> On 16.07.25 11:57, Philipp Stanner wrote:
>>> On Wed, 2025-07-16 at 09:43 +, cao, lin wrote:
Hi Philipp,
Thank you for the review. I found that th
On 16.07.25 12:47, Christian König wrote:
> On 16.07.25 12:28, Arunpravin Paneer Selvam wrote:
>> Hi Dave,
>>
>> I am trying to push this series into drm-misc-fixes, but I get the below
>> error when dim push-branch drm-misc-fixes.
>>
>> dim:ERROR:e24c180b4300("drm/amdgpu:Reset the clear flag in b
Hi Christian,
On 7/16/2025 4:17 PM, Christian König wrote:
On 16.07.25 12:28, Arunpravin Paneer Selvam wrote:
Hi Dave,
I am trying to push this series into drm-misc-fixes, but I get the below error
when dim push-branch drm-misc-fixes.
dim:ERROR:e24c180b4300("drm/amdgpu:Reset the clear flag i
On Wed, Jul 16, 2025 at 12:58:28PM +0200, Christian König wrote:
> On 16.07.25 12:46, Philipp Stanner wrote:
> > +Cc Greg, Sasha
> >
> > On Wed, 2025-07-16 at 12:40 +0200, Michel Dänzer wrote:
> >> On 16.07.25 11:57, Philipp Stanner wrote:
> >>> On Wed, 2025-07-16 at 09:43 +, cao, lin wrote:
>
On Wed, Jul 16, 2025 at 12:46:21PM +0200, Philipp Stanner wrote:
> +Cc Greg, Sasha
>
> On Wed, 2025-07-16 at 12:40 +0200, Michel Dänzer wrote:
> > On 16.07.25 11:57, Philipp Stanner wrote:
> > > On Wed, 2025-07-16 at 09:43 +, cao, lin wrote:
> > > >
> > > > Hi Philipp,
> > > >
> > > >
> > >
Give TTM BOs a separate cleanup function.
No funktional change, but the next step in removing the TTM BO reference
counting and replacing it with the GEM object reference counting.
v2: move the code around a bit to make it clearer what's happening
Signed-off-by: Christian König
---
drivers/gpu
On Sat, Jul 12, 2025 at 07:27:42PM +0100, Srinivas Kandagatla wrote:
>
>
> On 7/3/25 7:34 PM, Rob Herring (Arm) wrote:
> > Use the newly added of_reserved_mem_region_to_resource() function to
> > handle "memory-region" properties.
> >
> > The error handling is a bit different. "memory-region" is
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