Drm_syncobj_array_find() helper is used from many userspace ioctl entry
points with the task of looking up userspace handles to internal objects.
We can easily avoid one temporary allocation by making it read the handles
as it is looking them up.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Maíra
There is no reason to queue just a single job if scheduler can take more
and re-queue the worker to queue more. We can simply feed the hardware
with as much as it can take in one go and hopefully win some latency.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthe
On Mon, Mar 24, 2025 at 10:17:05AM -0700, Doug Anderson wrote:
> On Mon, Mar 24, 2025 at 9:40 AM Laurent Pinchart wrote:
> > On Tue, Mar 18, 2025 at 10:00:31PM +0100, Wolfram Sang wrote:
> > > Hi Laurent,
> > >
> > > > > Read out and check the ID registers, so we can bail out if I2C
> > > > > commu
From: Aradhya Bhatia
Fix the OF node pointer passed to the of_drm_find_bridge() call to find
the next bridge in the display chain.
The code to find the next panel (and create its panel-bridge) works
fine, but to find the next (non-panel) bridge does not.
To find the next bridge in the pipeline,
Changes the boe-bf060y8m-aj0 panel to use multi style functions for
improved error handling. Additionally the MIPI_DSI_MODE_LPM flag is set
after the off commands are run in boe_bf060y8m_aj0_off regardless of any
failures.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Tejas Vipin
---
Changes in v
From: Andrzej Kacprowski
Add sysfs files that show maximum and current
frequency of the NPU's data processing unit.
New sysfs entries:
- npu_max_frequency_mhz
- npu_current_frequency_mhz
Signed-off-by: Andrzej Kacprowski
Signed-off-by: Maciej Falkowski
---
drivers/accel/ivpu/ivpu_hw.h |
Hi Dmitry,
On Sun, 30 Mar 2025 at 18:56, Dmitry Baryshkov
wrote:
>
> On Sun, Mar 30, 2025 at 06:49:40PM +0100, Christopher Obbard wrote:
> > According to the eDP specification (VESA Embedded DisplayPort Standard
> > v1.4b, Section 3.3.10.2), if the value of DP_EDP_PWMGEN_BIT_COUNT is
> > less tha
On Wed, 2 Apr 2025 at 05:47, Jani Nikula wrote:
>
> Another go at hiding the turds.
The patches look sane to me.
I didn't _test_ them - because that's not how I roll - but they look
like they would do the right thing and not interfere with my odd TAB
lifestyle (I say "odd", because apparently I'
struct ddebug_class_param keeps a ref to the state-storage of the
param; make both class-types use the same unsigned long storage type.
ISTM this is simpler and safer; it avoids an irrelevant difference,
and if 2 users somehow get class-type mixed up (or refer to the wrong
union member), at least
Merge the mode-init functions of ofdrm and simpledrm to the new helper
drm_sysfb_mode(). Also implement the DPI defaults there. Replace the
code in each driver with the shared helper.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/gpu/drm/sysfb/drm_sysfb_help
Add a compatible string for the Renesas RZ/G3E SoC variants that
include a Mali-G52 GPU. These variants share the same restrictions on
interrupts, clocks, and power domains as the RZ/G2L SoC, so extend
the existing schema validation accordingly.
Signed-off-by: Tommaso Merciai
---
Documentation/d
Add additional information to each VM so they can report up to the first
50 seen faults. Only pagefaults are saved this way currently, though in
the future, all faults should be tracked by the VM for future reporting.
Additionally, of the pagefaults reported, only failed pagefaults are
saved this
When the device is coherent, panthor_gpu_coherency_init() will read
GPU_COHERENCY_FEATURES to make sure the GPU supports the ACE-Lite
coherency protocol, which will fail if the clocks/power-domains are
not enabled when the read is done. Move the
panthor_gpu_coherency_init() call after the device ha
The dp_perform_128b_132b_channel_eq_done_sequence() calls
dp_get_lane_status_and_lane_adjust() but lacks dp_decide_lane_settings().
The dp_get_lane_status_and_lane_adjust() and dp_decide_lane_settings()
functions are essential for DisplayPort link training in the Linux kernel,
with the former retri
While the cdns-dsi does not support DSI burst mode, the burst mode is
essentially DSI event mode with more versatile clocking and timings.
Thus cdns-dsi doesn't need to fail if the DSI peripheral driver requests
MIPI_DSI_MODE_VIDEO_BURST.
In my particular use case, this allows the use of ti-sn65ds
The eDP controller has an HPD GPIO. Describe it in the device tree
for the generic T14s model, as the HPD GPIO is used in both the
OLED and LCD models which inherit this device tree.
Signed-off-by: Christopher Obbard
---
arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi | 3 +++
1 file
On 3/30/25 06:59, Shengyu Qu wrote:
Hi,
Do we really need to disable cursor plane color pipeline support? I
don't think we need to disable that if it is supported, since there
might be some user-defined colored cursor icon.
This patch applies to AMD hardware only:
https://elixir.bootlin.
Add tests that exercise the new drm_xe_vm_get_property uapi,
specifically for ioctl input validation and for determining that
pagefaults are correctly tracked and returned by the reporter.
drm_xe_vm_get_property ioctl to be added by
https://patchwork.freedesktop.org/series/145529/
v2:
- Remove en
From: Derek Foreman
[ Upstream commit 1854df7087be70ad54e24b2e308d7558ebea9f27 ]
The code that changes hdmi->ref_clk was accidentally copied from
downstream code that sets a different clock. We don't actually
want to set any clock here at all.
Setting this clock incorrectly leads to incorrect t
Am 02.04.25 um 10:26 schrieb Tvrtko Ursulin:
> On 02/04/2025 07:49, Christian König wrote:
>>
>> First of all, impressive piece of work.
>
> Thank you!
>
> I am not super happy though, since what would be much better is some sort of
> a CFS. But to do that would require to crack the entity GPU tim
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-sony-td4353-jdi.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sony-td4353-jdi.c
b/drivers/gpu/dr
Move the calculation of the bits per pixels for screen_info into a
helper function. This will make it available to other callers besides
the firmware code.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/firmware/sysfb_simplefb.c | 31 +--
On Thu, Mar 27, 2025 at 11:47:24AM +, Xin Ji wrote:
> > > > > > > > > > > > > > > From: Dmitry Baryshkov
> > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > Sent: Thursday, February 13, 2025 9:04 PM
> > > > > > > > > > > > > > > To: Xin Ji
> > > > > > > > > > > > > > > Cc: Andrzej Haj
On 4/4/25 1:55 PM, Ayushi Makhija wrote:
> Add anx7625 DSI to DP bridge device nodes.
>
> Signed-off-by: Ayushi Makhija
> ---
[...]
> +
> + io_expander: gpio@74 {
> + compatible = "ti,tca9539";
> + reg = <0x74>;
> + interrupts-extended = <&tlmm 98 IRQ_TYP
Hi Steven,
On 3/31/25 8:15 AM, Steven Price wrote:
On 24/03/2025 18:57, Ariel D'Alessandro wrote:
Currently, Panfrost only supports MMU configuration in "LEGACY" (as
Bifrost calls it) mode, a (modified) version of LPAE "Large Physical
Address Extension", which in Linux we've called "mali_lpae".
Move ofdrm's struct ofdrm_crtc_state plus functions to sysfb
helpers and rename everything to drm_sysfb_crtc_state.
The sysfb CRTC state is a regular CRTC state with information on
the primary plane's color format, as required for color management.
Helpers for sysfb planes will later set this up a
Some GuC messages are constructed with incrementing dword counter
rather than referencing specific DWORDs, as described in GuC interface
specification.
This change introduces the definitions of DWORD numbers for parameters
which will need to be referenced in a CTB parser to be added in a
following
devm_kasprintf() returns NULL when memory allocation fails. Currently,
wled_configure() does not check for this case, which results in a NULL
pointer dereference.
Add NULL check after devm_kasprintf() to prevent this issue.
Fixes: f86b77583d88 ("backlight: pm8941: Convert to using %pOFn instead o
* Ingo Molnar (mi...@kernel.org) wrote:
>
> * li...@treblig.org wrote:
>
> > From: "Dr. David Alan Gilbert"
> >
> > The last use of iosf_mbi_unregister_pmic_bus_access_notifier() was
> > removed in 2017 by
> > commit a5266db4d314 ("drm/i915: Acquire PUNIT->PMIC bus for
> > intel_uncore_forcewa
On Fri, Apr 4, 2025 at 1:47 AM Christian König wrote:
>
> Hi Maxime,
>
> Am 03.04.25 um 17:47 schrieb Maxime Ripard:
> > On Thu, Apr 03, 2025 at 09:39:52AM +0200, Christian König wrote:
> >>> For the UMA GPU case where there is no device memory or eviction
> >>> problem, perhaps a configurable opt
Hi Anusha,
kernel test robot noticed the following build errors:
[auto build test ERROR on de04bb0089a96cc00d13b12cbf66a088befe3057]
url:
https://github.com/intel-lab-lkp/linux/commits/Anusha-Srivatsa/panel-orisetech-otm8009a-Use-refcounted-allocation-in-place-of-devm_kzalloc/20250404
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
b/drivers/
All events now start with the same prefix (drm_sched_job_).
drm_sched_job_wait_dep was misleading because it wasn't waiting
at all. It's now replaced by trace_drm_sched_job_unschedulable,
which is only traced if the job cannot be scheduled.
For moot dependencies, nothing is traced.
Signed-off-by:
On 20/03/2025 20:43, Matthew Brost wrote:
On Thu, Mar 20, 2025 at 05:30:01PM +, Matthew Auld wrote:
Pull the pages stuff from the svm range into its own substructure, with
the idea of having the main pages related routines, like get_pages(),
unmap_pages() and free_pages() all operating on so
From: sunliming
Fix below smatch warnings:
drivers/gpu/drm/vc4/vc4_gem.c:604 vc4_lock_bo_reservations() error:
uninitialized symbol 'ret'.
Reported-by: kernel test robot
Reported-by: Dan Carpenter
Closes: https://lore.kernel.org/r/202504021500.3am1hkks-...@intel.com/
Signed-off-by: sunliming
From: Andrew Wyatt
[ Upstream commit a860eb9c6ba6cdbf32e3e01a606556e5a90a2931 ]
Some GPD Win 2 units shipped with the correct DMI strings.
Add a DMI match to correctly rotate the panel on these units.
Signed-off-by: Andrew Wyatt
Signed-off-by: John Edwards
Tested-by: Paco Avelar
Reviewed-by
tiny/bochs has 5 DRM_UT_* debugs, make them controllable when
CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg that the module has
class'd debugs.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/tiny/bochs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/tiny/bochs.c b/drive
commit 47ea6f99d06e ("dyndbg: use ESCAPE_SPACE for cat control")
changed the control-file to display format strings with "\n" rather
than "\012". Update the docs to match the new reality.
Signed-off-by: Jim Cromie
Reviewed-by: Louis Chauvet
Tested-by: Louis Chauvet
---
-v2 fix missed \012's
---
Hi Anusha,
kernel test robot noticed the following build errors:
[auto build test ERROR on de04bb0089a96cc00d13b12cbf66a088befe3057]
url:
https://github.com/intel-lab-lkp/linux/commits/Anusha-Srivatsa/panel-orisetech-otm8009a-Use-refcounted-allocation-in-place-of-devm_kzalloc/20250404
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c
b/driv
MMU handler needs to be in control of the job interrupt clears because
clearing the interrupt also unblocks the writer/reader that triggered
the fault, and we don't want it to be unblocked until we've had a chance
to process the IRQ.
Since clearing the clearing is just one line, let's make it expl
Interrupts are automatically unmasked in
panthor_mmu_irq_threaded_handler() when the handler returns. Unmasking
prematurely might generate spurious interrupts if the IRQ line is
shared.
Changes in v2:
- New patch
Changes in v3:
- Add R-bs
Signed-off-by: Boris Brezillon
Reviewed-by: Liviu Dudau
Hello,
This is a collection of fixes for bugs found while working on adding
JM support to panthor. Those are not particularly tied to JM support
and are worth having regardless.
Note that the last two don't have Fixes tag because they fix issues
we can't really hit with the current implementation
On Fri, Mar 21 2025 at 12:16, Jocelyn Falempe wrote:
> kmap_local_page() can be unsafe to call from a panic handler, if
> CONFIG_HIGHMEM is set, and the page is in the highmem zone.
> So add kmap_local_page_try_from_panic() to handle this case.
I think this is a reasonable solution and the highmem
On 03/04/2025 22:23, Matthew Brost wrote:
On Fri, Mar 28, 2025 at 06:10:36PM +, Matthew Auld wrote:
We now use the same notifier lock for SVM and userptr, with that we can
combine xe_pt_userptr_pre_commit and xe_pt_svm_pre_commit.
Suggested-by: Matthew Brost
Signed-off-by: Matthew Auld
Cc
On 04/04/2025 09:09, Boris Brezillon wrote:
> MMU handler needs to be in control of the job interrupt clears because
> clearing the interrupt also unblocks the writer/reader that triggered
> the fault, and we don't want it to be unblocked until we've had a chance
> to process the IRQ.
>
> Since cl
The `size` argument in the `qxl_alloc_release_reserved` function is
currently unused and has no effect on the function's logic. So remove
this argument to clean up the code. No functional changes are expected.
Signed-off-by: Ryosuke Yasuoka
---
drivers/gpu/drm/qxl/qxl_display.c | 9 +++--
dr
We have several drivers open-coding an alloc-on-fault behavior, each
in a slightly different way. This is an attempt at generalizing the
implementation and allowing for real non-blocking allocations in the
fault handler, so we can finally stop violating one of the dma-fence
signalling rules: nothin
On 02/04/2025 14:37, Christian König wrote:
Am 02.04.25 um 15:22 schrieb Michel Dänzer:
On 2025-04-02 14:00, Philipp Stanner wrote:
On Wed, 2025-04-02 at 12:58 +0200, Michel Dänzer wrote:
On 2025-04-02 12:46, Philipp Stanner wrote:
On Mon, 2025-03-31 at 21:16 +0100, Tvrtko Ursulin wrote:
R
This patch series is a proposal for implementing sparse page allocations
for shmem objects. It was initially motivated by a kind of BO managed by
the Panfrost/Panthor and Lima drivers, the tiler heap, which grows on
demand every time the GPU faults on a virtual address within the heap BO
range.
Be
This will be used by the heap logic to allow for real non-blocking
allocations when growing the heap.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panthor/panthor_fw.c| 6 +++---
drivers/gpu/drm/panthor/panthor_gem.c | 7 ++-
drivers/gpu/drm/panthor/panthor_gem.h | 4 ++--
driv
Now that with have generic support for sparse shmem objects, use it
to simplify the code.
This has only been compile-tested, and we might want to consider using
NOWAIT gfp flags allocations happening in the fault handler path, but
I don't know the driver well enough to take that decision.
Signed-
From: Adrián Larumbe
This new API provides a way to partially populate/unpopulate a GEM
object, and also lets the caller specify the GFP flags to use for
the allocation.
This will help drivers that need to support sparse/alloc-on-demand
GEM objects.
Signed-off-by: Adrián Larumbe
---
drivers/g
This allows one to pre-allocate resources on a sparse BO to avoid
faulting when the GPU accesses the memory region. Will be used by
the heap logic to pre-populate a heap object with a predefined number
of chunks.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panthor/panthor_mmu.c | 25 +
On 02/04/2025 12:53, Christian König wrote:
Am 02.04.25 um 10:26 schrieb Tvrtko Ursulin:
On 02/04/2025 07:49, Christian König wrote:
First of all, impressive piece of work.
Thank you!
I am not super happy though, since what would be much better is some sort of a
CFS. But to do that would
On Thu, Apr 03, 2025 at 12:14:04PM -0400, Yury Norov wrote:
> On Thu, Apr 03, 2025 at 10:39:03PM +0800, Kuan-Wei Chiu wrote:
> > On Tue, Mar 25, 2025 at 12:43:25PM -0700, H. Peter Anvin wrote:
> > > On 3/23/25 08:16, Kuan-Wei Chiu wrote:
> > > >
> > > > Interface 3: Multiple Functions
> > > > Desc
Use gpiod_set_value_cansleep() instead of gpiod_set_value()
to fix the below call trace in the boot log:
[5.690534] Call trace:
[5.690536] gpiod_set_value+0x40/0xa4
[5.690540] anx7625_runtime_pm_resume+0xa0/0x324 [anx7625]
[5.690545] __rpm_callback+0x48/0x1d8
[5.690549] rpm
Document DSI controller and phy on SA8775P platform.
Signed-off-by: Ayushi Makhija
---
.../display/msm/qcom,sa8775p-mdss.yaml| 183 +-
1 file changed, 182 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml
b/D
The anx7625_link_bridge() checks if a device is not a panel
bridge and add DRM_BRIDGE_OP_HPD and DRM_BRIDGE_OP_DETECT to
the bridge operations. However, on port 1 of the anx7625
bridge, any device added is always treated as a panel
bridge, preventing connector_detect function from being
called. To
Hi Yuri & Kuan-Wei:
> Thank you for sharing your opinion on this fixed parity(). Your
> arguments may or may not be important, depending on what existing
> users actually need. Unfortunately, Kuan-Wei didn't collect
> performance numbers and opinions from those proposed users.
For the fsi-i2c sid
Hi Johan,
On Mon, 31 Mar 2025 at 09:33, Johan Hovold wrote:
>
> On Sun, Mar 30, 2025 at 08:31:07PM +0100, Christopher Obbard wrote:
> > According to the eDP specification (VESA Embedded DisplayPort Standard
> > v1.4b, Section 3.3.10.2), if the value of DP_EDP_PWMGEN_BIT_COUNT is
> > less than DP_
After the btrfs compressed bio discussion I think the hugetlb changes that
skip the tail pages are fundamentally unsafe in the current kernel.
That is because the bio_vec representation assumes tail pages do exist, so
as soon as you are doing direct I/O that generates a bvec starting beyond
the pr
On Fri, Apr 04, 2025 at 08:54:29AM +0100, Christopher Obbard wrote:
> On Mon, 31 Mar 2025 at 09:33, Johan Hovold wrote:
> > > @@ -4035,6 +4036,32 @@ drm_edp_backlight_probe_max(struct drm_dp_aux
> > > *aux, struct drm_edp_backlight_inf
> > > }
> > >
> > > pn &= DP_EDP_PWMGEN_BIT_COUN
Hi Andy,
kernel test robot noticed the following build errors:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on robh/for-next drm-exynos/exynos-drm-next linus/master
v6.14 next-20250404]
[cannot apply to drm/drm-next drm-intel/for-linux-next
drm-intel/for-linux-next-fixes
Add anx7625 DSI to DP bridge device nodes.
Signed-off-by: Ayushi Makhija
---
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 208 -
1 file changed, 207 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
b/arch/arm64/boot/dts/qcom/sa8775p-ride.
When device enters the suspend state, it prevents
HPD interrupts from occurring. To address this,
add an additional PM runtime vote in hpd_enable().
This vote is removed in hpd_disable().
Signed-off-by: Ayushi Makhija
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 18 ++
1 file
This series enables the support for DSI to DP bridge ports
(labled as DSI0 and DSI1) of the Qualcomm's SA8775P Ride platform.
SA8775P SoC has DSI controller v2.5.1 and DSI PHY v4.2.
The Ride platform is having ANX7625 DSI to DP bridge chip from Analogix.
---
This patch depends on following series
Document the DSI CTRL on the SA8775P Platform.
Signed-off-by: Ayushi Makhija
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetr
> On Apr 4, 2025, at 17:38, Muchun Song wrote:
>
>
>
>> On Apr 4, 2025, at 17:01, Christoph Hellwig wrote:
>>
>> After the btrfs compressed bio discussion I think the hugetlb changes that
>> skip the tail pages are fundamentally unsafe in the current kernel.
>>
>> That is because the bio_
From: Matt Atwood
[ Upstream commit 16016ade13f691da315fac7b23ebf1ab7b28b7ab ]
Update to current bspec table.
Bspec: 72574
Signed-off-by: Matt Atwood
Reviewed-by: Clint Taylor
Link:
https://patchwork.freedesktop.org/patch/msgid/20250128175102.45797-1-matthew.s.atw...@intel.com
Signed-off-by
When we clear the faulty bits in the AS mask, we also need to update
the panthor_mmu::irq::mask field otherwise our IRQ handler won't get
called again until the GPU is reset.
Changes in v2:
- Add Liviu's R-b
Changes in v3:
- Add Steve's R-b
Fixes: 647810ec2476 ("drm/panthor: Add the MMU/VM logic
Hi
Am 03.04.25 um 10:50 schrieb Boris Brezillon:
On Thu, 3 Apr 2025 09:20:00 +0200
Thomas Zimmermann wrote:
Hi
Am 02.04.25 um 15:21 schrieb Boris Brezillon:
On Wed, 2 Apr 2025 15:58:55 +0300
Dmitry Osipenko wrote:
On 4/2/25 15:47, Thomas Zimmermann wrote:
Hi
Am 22.03.25 um 22:26 schr
Am 04.04.25 um 10:27 schrieb Dan Carpenter:
> On Mon, Mar 31, 2025 at 02:02:44PM +0200, Christian König wrote:
>> Am 31.03.25 um 11:45 schrieb Dan Carpenter:
>>> Call dma_fence_put(fence) before returning an error on this error path.
>>>
>>> Fixes: 70e67aaec2f4 ("dma-buf/sw_sync: Add fence deadline
Hi Jeremy,
On Fri, Apr 04, 2025 at 10:51:55AM +0800, Jeremy Kerr wrote:
> Hi Yuri & Kuan-Wei:
>
> > Thank you for sharing your opinion on this fixed parity(). Your
> > arguments may or may not be important, depending on what existing
> > users actually need. Unfortunately, Kuan-Wei didn't collect
On Thu, 03 Apr 2025, Imre Deak wrote:
> On Fri, Apr 04, 2025 at 12:34:48AM +0530, shantam.yashas...@intel.com wrote:
>> From: Shantam Yashashvi
>>
>> Signed-off-by: Shantam Yashashvi
>> ---
>> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 11 +++
>> 1 file changed, 11 insertio
> On Apr 4, 2025, at 17:01, Christoph Hellwig wrote:
>
> After the btrfs compressed bio discussion I think the hugetlb changes that
> skip the tail pages are fundamentally unsafe in the current kernel.
>
> That is because the bio_vec representation assumes tail pages do exist, so
> as soon as
On 4/3/25 17:26, Dmitry Osipenko wrote:
> We switched to use refcount_t for vmaps and missed to change the vunmap
> code to properly unset the vmap pointer, which is now cleared while vmap's
> refcount > 0. Clear the cached vmap pointer only when refcounting drops to
> zero to fix the bug.
>
> Fix
Hi Rob, Dmitry,
On Tue, 2025-03-11 at 15:27 +, Zini, Alessandro wrote:
> > > The h/vsync-disable properties are used to control whether to use or
> > > not h/vsync signals, by configuring their pulse width to zero.
> > >
> > > This is required on some panels which are driven in DE-only mode b
On 3/26/25 01:00, James Flowers wrote:
msleep < 20ms will often sleep for ~20ms (according to
Documentation/timers/timers-howto.rst).
Can you elaborate and explain why this change is necessary?
Signed-off-by: James Flowers
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2
On 3/19/25 09:04, Anshuman Khandual wrote:
> On 3/19/25 07:16, Yury Norov wrote:
>> + Catalin Marinas, ARM maillist
>>
>> Hi Catalin and everyone,
>
> Hello Yury,
>
>>
>> Anshuman Khandual asked me to merge GENMASK_U128() saying it's
>> important for ARM to stabilize API. While it's a dead cod
Enable the connector's EDID property if edid_info contains valid
data. Exports the EDID via sysfs for user-space compositors.
EDID information is not always available. Depending on the system
and kernel configuration, it is either provided by the boot loader
or read by the kernel during early boot
If a parent device is supplied to tee_device_alloc(), copy the dma_mask
field into the new device. This avoids future warnings when mapping a
DMA-buf for the device.
Signed-off-by: Jens Wiklander
Reviewed-by: Sumit Garg
---
drivers/tee/tee_core.c | 2 ++
1 file changed, 2 insertions(+)
diff --
Johan,
On Fri, 4 Apr 2025 at 09:54, Johan Hovold wrote:
>
> On Fri, Apr 04, 2025 at 08:54:29AM +0100, Christopher Obbard wrote:
> > On Mon, 31 Mar 2025 at 09:33, Johan Hovold wrote:
>
> > > > @@ -4035,6 +4036,32 @@ drm_edp_backlight_probe_max(struct drm_dp_aux
> > > > *aux, struct drm_edp_backl
Inline drm_gem_pin() into its only caller drm_gem_map_attach()
and update the documentation in the callback's purpose. Do the
equivalent for drm_gem_unpin(). Also add stricter error checking
on the involved locking.
The pin operation in the GEM object functions is a helper for
PRIME-exported buffe
Add support for zpos, alpha and blend properties to RZ/G2L DU
driver as the IP supports all these properties.
It is tested by the below modetest commands:
modetest -M rzg2l-du -s 44@42:1920x1080@AR24 -d -P \
37@42:512x300+200+200@XR15
modetest -M rzg2l-du -w {32,37}:alpha:{0,65535}
modetest -M r
Gem-vram helpers do not support PRIME dma-buf sharing. No nothing
will ever call pin/unpin on its buffer objects. Do not set these
callbacks in struct drm_gem_object_funcs.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_gem_vram_helper.c | 37 ---
1 file changed
The pin and unpin callbacks in struct drm_gem_object_funcs are
for PRIME exported dma-bufs. Remove the pin calls in the client
code, drop the unnecessary pin callbacks from gem-vram and inline
drm_gem_pin() into the only remaining caller. Do the equivalent
for drm_gem_unpin().
AFAICT the long-term
Pin and vmap are two distict operations. Do not mix them.
The helper drm_client_buffer_vmap() maps the pages for fbdev-dma
and fbdev-shmem. In both cases, the vmap operation ensures that
the pages are available until the vunmap happens. And as the pages
in DMA or SHMEM areas cannot be moved, there
Sitronix ST7571 is a 4bit gray scale dot matrix LCD controller.
The controller has a SPI, I2C and 8bit parallel interface, this
driver is for the I2C interface only.
Signed-off-by: Marcus Folkesson
---
drivers/gpu/drm/tiny/Kconfig | 11 +
drivers/gpu/drm/tiny/Makefile | 1 +
drivers/
This series add support for the ST7571 LCD Controller.
It is a 4 gray scale dot matrix LCD controller that supports several
interfaces such as SPI, I2C and a 8bit parallell port.
This driver only supports the I2C interface, but all common parts could
easily be put into a common file to be used wit
From: Etienne Carriere
Add a userspace API to create a tee_shm object that refers to a dmabuf
reference.
Userspace registers the dmabuf file descriptor as in a tee_shm object.
The registration is completed with a tee_shm returned file descriptor.
Userspace is free to close the dmabuf file descr
Add support in the OP-TEE backend driver dynamic protected memory
allocation with FF-A.
The protected memory pools for dynamically allocated protected memory
are instantiated when requested by user-space. This instantiation can
fail if OP-TEE doesn't support the requested use-case of protected
mem
Add support in the OP-TEE backend driver for dynamic protected memory
allocation using the SMC ABI.
Signed-off-by: Jens Wiklander
---
drivers/tee/optee/smc_abi.c | 102 ++--
1 file changed, 85 insertions(+), 17 deletions(-)
diff --git a/drivers/tee/optee/smc_abi.
During probing of the OP-TEE driver, pass the parent device to
tee_device_alloc() so the dma_mask of the new devices can be updated
accordingly.
Signed-off-by: Jens Wiklander
Reviewed-by: Sumit Garg
---
drivers/tee/optee/ffa_abi.c | 8
drivers/tee/optee/smc_abi.c | 4 ++--
2 files chan
Implement DMA heap for protected DMA-buf allocation in the TEE
subsystem.
Restricted memory refers to memory buffers behind a hardware enforced
firewall. It is not accessible to the kernel during normal circumstances
but rather only accessible to certain hardware IPs or CPUs executing in
higher or
On Fri, Apr 04, 2025 at 10:09:29AM +0200, Boris Brezillon wrote:
> GPU_COHERENCY_ACE and GPU_COHERENCY_ACE_LITE definitions have been
> swapped.
>
> Changes in v2:
> - New patch
>
> Changes in v3:
> - Add Steve's R-b
>
> Reported-by: Liviu Dudau
> Fixes: 546b366600ef ("drm/panthor: Add GPU regi
Add tee_shm_alloc_cma_phys_mem() to allocate a physical memory using
from the default CMA pool. The memory is represented by a tee_shm object
using the new flag TEE_SHM_CMA_BUF to identify it as physical memory
from CMA.
Signed-off-by: Jens Wiklander
---
drivers/tee/Kconfig | 5
drive
-Wflex-array-member-not-at-end was introduced in GCC-14, and we are
getting ready to enable it, globally.
Adjust heap allocation to account for the flex-array-in-the-middle
issue, and refactor the rest of the code accordingly.
So, with these changes, fix the following warning:
drivers/gpu/drm/no
On Fri, 4 Apr 2025 11:26:30 +0200
Boris Brezillon wrote:
> diff --git a/include/uapi/drm/panthor_drm.h b/include/uapi/drm/panthor_drm.h
> index 97e2c4510e69..8071f1c438e2 100644
> --- a/include/uapi/drm/panthor_drm.h
> +++ b/include/uapi/drm/panthor_drm.h
> @@ -615,6 +615,16 @@ struct drm_pantho
1 - 100 of 254 matches
Mail list logo
