From: Jesse Zhang
[ Upstream commit 88a9a467c548d0b3c7761b4fd54a68e70f9c0944 ]
Initialize the size before calling amdgpu_vce_cs_reloc, such as case 0x0301.
V2: To really improve the handling we would actually
need to have a separate value of 0x.(Christian)
Signed-off-by: Jesse Zh
Hi Dave & Sima,
Here goes drm-intel-fixes towards v6.11-rc6.
Fix for USB type-C docks, backlight fix for Lenovo Yoga Tab 3 2G version
and ARL GuC firmware version correction.
Regards, Joonas
***
drm-intel-fixes-2024-08-29:
- Fix #11195: The external display connect via USB type-C dock stays b
From: Kunwu Chan
nested unlikely() calls, IS_ERR already uses unlikely() internally
Signed-off-by: Kunwu Chan
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm
On 28/08/2024 21:41, H. Nikolaus Schaller wrote:
> Hi all,
>
>> Am 28.08.2024 um 16:14 schrieb Hans Verkuil :
>>
>> On 28/08/2024 15:57, Tomi Valkeinen wrote:
>>> Hi,
>>>
>>> On 25/08/2024 23:31, H. Nikolaus Schaller wrote:
Hi,
CEC features are useful to e.g. control HDMI monitor standby
On 2024-08-28 19:42:51+, Helge Deller wrote:
> On 8/27/24 17:25, Thomas Weißschuh wrote:
> > These variables are only used inside efifb_probe().
> > Afterwards they are using memory unnecessarily.
>
> Did you check if this change really saves some memory?
Nope...
> With your change, the comp
On Wed, 28 Aug 2024 18:37:41 +0100
Mihail Atanassov wrote:
> On 28/08/2024 18:27, Boris Brezillon wrote:
> > On Wed, 28 Aug 2024 18:07:03 +0200
> > Boris Brezillon wrote:
> >
> >> On Wed, 28 Aug 2024 14:22:51 +0100
> >> Mihail Atanassov wrote:
> >>
> >>> Hi Boris,
> >>>
> >>> On 28/08/2024
On 2024/8/22 22:05, Mario Limonciello wrote:
> On 7/23/2024 04:42, Lu Yao wrote:
>> [Why]
>> When running kdump test on a machine with R7340 card, a hang is caused due
>> to the failure of 'amdgpu_device_ip_init()', error message as follows:
>>
>>'[drm:amdgpu_device_ip_init [amdgpu]] *ERROR* hw
> -Original Message-
> From: Intel-gfx On Behalf Of Nemesa
> Garg
> Sent: Monday, July 8, 2024 1:39 PM
> To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: Garg, Nemesa
> Subject: [1/5] drm: Introduce sharpness mode property
>
> Introduces the new crtc property "S
On Thu, Aug 22, 2024 at 08:42:50PM GMT, Jani Nikula wrote:
> Prefer the struct drm_edid based functions for reading the EDID and
> updating the connector.
>
> Signed-off-by: Jani Nikula
>
> ---
>
> Cc: Thierry Reding
> Cc: Mikko Perttunen
> Cc: Jonathan Hunter
> Cc: linux-te...@vger.kernel.o
On Tue, Aug 27, 2024 at 07:48:37PM -0700, Matthew Brost wrote:
> Add migrate_device_vma_range which prepares an array of pre-populated
> device pages for migration and issues a MMU invalidation.
>
> Cc: Andrew Morton
> Signed-off-by: Matthew Brost
> ---
> include/linux/migrate.h | 3 +++
> mm/
> -Original Message-
> From: Intel-gfx On Behalf Of Nemesa
> Garg
> Sent: Monday, July 8, 2024 1:39 PM
> To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: Garg, Nemesa
> Subject: [v4 2/5] drm/i915/display: Compute the scaler filter coefficients
>
> The sharpness
From: Thierry Reding
This reverts commit f790b5c09665cab0d51dfcc84832d79d2b1e6c0e. An updated
version of patch was applied to the PM tree. Sorry for the mixup.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/tegra/gr3d.c | 46 ++--
1 file changed, 33 insertion
On Wed, Aug 28, 2024 at 11:09:09AM +0100, Mihail Atanassov wrote:
> Do you have a link you can share with the userspace side of things? Assuming
> userland has been reviewed and is ready for merging, and the small nitpick
> above fixed,
>
> Reviewed-by: Mihail Atanassov
>
> --
> Mihail Atanasso
Hi, Matt.
Some initial design comments / questions:
On Tue, 2024-08-27 at 19:48 -0700, Matthew Brost wrote:
> This patch introduces support for GPU Shared Virtual Memory (SVM) in
> the
> Direct Rendering Manager (DRM) subsystem. SVM allows for seamless
> sharing of memory between the CPU and GPU
Add eDMA mode support for LPI2C.
There are some differences between TX DMA mode and RX DMA mode.
LPI2C MTDR register is Controller Transmit Data Register.
When lpi2c send data, it is tx cmd register and tx data fifo.
When lpi2c receive data, it is just a rx cmd register. LPI2C MRDR
register is Con
Am 28.08.24 um 18:06 schrieb Daniel Vetter:
On Tue, Aug 27, 2024 at 07:48:56PM -0700, Matthew Brost wrote:
Migration is implemented with range granularity, with VRAM backing being
a VM private TTM BO (i.e., shares dma-resv with VM). The lifetime of the
TTM BO is limited to when the SVM range is
On Wed, 28 Aug 2024, Harry Wentland wrote:
> On 2024-08-28 09:58, Alex Deucher wrote:
>> On Wed, Aug 28, 2024 at 9:53 AM Jani Nikula wrote:
>>>
>>> On Wed, 28 Aug 2024, Daniel Vetter wrote:
On Mon, Aug 12, 2024 at 03:23:12PM +0300, Jani Nikula wrote:
> Instead of just smashing jiffies i
Am 28.08.24 um 19:25 schrieb Mihail Atanassov:
Hello all,
This series implements a mechanism to expose Mali CSF GPUs' queue
ringbuffers directly to userspace, along with paraphernalia to allow
userspace to control job synchronisation between the CPU and GPU.
The goal of these changes is to allo
On Tue, Aug 27, 2024 at 07:48:38PM -0700, Matthew Brost wrote:
> This patch introduces support for GPU Shared Virtual Memory (SVM) in the
> Direct Rendering Manager (DRM) subsystem. SVM allows for seamless
> sharing of memory between the CPU and GPU, enhancing performance and
> flexibility in GPU c
Hi, Christian,
On Thu, 2024-08-29 at 11:24 +0200, Christian König wrote:
>
...
> > > - Unified eviction is required (SVM VRAM and TTM BOs need to be
> > > able to
> > > evict each other).
> > So core mm handles this by just roughly equally shrinking
> > everything.
> > Seems to work, and it
On Sun, 25 Aug 2024, Hans de Goede wrote:
> There are 2G and 4G RAM versions of the Lenovo Yoga Tab 3 X90F and it
> turns out that the 2G version has a DMI product name of
> "CHERRYVIEW D1 PLATFORM" where as the 4G version has
> "CHERRYVIEW C0 PLATFORM". The sys-vendor + product-version check are
On Wed, Aug 28, 2024 at 04:48:49PM GMT, Jinjie Ruan wrote:
> platform_get_resource_byname() and devm_ioremap_resource() can be
> replaced by devm_platform_ioremap_resource_byname(), which can
> simplify the code logic a bit, No functional change here.
NAK.
platform_get_resource_byname gets mdss_p
On Tue, Aug 27, 2024 at 07:48:57PM -0700, Matthew Brost wrote:
> Wire xe_bo_move to GPUSVM migration to SRAM with trylocking of mmap
> lock.
>
> Signed-off-by: Matthew Brost
> ---
> drivers/gpu/drm/xe/xe_bo.c | 35 +++-
> drivers/gpu/drm/xe/xe_bo_types.h | 3 ++
/20240822084342.1574914-5-link%40vivo.com
patch subject: [PATCH v4 4/5] udmabuf: udmabuf_create codestyle cleanup
config: x86_64-randconfig-161-20240829
(https://download.01.org/0day-ci/archive/20240829/202408291101.waf552sw-...@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
If you fix the issue
mit: 9651fbfb684e7a1288dbae3bf1f15cd484c0217a
change-id: 20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-d2d6b3eb1d57
Best regards,
--
Jun Nie
From: Jonathan Marek
Add support to DSI CTRL v2.8.0 with priority support
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 185d7de0bf376..
From: Jonathan Marek
For the bonded DSI case, DSC pic_width and timing calculations should use
the width of a single panel instead of the total combined width.
Bonded DSI can be used to drive a single panel having two input
channels, or to drive two panels with a input channel on every panel tha
Data width for dsc engine is aligned with pipe, not with whole screen
width. Because the width may be halved in DSI bonded case.
The dsc width is not related to the timing with back front porch in
later stage, so update dsc timing earlier.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/dsi/dsi_
From: Jonathan Marek
MSM display controller support multiple slice to be sent in a single DSC
packet. Add a dsc_slice_per_pkt field to mipi_dsi_device struct and
support this field in msm mdss driver.
Note that the removed "pkt_per_line = slice_per_intf * slice_per_pkt"
comment is incorrect.
Si
Add resource allocation type info.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index 15b42a6683639..
Add utility to get mixer number via CRTC handler
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 7 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 5 +
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/di
Do not assume DSC number as 2. Because there are 4 DSC in
quad pipe case.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dp
in case of multiple mixer pairs
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index a
request more mixer for the case that hdisplay exceeding 4096
and DSC enabled.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/driver
Add the case to reserve multiple pair mixer for high resolution
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 8 +++-
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dp
Support 4 mixers case with increasing array size and checking
the usage case.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 6 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 3 ++-
drivers/gpu/drm
Up to now the driver has been using encoder to allocate hardware resources.
Switch it to use CRTC id so that mixer number can be known in
dpu_plane_virtual_assign_resources() via CRTC id for sspp alloation.
Because the mixer allocation is done in drm_atomic_helper_check_modeset()
as part of CRTC o
Support 4 pipes and their configs at most. They are for 2 SSPP
and their multi-rect mode. Because one SSPP can co-work with
2 mixer at most, 2 pair of mixer are needed for 2 SSPP in quad-
pipe case. So 2 mixer configs are needed in quad-pipe case.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/d
Support quad-pipe in SSPP checking with unified method
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 108 ++
1 file changed, 51 insertions(+), 57 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm/disp/
Clip plane into SSPPs per left and right half screen per ROI if topology
is quad pipe. Then split the split rectangle by half if the clip
width still exceed limit.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 97 ++-
1 file changed, 71 insert
Support SSPP assignment for quad-pipe case with unified method
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 58 +--
1 file changed, 25 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/m
The first 2 fields in multirect_index and stage array are for the first
SSPP and its multi-rect. And the later 2 fields are for the 2nd SSPP
and its multi-rect.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 76 +++-
1 file changed, 55 insertion
Blend pipes by left and right. The first 2 pipes are for
left half screen and the later 2 pipes are for right in quad
pipe case.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 13 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 +++---
drivers/gpu/drm
There are 2 interface and 4 PP in quad pipe. Map the 2nd
interface to 3rd PP instead of the 2nd PP.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
Support quad pipe in general operations with unified method.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 87 +--
1 file changed, 47 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm
Unify debug info to support dual pipe and quad pipe
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 16 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 35 +--
2 files changed, 21 insertions(+), 30 deletions(-)
diff --git a/drivers/g
Hi, Christian,
I noticed that calling ttm_bo_pin() doesn't seem to move the resource
to the pinned list, but keeping it on its manager's LRU.
Is it the driver's responsibility to call ttm_bo_move_to_lru_tail() to
move it to the pinned list after pinning?
/Thomas
On Thu, 29 Aug 2024 at 13:19, Jun Nie wrote:
>
> From: Jonathan Marek
>
> Add support to DSI CTRL v2.8.0 with priority support
Proper description is missing
>
> Signed-off-by: Jun Nie
Several tags are missing here.
Also, how is this patch related to quadpipe?
> ---
> drivers/gpu/drm/msm/ds
On Thu, 29 Aug 2024 at 13:19, Jun Nie wrote:
>
> From: Jonathan Marek
>
> For the bonded DSI case, DSC pic_width and timing calculations should use
> the width of a single panel instead of the total combined width.
What is a "single panel"? Please rephrase the commit message so that
it reads log
On Thu, 29 Aug 2024 at 13:19, Jun Nie wrote:
>
> Data width for dsc engine is aligned with pipe, not with whole screen
> width. Because the width may be halved in DSI bonded case.
Can't really parse this.
>
> The dsc width is not related to the timing with back front porch in
> later stage, so u
On 28/08/2024 18:32, Doug Anderson wrote:
Hi,
On Wed, Aug 28, 2024 at 9:03 AM Neil Armstrong
wrote:
Make usage of the new _multi() mipi_dsi functions instead of the
deprecated macros, improving error handling and printing.
bloat-o-meter gives a 12% gain on arm64:
Function
On 28/08/2024 21:26, Doug Anderson wrote:
Hi,
On Wed, Aug 28, 2024 at 11:26 AM Tejas Vipin wrote:
Changes the novatek-nt35950 panel to use multi style functions for
improved error handling.
Reviewed-by: Neil Armstrong
Signed-off-by: Tejas Vipin
---
Changes in v2:
- Style changes
On Thu, Aug 29, 2024 at 11:53:58AM +0200, Thomas Hellström wrote:
> But as Sima pointed out in private communication, exhaustive eviction
> is not really needed for faulting to make (crawling) progress.
> Watermarks and VRAM trylock shrinking should suffice, since we're
> strictly only required to
On Thu, 29 Aug 2024 at 13:19, Jun Nie wrote:
>
> From: Jonathan Marek
>
> MSM display controller support multiple slice to be sent in a single DSC
> packet.
This is not MSM-specific. It is allowed per the standard.
> Add a dsc_slice_per_pkt field to mipi_dsi_device struct and
> support this fie
On Thu, 29 Aug 2024 at 13:19, Jun Nie wrote:
>
> Add resource allocation type info.
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 23 +++
> 1 file changed, 19 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
On Thu, 29 Aug 2024 at 13:19, Jun Nie wrote:
>
> Add utility to get mixer number via CRTC handler
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 7 +++
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 5 +
> 2 files changed, 12 insertions(+)
>
> diff --git a/dr
On Thu, 29 Aug 2024 at 13:20, Jun Nie wrote:
>
> Do not assume DSC number as 2. Because there are 4 DSC in
> quad pipe case.
Please expand the commit message. You prefer brevity, but your
comments lack clarifications.
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder
On Thu, 29 Aug 2024 at 13:20, Jun Nie wrote:
>
> request more mixer for the case that hdisplay exceeding 4096
> and DSC enabled.
This doesn't seem to match the code. And it misses the _reason_ to do it.
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 +++
On Thu, 29 Aug 2024 at 13:20, Jun Nie wrote:
>
> Add the case to reserve multiple pair mixer for high resolution
I think you already know what is missing here.
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
Hi,
On Wed, 28 Aug 2024 18:03:38 +0200, Neil Armstrong wrote:
> Switch to _multi() dsi functions and devm_regulator_bulk_get_const()
>
>
Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
(drm-misc-next)
[1/2] drm/panel: visionox-vtdr6130: switch to mipi_dsi wrapped functio
Hi,
On Wed, 28 Aug 2024 23:52:10 +0530, Tejas Vipin wrote:
> Changes the novatek-nt35950 panel to use multi style functions for
> improved error handling.
>
>
Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
(drm-misc-next)
[1/1] drm/panel: novatek-nt35950: transition to
Hi,
On Tue, 27 Aug 2024 20:55:04 +0530, Abhishek Tamboli wrote:
> Replace deprecated 'mipi_dsi_dcs_write_seq()' macro
> to 'mipi_dsi_dcs_write_seq_multi' macro in
> panel_nv3051d_init_sequence function.
>
>
Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
(drm-misc-next)
On Thu, 29 Aug 2024 at 13:20, Jun Nie wrote:
>
> Support 4 pipes and their configs at most. They are for 2 SSPP
> and their multi-rect mode. Because one SSPP can co-work with
> 2 mixer at most, 2 pair of mixer are needed for 2 SSPP in quad-
> pipe case. So 2 mixer configs are needed in quad-pipe c
On Thu, 29 Aug 2024 at 13:21, Jun Nie wrote:
>
> Support quad-pipe in SSPP checking with unified method
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 108
> ++
> 1 file changed, 51 insertions(+), 57 deletions(-)
>
> diff --git a/drive
On Thu, 29 Aug 2024, Thierry Reding wrote:
> On Thu, Aug 22, 2024 at 08:42:50PM GMT, Jani Nikula wrote:
>> Prefer the struct drm_edid based functions for reading the EDID and
>> updating the connector.
>>
>> Signed-off-by: Jani Nikula
>>
>> ---
>>
>> Cc: Thierry Reding
>> Cc: Mikko Perttunen
On Thu, 22 Aug 2024, Jani Nikula wrote:
> The umerged patches from [1] and then some.
>
> BR,
> Jani.
>
> [1] https://lore.kernel.org/r/cover.1715691257.git.jani.nik...@intel.com
>
> Jani Nikula (6):
> drm/sti/sti_hdmi: convert to struct drm_edid
> drm/tegra: convert to struct drm_edid
> drm
On Thu, 29 Aug 2024 at 13:21, Jun Nie wrote:
>
> Blend pipes by left and right. The first 2 pipes are for
> left half screen and the later 2 pipes are for right in quad
> pipe case.
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 13 +++--
> drivers/gpu/d
Hi Guenter,
Am Dienstag, 27. August 2024, 21:38:35 CEST schrieb Guenter Roeck:
> On 8/27/24 00:20, Heiko Stübner wrote:
> > Am Samstag, 24. August 2024, 18:44:29 CEST schrieb Guenter Roeck:
> >> On Fri, Aug 23, 2024 at 10:52:36AM -0400, Detlev Casanova wrote:
> >>> It is compatible with the other
Hi Ulf,
On 03/05/2024 16:45, Ulf Hansson wrote:
+ Abel, Saravanna, Stephen
On Mon, 15 Apr 2024 at 19:17, Tomi Valkeinen
wrote:
On 15/04/2024 19:00, Tomi Valkeinen wrote:
Add a new flag, TI_SCI_PD_KEEP_BOOT_STATE, which can be set in the dts
when referring to power domains. When this flag is
On Thu, 29 Aug 2024 at 13:21, Jun Nie wrote:
>
> Support quad pipe in general operations with unified method.
>
> Signed-off-by: Jun Nie
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 87
> +--
> 1 file changed, 47 insertions(+), 40 deletions(-)
>
> diff --git a
Hi,
On 28/08/2024 13:04, Anastasia Belova wrote:
Switch to a managed drm device to cleanup some error handling
and make future work easier.
Fix dereference of NULL in meson_drv_bind_master by removing
drm_dev_put(drm) before meson_encoder_*_remove where drm
dereferenced.
Please send the fix s
---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 19 +-
> drivers/gpu/drm/msm/dsi/dsi.h| 3 +-
> drivers/gpu/drm/msm/dsi/dsi_host.c | 54 ++--
> drivers/gpu/drm/msm/dsi/dsi_manager.c| 2 +-
> include/drm/drm_mipi_dsi.h
On Mon, Aug 26, 2024 at 8:35 AM Christian König
wrote:
>
> The current implementation of drm_sched_start uses a hardcoded
> -ECANCELED to dispose of a job when the parent/hw fence is NULL.
> This results in drm_sched_job_done being called with -ECANCELED for
> each job with a NULL parent in the pe
We must first flush the MMU cache and then, flush the TLB, not the other
way around. Currently, we can see a race condition between the MMU cache
and the TLB when running multiple rendering processes at the same time.
This is evidenced by MMU errors triggered by the IRQ.
Fix the MMU flush order by
We must ensure that the MMU is flushed before we supply more memory to
the binner, otherwise we might end up with invalid MMU accesses by the
GPU.
Fixes: 57692c94dcbe ("drm/v3d: Introduce a new DRM driver for Broadcom V3D
V3.x+")
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/v3d/v3d_drv.h | 1
This series introduces support for big and super pages in V3D. The V3D MMU has
support for 64KB and 1MB pages, called big pages and super pages, which are
currently not used. Therefore, this patchset has the intention to enable big and
super pages in V3D. The advantage of enabling big and super pag
If the scheduler initialization fails, GEM initialization must fail as
well. Therefore, if `v3d_sched_init()` fails, free the DMA memory
allocated and return the error value in `v3d_gem_init()`.
Signed-off-by: Maíra Canal
Reviewed-by: Iago Toral Quiroga
---
drivers/gpu/drm/v3d/v3d_gem.c | 3 ++-
For some applications, such as applications that uses huge pages, we might
want to have a different mountpoint, for which we pass mount flags that
better match our usecase.
Therefore, create a new function `drm_gem_object_init_with_mnt()` that
allow us to define the tmpfs mountpoint where the GEM
Create a separate "tmpfs" kernel mount for V3D. This will allow us to
move away from the shmemfs `shm_mnt` and gives the flexibility to do
things like set our own mount options. Here, the interest is to use
"huge=", which should allow us to enable the use of THP for our
shmem-backed objects.
Signe
Create a function `drm_gem_shmem_create_with_mnt()`, similar to
`drm_gem_shmem_create()`, that has a mountpoint as a argument. This
function will create a shmem GEM object in a given tmpfs mountpoint.
This function will be useful for drivers that have a special mountpoint
with flags enabled.
Sign
Currently, we are using an alignment of 128 kB to insert a node, which
ends up wasting memory as we perform plenty of small BOs allocations
(<= 4 kB). We require that allocations are aligned to 128Kb so for any
allocation smaller than that, we are wasting the difference.
This implies that we canno
The V3D MMU also supports 64KB and 1MB pages, called big and super pages,
respectively. In order to set a 64KB page or 1MB page in the MMU, we need
to make sure that page table entries for all 4KB pages within a big/super
page must be correctly configured.
In order to create a big/super page, we n
Although Big/Super Pages could appear naturally, it would be quite hard
to have 1MB or 64KB allocated contiguously naturally. Therefore, we can
force the creation of large pages allocated contiguously by using a
mountpoint with "huge=within_size" enabled.
Therefore, as V3D has a mountpoint with "h
Add a modparam for turning off Big/Super Pages to make sure that if an
user doesn't want Big/Super Pages enabled, it can disabled it by setting
the modparam to false.
Signed-off-by: Maíra Canal
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/v3d/v3d_drv.c | 7 +++
drivers/gpu/drm/v3d/v3d_
Le 19/08/24 - 17:07, José Expósito a écrit :
> Hi Louis,
>
> Thanks for this patch, adding some minor review comments:
>
> > Add documentation around vkms_output and its initialization.
> >
> > Signed-off-by: Louis Chauvet
> > ---
> > drivers/gpu/drm/vkms/vkms_drv.h| 81
> > ++
Le 27/08/24 - 19:49, José Expósito a écrit :
> Hi Louis,
>
> > Add documentation around vkms_output and its initialization.
> >
> > Signed-off-by: Louis Chauvet
> > ---
> > This series does not introduce functionnal changes, only some
> > documentation and renaming to clarify the code.
> > ---
>
Add documentation around vkms_output and its initialization.
Add some documentation on pixel conversion functions.
Update of outdated comments for pixel_write functions.
Signed-off-by: Louis Chauvet
---
This series does not introduce functionnal changes, only some
documentation and renaming to cl
Hi Christian,
Mihail should be able to give more definitive answers, but I think I can
answer your questions.
On 29/08/2024 10:40, Christian König wrote:
> Am 28.08.24 um 19:25 schrieb Mihail Atanassov:
>> Hello all,
>>
>> This series implements a mechanism to expose Mali CSF GPUs' queue
>> ringb
On 29/08/2024 11:40, Christian König wrote:
Am 28.08.24 um 19:25 schrieb Mihail Atanassov:
Hello all,
This series implements a mechanism to expose Mali CSF GPUs' queue
ringbuffers directly to userspace, along with paraphernalia to allow
userspace to control job synchronisation between the CPU a
Hi Sui,
On Wed, May 29, 2024 at 1:31 PM Sui Jingfeng wrote:
> On 5/27/24 21:34, Geert Uytterhoeven wrote:
> > Add support for the drm_panic module, which displays a message on
> > the screen when a kernel panic occurs.
> >
> > Signed-off-by: Geert Uytterhoeven
> > Reviewed-by: Jocelyn Falempe
>
On Wed, Aug 28, 2024 at 07:21:32AM +, Biju Das wrote:
> On Tuesday, August 27, 2024 11:23 PM, Laurent Pinchart wrote:
> > Subject: Re: [PATCH v2] drm: rcar-du: Fix memory leak in rcar_du_vsps_init()
> >
> > Hi Biju,
> >
> > On Tue, Aug 27, 2024 at 04:43:12PM +, Biju Das wrote:
> > > Hi La
On Thu, May 30, 2024 at 10:33 AM Dmitry Baryshkov
wrote:
> On Thu, 30 May 2024 at 11:16, Jocelyn Falempe wrote:
> > On 29/05/2024 15:33, Laurent Pinchart wrote:
> > > On Wed, May 29, 2024 at 04:28:44PM +0300, Dmitry Baryshkov wrote:
> > >> On Wed, May 29, 2024 at 12:55:06PM +0300, Laurent Pinchar
Hi Dave and Sima,
A quiet week this time.
Thanks,
Rodrigo.
drm-xe-fixes-2024-08-29:
- Invalidate media_gt TLBs (Brost)
- Fix HWMON i1 power setup write command (Karthik)
The following changes since commit 5be63fc19fcaa4c236b307420483578a56986a37:
Linux 6.11-rc5 (2024-08-25 19:07:11 +1200)
a
Hi Sima and Dave,
Here goes our last PR of drm-intel-next towards 6.12.
Most of it is display related clean-up towards intel_display isolation.
But there are 2 cases that worth mention.
1. Xe core changes for BMG. BMG requires, by design, 64k memory size
alignment for scanout buffers using compr
Am 29.08.24 um 11:53 schrieb Thomas Hellström:
Hi, Christian,
On Thu, 2024-08-29 at 11:24 +0200, Christian König wrote:
...
- Unified eviction is required (SVM VRAM and TTM BOs need to be
able to
evict each other).
So core mm handles this by just roughly equally shrinking
everything.
S
On Thu, 29 Aug 2024 at 11:09, Thierry Reding wrote:
>
> From: Thierry Reding
>
> This reverts commit f790b5c09665cab0d51dfcc84832d79d2b1e6c0e. An updated
> version of patch was applied to the PM tree. Sorry for the mixup.
>
> Signed-off-by: Thierry Reding
If not too late, feel free to add:
Ack
Hi Thomas,
that got removed at some point because it cause a problem, but I really
can't remember what it was. Need to dig through the git logs and mailing
list.
I wouldn't mind adding it back, IIRC removing it was one of those
temporary workarounds which became a long term solution because
Hi Dave, Sima,
here's the PR for drm-misc-next for this week. There's one major
change where DRM can now use minor device numbers up to the limit set
by MINORBITS.
Best regards
Thomas
drm-misc-next-2024-08-29:
drm-misc-next for v6.12:
UAPI Changes:
devfs:
- support device numbers up to MINORBI
Hi,
Here's this week drm-misc-fixes PR
Maxime
drm-misc-fixes-2024-08-29:
A revert for a previous TTM commit causing stuttering, 3 fixes for
vmwgfx related to buffer operations, a fix for video/aperture with
non-VGA primary devices, and a preemption status fix for v3d
The following changes since
Hi, Shuijing:
Shuijing Li 於 2024年8月26日 週一 下午2:07寫道：
>
> Adding the per-frame lp function of mt8188, which can keep HFP in HS and
> reduce the time required for each line to enter and exit low power.
> Per Frame LP:
> |<--One Active Frame>|
> --___
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