Support SSPP assignment for quad-pipe case with unified method
Signed-off-by: Jun Nie <jun....@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 58 +++++++++++++------------------
1 file changed, 25 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index 95cb2575c63b4..c38c1bedd40fb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -1143,25 +1143,18 @@ static int dpu_plane_virtual_assign_resources(struct
drm_crtc *crtc,
struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
struct dpu_rm_sspp_requirements reqs;
struct dpu_plane_state *pstate;
- struct dpu_sw_pipe *pipe;
- struct dpu_sw_pipe *r_pipe;
- struct dpu_sw_pipe_cfg *pipe_cfg;
- struct dpu_sw_pipe_cfg *r_pipe_cfg;
+ struct dpu_plane *pdpu = to_dpu_plane(plane);
const struct msm_format *fmt;
uint32_t max_linewidth;
+ u32 i;
if (plane_state->crtc)
crtc_state = drm_atomic_get_new_crtc_state(state,
plane_state->crtc);
pstate = to_dpu_plane_state(plane_state);
- pipe = &pstate->pipe;
- r_pipe = &pstate->r_pipe;
- pipe_cfg = &pstate->pipe_cfg;
- r_pipe_cfg = &pstate->r_pipe_cfg;
-
- pipe->sspp = NULL;
- r_pipe->sspp = NULL;
+ for (i = 0; i < PIPES_PER_STAGE; i++)
+ pstate->pipe[i].sspp = NULL;
if (!plane_state->fb)
return -EINVAL;
@@ -1175,41 +1168,40 @@ static int dpu_plane_virtual_assign_resources(struct
drm_crtc *crtc,
max_linewidth = dpu_kms->catalog->caps->max_linewidth;
- pipe->sspp = dpu_rm_reserve_sspp(&dpu_kms->rm, global_state, crtc,
&reqs);
- if (!pipe->sspp)
- return -ENODEV;
+ for (i = 0; i < PIPES_PER_STAGE; i++) {
+ struct dpu_sw_pipe *r_pipe = &pstate->pipe[i + 1];
+ struct dpu_sw_pipe_cfg *r_pipe_cfg = &pstate->pipe_cfg[i + 1];
+ struct dpu_sw_pipe *pipe = &pstate->pipe[i];
+ struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg[i];
- if (drm_rect_width(&r_pipe_cfg->src_rect) == 0) {
- pipe->multirect_index = DPU_SSPP_RECT_SOLO;
- pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;
+ if (!pipe_cfg->visible)
+ break;
- r_pipe->multirect_index = DPU_SSPP_RECT_SOLO;
- r_pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;
+ pipe->sspp = dpu_rm_reserve_sspp(&dpu_kms->rm, global_state,
crtc, &reqs);
+ if (!pipe->sspp)
+ return -ENODEV;
- r_pipe->sspp = NULL;
- } else {
- if (dpu_plane_is_multirect_parallel_capable(pipe, pipe_cfg,
fmt, max_linewidth) &&
- dpu_plane_is_multirect_parallel_capable(r_pipe, r_pipe_cfg,
fmt, max_linewidth) &&
+ if (r_pipe_cfg->visible &&
+ drm_rect_width(&r_pipe_cfg->src_rect) != 0 &&
+ dpu_plane_is_multirect_parallel_capable(pipe_cfg, fmt,
max_linewidth) &&
+ dpu_plane_is_multirect_parallel_capable(r_pipe_cfg, fmt,
max_linewidth) &&
+ pipe_cfg->mxcfg_id == r_pipe_cfg->mxcfg_id &&
(test_bit(DPU_SSPP_SMART_DMA_V1,
&pipe->sspp->cap->features) ||
test_bit(DPU_SSPP_SMART_DMA_V2,
&pipe->sspp->cap->features))) {
- r_pipe->sspp = pipe->sspp;
-
pipe->multirect_index = DPU_SSPP_RECT_0;
pipe->multirect_mode = DPU_SSPP_MULTIRECT_PARALLEL;
+ DPU_DEBUG_PLANE(pdpu, "allocating sspp_%d for pipe %d
and set pipe %d as multi-rect\n",
+ pipe->sspp->idx, i, i+1);
+ r_pipe->sspp = pipe->sspp;
r_pipe->multirect_index = DPU_SSPP_RECT_1;
r_pipe->multirect_mode = DPU_SSPP_MULTIRECT_PARALLEL;
+ i++;
} else {
- /* multirect is not possible, use two SSPP blocks */
- r_pipe->sspp = dpu_rm_reserve_sspp(&dpu_kms->rm,
global_state, crtc, &reqs);
- if (!r_pipe->sspp)
- return -ENODEV;
-
pipe->multirect_index = DPU_SSPP_RECT_SOLO;
pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;
-
- r_pipe->multirect_index = DPU_SSPP_RECT_SOLO;
- r_pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;
+ DPU_DEBUG_PLANE(pdpu, "allocating sspp_%d for pipe
%d.\n",
+ pipe->sspp->idx, i);
}
}
--
2.34.1
