Am 11.09.23 um 20:29 schrieb John Stultz:
On Mon, Sep 11, 2023 at 3:14 AM Christian König
wrote:
Am 11.09.23 um 04:30 schrieb Yong Wu:
From: John Stultz
This allows drivers who don't want to create their own
DMA-BUF exporter to be able to allocate DMA-BUFs directly
from existing DMA-BUF Heap
On Tue, 12 Sep 2023 02:41:58 +0300
Dmitry Osipenko wrote:
> On 9/5/23 10:40, Boris Brezillon wrote:
> > On Sun, 3 Sep 2023 20:07:18 +0300
> > Dmitry Osipenko wrote:
> >
> >> Use separate flag for tracking page count bumped by shmem->sgt to avoid
> >> imbalanced page counter during of drm_gem
On Tue, 2023-08-01 at 10:53 +0800, Zongmin Zhou wrote:
> The allocated memory for qdev->dumb_heads should be released
> in qxl_destroy_monitors_object before qxl suspend.
> otherwise,qxl_create_monitors_object will be called to
> reallocate memory for qdev->dumb_heads after qxl resume,
> it will ca
Hi Arnd,
On Mon, Sep 11, 2023 at 10:53 PM Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> As a result of the recent Kconfig reworks, the default settings for the
> framebuffer interfaces changed in unexpected ways:
>
> Configurations that leave CONFIG_FB disabled but use DRM now get
> DRM_FBDEV_E
The removed line prevents the following cleanup function
to execute a dma_fence_put on the out_fence to free its
memory, producing the following output in kmemleak:
unreferenced object 0x888126d8ee00 (size 128):
comm "kwin_wayland", pid 981, jiffies 4295380296 (age 390.060s)
hex dump (firs
On 9/8/23 03:26, Abhinav Kumar wrote:
_dpu_plane_calc_bw() uses integer variables to calculate the bandwidth
used during plane bandwidth calculations. However for high resolution
displays this overflows easily and leads to below errors
[dpu error]crtc83 failed performance check -7
Promote the i
On Mon, Sep 11, 2023 at 01:49:39PM +0200, Krzysztof Kozlowski wrote:
> If the other panel has exactly the same case, then yes, you can do like
> this. But it depends on the bindings - to which ones do you refer as
> your tmeplate?
Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444
Fascontek manufactures LCD panels such as the FS035VG158.
Signed-off-by: John Watts
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b/Documentation/devicetree/bindings/vendor-
This display is extremely similar to the LTK035C5444T, but still has
some minor variations in panel initialization.
Signed-off-by: John Watts
---
.../gpu/drm/panel/panel-newvision-nv3052c.c | 223 ++
1 file changed, 223 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-ne
The panel needs us to wait 120ms between exiting and entering sleep.
Guarantee that by always waiting 150ms before entering sleep mode.
Signed-off-by: John Watts
---
drivers/gpu/drm/panel/panel-newvision-nv3052c.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel
SPI drivers needs their own list of compatible device IDs in order
for automatic module loading to work. Add those for this driver.
Signed-off-by: John Watts
---
drivers/gpu/drm/panel/panel-newvision-nv3052c.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel
Hello again,
On Mon, Sep 11, 2023 at 11:41:12AM +0200, Krzysztof Kozlowski wrote:
> > +maintainers:
> > + - John Watts
> > +
> > +allOf:
> > + - $ref: panel-common.yaml#
> > + - $ref: /schemas/spi/spi-peripheral-props.yaml#
> > +
> > +properties:
> > + compatible:
> > +const: fascontek,fs
Hello there,
I have recently done some work to get a new panel running on the kernel.
I am completely new to this kind of work so I don't know how to split my
patches up, especially as I did some light refactoring and fixing on the way.
These changes affect these existing LCD panel but should wor
The current code waits after resets for 5 to 20 milliseconds.
This is appropriate when resetting a sleeping panel, but an awake panel
requires at least 120ms of waiting.
Sleep for 150ms so the panel always completes it reset properly.
Signed-off-by: John Watts
---
drivers/gpu/drm/panel/panel-ne
Many of these registers have a known name in the public datasheet.
Document them as comments for reference.
Signed-off-by: John Watts
---
.../gpu/drm/panel/panel-newvision-nv3052c.c | 261 +-
1 file changed, 132 insertions(+), 129 deletions(-)
diff --git a/drivers/gpu/drm/pane
This is a small 3.5" 640x480 IPS LCD panel.
Signed-off-by: John Watts
---
.../display/panel/fascontek,fs035vg158.yaml | 60 +++
1 file changed, 60 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/fascontek,fs035vg158.yaml
diff --git
a/Documen
Panel initialization registers are per-display and not tied to the
controller itself. Different panels will specify their own registers.
Attach the sequences to the panel info struct so future panels
can specify their own sequences.
Signed-off-by: John Watts
---
.../gpu/drm/panel/panel-newvision
[Public]
> -Original Message-
> From: Imre Deak
> Sent: Saturday, September 9, 2023 3:18 AM
> To: Lin, Wayne
> Cc: dri-devel@lists.freedesktop.org; amd-...@lists.freedesktop.org;
> ly...@redhat.com; jani.nik...@intel.com; ville.syrj...@linux.intel.com;
> Wentland, Harry ; Zuo, Jerry
>
>
On Mon, 11 Sep 2023 19:16:04 -0700
Matthew Brost wrote:
> @@ -1071,6 +1063,7 @@ static int drm_sched_main(void *param)
> *
> * @sched: scheduler instance
> * @ops: backend operations for this scheduler
> + * @submit_wq: workqueue to use for submission. If NULL, the system_wq is
> used
>
On Mon, Sep 11, 2023 at 11:51:06AM +0200, Maxime Ripard wrote:
> Kunit recently gained a speed attribute that allows to filter out slow
> tests. A slow test is defined in the documentation as a test taking more
> than a second to execute.
>
> Let's flag the few tests that are doing so on my machin
On Mon, 11 Sep 2023 19:16:05 -0700
Matthew Brost wrote:
> Rather than a global modparam for scheduling policy, move the scheduling
> policy to scheduler / entity so user can control each scheduler / entity
> policy.
I'm a bit confused by the commit message (I think I'm okay with the
diff though)
On Tue, Sep 12, 2023, at 09:14, Geert Uytterhoeven wrote:
> On Mon, Sep 11, 2023 at 10:53 PM Arnd Bergmann wrote:
>> --- a/drivers/gpu/drm/Kconfig
>> +++ b/drivers/gpu/drm/Kconfig
>> @@ -135,7 +135,7 @@ config DRM_FBDEV_EMULATION
>> bool "Enable legacy fbdev support for your modesetting dr
Hi, Danilo
On 9/11/23 19:49, Danilo Krummrich wrote:
Hi Thomas,
On 9/11/23 19:19, Thomas Hellström wrote:
Hi, Danilo
On 9/9/23 17:31, Danilo Krummrich wrote:
This patch adds an abstraction layer between the drm_gpuva mappings of
a particular drm_gem_object and this GEM object itself. The abs
On Mon, 11 Sep 2023, Randy Dunlap wrote:
> On 9/10/23 19:11, Stephen Rothwell wrote:
>> Hi all,
>>
>> Please do *not* include material destined for v6.7 in your linux-next
>> included branches until *after* v6.6-rc1 has been released. Also,
>> do *not* rebase your linu-next included branches ont
Geert Uytterhoeven writes:
Hello Geert,
> Hi Arnd,
>
> On Mon, Sep 11, 2023 at 10:53 PM Arnd Bergmann wrote:
[...]
>> --- a/drivers/gpu/drm/Kconfig
>> +++ b/drivers/gpu/drm/Kconfig
>> @@ -135,7 +135,7 @@ config DRM_FBDEV_EMULATION
>> bool "Enable legacy fbdev support for your modesett
Hi Arnd,
On Tue, Sep 12, 2023 at 9:40 AM Arnd Bergmann wrote:
> On Tue, Sep 12, 2023, at 09:14, Geert Uytterhoeven wrote:
> > On Mon, Sep 11, 2023 at 10:53 PM Arnd Bergmann wrote:
> >> --- a/drivers/gpu/drm/Kconfig
> >> +++ b/drivers/gpu/drm/Kconfig
> >> @@ -135,7 +135,7 @@ config DRM_FBDEV_EMUL
Hi Javier,
On Tue, Sep 12, 2023 at 9:48 AM Javier Martinez Canillas
wrote:
> Geert Uytterhoeven writes:
> > On Mon, Sep 11, 2023 at 10:53 PM Arnd Bergmann wrote:
>
> [...]
>
> >> --- a/drivers/gpu/drm/Kconfig
> >> +++ b/drivers/gpu/drm/Kconfig
> >> @@ -135,7 +135,7 @@ config DRM_FBDEV_EMULATION
"Arnd Bergmann" writes:
> On Tue, Sep 12, 2023, at 09:14, Geert Uytterhoeven wrote:
>> On Mon, Sep 11, 2023 at 10:53 PM Arnd Bergmann wrote:
[...]
>
> The only alternative I can think of would be to default-enable
> or force-enable FRAMEBUFFER_CONSOLE for any config that includes
> both VT_CON
On Tue, Sep 12, 2023, at 09:48, Javier Martinez Canillas wrote:
> Geert Uytterhoeven writes:
>> On Mon, Sep 11, 2023 at 10:53 PM Arnd Bergmann wrote:
>>> --- a/drivers/gpu/drm/Kconfig
>>> +++ b/drivers/gpu/drm/Kconfig
>>> @@ -135,7 +135,7 @@ config DRM_FBDEV_EMULATION
>>> bool "Enable leg
On Mon, 11 Sep 2023 19:16:07 -0700
Matthew Brost wrote:
> Rather than call free_job and run_job in same work item have a dedicated
> work item for each. This aligns with the design and intended use of work
> queues.
>
> v2:
>- Test for DMA_FENCE_FLAG_TIMESTAMP_BIT before setting
> times
Hi
Am 12.09.23 um 09:14 schrieb Geert Uytterhoeven:
[...]
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -135,7 +135,7 @@ config DRM_FBDEV_EMULATION
bool "Enable legacy fbdev support for your modesetting driver"
depends on DRM
select FRAMEBUFFER_CONSOLE
On 12/09/2023 09:56, Moudy Ho wrote:
> Due to the same hardware design, MDP RDMA needs to
> be integrated into the same binding.
>
Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching
On Sun, 10 Sept 2023 at 21:05, Linus Torvalds
wrote:
>
> On Wed, 30 Aug 2023 at 18:00, Dave Airlie wrote:
> >
> > This is a PR to add drm-ci support files to the upstream tree.
>
> So I finally had no other pull requests pending, and spent some time
> looking at this, and I see nothing offensive.
Hi Thomas,
On Tue, Sep 12, 2023 at 10:11 AM Thomas Zimmermann wrote:
> Am 12.09.23 um 09:14 schrieb Geert Uytterhoeven:
> [...]
> >> --- a/drivers/gpu/drm/Kconfig
> >> +++ b/drivers/gpu/drm/Kconfig
> >> @@ -135,7 +135,7 @@ config DRM_FBDEV_EMULATION
> >> bool "Enable legacy fbdev support
On 12/09/2023 09:56, Moudy Ho wrote:
> Introduce more MDP3 components present in MT8195.
Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.
>
> Signed-off-by: Moudy Ho
> ---
> .
On 12/09/2023 09:58, Moudy Ho wrote:
> Add MT8195 MDP3 basic configuration in file "mdp_cfg_data.c"
> and corresponding driver data.
>
> Signed-off-by: Moudy Ho
...
> {}
> };
> diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c
> b/drivers/media/platform/mediatek/mdp3/mtk
On Mon, 11 Sep 2023 19:16:08 -0700
Matthew Brost wrote:
> Add generic schedule message interface which sends messages to backend
> from the drm_gpu_scheduler main submission thread. The idea is some of
> these messages modify some state in drm_sched_entity which is also
> modified during submissi
On 12/09/2023 09:57, Moudy Ho wrote:
> Add device nodes for Media Data Path 3 (MDP3) modules.
>
> Signed-off-by: Moudy Ho
> ---
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 378 +++
> 1 file changed, 378 insertions(+)
Why is this targeting media? No, don't. DTS goes via SoC,
On 12/09/2023 08:16, Yong Wu (吴勇) wrote:
> Hi Rob,
>
> Thanks for your review.
>
> On Mon, 2023-09-11 at 10:44 -0500, Rob Herring wrote:
>>
>> External email : Please do not click links or open attachments until
>> you have verified the sender or the content.
>> On Mon, Sep 11, 2023 at 10
Hi Geert
Am 12.09.23 um 10:18 schrieb Geert Uytterhoeven:
Hi Thomas,
On Tue, Sep 12, 2023 at 10:11 AM Thomas Zimmermann wrote:
Am 12.09.23 um 09:14 schrieb Geert Uytterhoeven:
[...]
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -135,7 +135,7 @@ config DRM_FBDEV_EMULATION
Hi,
On Sun, Sep 10, 2023 at 11:40:28AM +0200, Javier Martinez Canillas wrote:
> The commit 45b58669e532 ("drm/ssd130x: Allocate buffer in the plane's
> .atomic_check() callback") moved the allocation of the intermediate and
> HW buffers from the encoder's .atomic_enable callback, to the plane's
>
These GPU registers will be used when programming the cycle counter, which
we need for providing accurate fdinfo drm-cycles values to user space.
Signed-off-by: Adrián Larumbe
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_regs.h | 5 +
1 file
BO's RSS is updated every time new pages are allocated on demand and mapped
for the object at GPU page fault's IRQ handler, but only for heap buffers.
The reason this is unnecessary for non-heap buffers is that they are mapped
onto the GPU's VA space and backed by physical memory in their entirety
This patch series adds fdinfo support to the Panfrost DRM driver. It will
display a series of key:value pairs under /proc/pid/fdinfo/fd for render
processes that open the Panfrost DRM file.
The pairs contain basic drm gpu engine and memory region information that
can either be cat by a privileged
The drm-stats fdinfo tags made available to user space are drm-engine,
drm-cycles, drm-max-freq and drm-curfreq, one per job slot.
This deviates from standard practice in other DRM drivers, where a single
set of key:value pairs is provided for the whole render engine. However,
Panfrost has separat
Some BO's might be mapped onto physical memory chunkwise and on demand,
like Panfrost's tiler heap. In this case, even though the
drm_gem_shmem_object page array might already be allocated, only a very
small fraction of the BO is currently backed by system memory, but
drm_show_memory_stats will the
The current implementation will try to pick the highest available size
display unit as soon as the BO size exceeds that of the previous
multiplier. That can lead to loss of precision in BO's whose size is
not a multiple of a MiB.
Fix it by changing the unit selection criteria.
For much bigger BO'
A new DRM GEM object function is added so that drm_show_memory_stats can
provide more accurate memory usage numbers.
Ideally, in panfrost_gem_status, the BO's purgeable flag would be checked
after locking the driver's shrinker mutex, but drm_show_memory_stats takes
over the drm file's object handl
On Mon, 11 Sep 2023 19:16:13 -0700
Matthew Brost wrote:
> Wait for pending jobs to be complete before signaling queued jobs.
You probably want to add 'in drm_sched_entity_kill()', even if it's
already specified in the subject, because I was trying to understand
why we'd want to do that in the no
On Mon, 2023-09-11 at 12:12 -0400, Nicolas Dufresne wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> Hi,
>
> Le lundi 11 septembre 2023 à 10:30 +0800, Yong Wu a écrit :
> > From: John Stultz
> >
> > This all
Hi Thomas,
On Tue, Sep 12, 2023 at 10:38 AM Thomas Zimmermann wrote:
> Am 12.09.23 um 10:18 schrieb Geert Uytterhoeven:
> > On Tue, Sep 12, 2023 at 10:11 AM Thomas Zimmermann
> > wrote:
> >> Am 12.09.23 um 09:14 schrieb Geert Uytterhoeven:
> >> [...]
> --- a/drivers/gpu/drm/Kconfig
>
On Tue, 2023-09-12 at 09:06 +0200, Christian König wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> Am 11.09.23 um 20:29 schrieb John Stultz:
> > On Mon, Sep 11, 2023 at 3:14 AM Christian König
> > wrote:
> >>
Il 12/09/23 09:57, Moudy Ho ha scritto:
Changes since v4:
- Rebase on v6.6-rc1
- Remove any unnecessary DTS settings.
- Adjust the usage of MOD and clock in blending components.
Changes since v3:
- Depend on :
[1] https://patchwork.kernel.org/project/linux-media/list/?series=719841
- Suggeste
Maxime Ripard writes:
Hello Maxime,
Thanks for your feedback!
> Hi,
>
> On Sun, Sep 10, 2023 at 11:40:28AM +0200, Javier Martinez Canillas wrote:
[...]
>> static int ssd130x_update_rect(struct ssd130x_device *ssd130x,
>> - struct ssd130x_plane_state *ssd130x_state,
On Tue, Sep 12, 2023, at 04:18, Geert Uytterhoeven wrote:
> On Tue, Sep 12, 2023 at 10:11 AM Thomas Zimmermann
> wrote:
>> Am 12.09.23 um 09:14 schrieb Geert Uytterhoeven:
>> [...]
>> >> --- a/drivers/gpu/drm/Kconfig
>> >> +++ b/drivers/gpu/drm/Kconfig
>> >> @@ -135,7 +135,7 @@ config DRM_FBDEV_E
Il 12/09/23 09:57, Moudy Ho ha scritto:
MT8195 has two MMSYS sets, VPPSYS0 and VPPSYS1.
These sets coordinate and control the clock, power, and
register settings needed for the components of MDP3.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 44 +
On Tue, 12 Sep 2023 09:36:56 +0100
Adrián Larumbe wrote:
> The drm-stats fdinfo tags made available to user space are drm-engine,
> drm-cycles, drm-max-freq and drm-curfreq, one per job slot.
>
> This deviates from standard practice in other DRM drivers, where a single
> set of key:value pairs i
On Tue, 12 Sep 2023 09:36:57 +0100
Adrián Larumbe wrote:
> A new DRM GEM object function is added so that drm_show_memory_stats can
> provide more accurate memory usage numbers.
>
> Ideally, in panfrost_gem_status, the BO's purgeable flag would be checked
> after locking the driver's shrinker mu
On Tue, 12 Sep 2023 09:36:59 +0100
Adrián Larumbe wrote:
> BO's RSS is updated every time new pages are allocated on demand and mapped
> for the object at GPU page fault's IRQ handler, but only for heap buffers.
> The reason this is unnecessary for non-heap buffers is that they are mapped
> onto
On Tue, 12 Sep 2023 09:37:00 +0100
Adrián Larumbe wrote:
> The current implementation will try to pick the highest available size
> display unit as soon as the BO size exceeds that of the previous
> multiplier. That can lead to loss of precision in BO's whose size is
> not a multiple of a MiB.
>
Il 12/09/23 08:17, Yong Wu (吴勇) ha scritto:
On Mon, 2023-09-11 at 11:29 +0200, AngeloGioacchino Del Regno wrote:
Il 11/09/23 04:30, Yong Wu ha scritto:
The TEE probe later than dma-buf heap, and PROBE_DEDER doesn't work
here since this is not a platform driver, therefore initialise the
TEE
cont
On Tue, Sep 12, 2023 at 5:00 PM AngeloGioacchino Del Regno
wrote:
>
> Il 12/09/23 09:57, Moudy Ho ha scritto:
> > Changes since v4:
> > - Rebase on v6.6-rc1
> > - Remove any unnecessary DTS settings.
> > - Adjust the usage of MOD and clock in blending components.
> >
> > Changes since v3:
> > - De
Il 12/09/23 11:37, Chen-Yu Tsai ha scritto:
On Tue, Sep 12, 2023 at 5:00 PM AngeloGioacchino Del Regno
wrote:
Il 12/09/23 09:57, Moudy Ho ha scritto:
Changes since v4:
- Rebase on v6.6-rc1
- Remove any unnecessary DTS settings.
- Adjust the usage of MOD and clock in blending components.
Chan
On 11.09.2023 15:42, Christian König wrote:
Am 11.09.23 um 15:33 schrieb Karolina Stolarek:
On 11.09.2023 15:12, Christian König wrote:
Am 11.09.23 um 13:47 schrieb Karolina Stolarek:
On 11.09.2023 12:49, Jani Nikula wrote:
On Mon, 11 Sep 2023, Karolina Stolarek
wrote:
Update Makefile so i
Am 12.09.23 um 04:16 schrieb Matthew Brost:
Wait for pending jobs to be complete before signaling queued jobs. This
ensures dma-fence signaling order correct and also ensures the entity is
not running on the hardware after drm_sched_entity_flush or
drm_sched_entity_fini returns.
Entities are *n
Am 12.09.23 um 11:51 schrieb Karolina Stolarek:
On 11.09.2023 15:42, Christian König wrote:
Am 11.09.23 um 15:33 schrieb Karolina Stolarek:
On 11.09.2023 15:12, Christian König wrote:
Am 11.09.23 um 13:47 schrieb Karolina Stolarek:
On 11.09.2023 12:49, Jani Nikula wrote:
On Mon, 11 Sep 2023
This series attempts to introduce Adreno 700 support (with A730 and A740
found on SM8450 and SM8550 respectively), reusing much of the existing
A6xx code. This submission largely lays the groundwork for expansion and
more or less gives us feature parity (on the kernel side, that is) with
existing A
When booting the GMU, the QMP mailbox should be pinged about some tunables
(e.g. adaptive clock distribution state). To achieve that, a reference to
it is necessary. Allow it and require it with A730.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Acked-by: Krzysz
Allow A7xx SKUs, such as the A730 GPU found on SM8450 and friends.
They use GMU for all things DVFS, just like most A6xx GPUs.
Reviewed-by: Krzysztof Kozlowski
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
Documentation/devicet
A7xx GPUs are - from kernel's POV anyway - basically another generation
of A6xx. They build upon the A650/A660_family advancements, skipping some
writes (presumably more values are preset correctly on reset), adding
some new ones and changing others.
One notable difference is the introduction of a
Add some missing definitions required for A7 support.
This may be substituted with a mesa header sync.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx.xml.h | 9 +
drivers/gpu/drm/msm/a
The QMP mailbox expects to be notified of the ACD (Adaptive Clock
Distribution) state. Get a handle to the mailbox at probe time and
poke it at GMU resume.
Since we don't fully support ACD yet, hardcode the message to "val: 0"
(state = disabled).
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-
Add support for Adreno 730, also known as GEN7_0_x, found on SM8450.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 126 -
drivers/gpu/drm/msm/adreno/a6xx_h
Provide the necessary alternations to mostly support state dumping on
A7xx. Newer GPUs will probably require more changes here. Crashdumper
and debugbus remain untested.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/
A740 builds upon the A730 IP, shuffling some values and registers
around. More differences will appear when things like BCL are
implemented.
adreno_is_a740_family is added in preparation for more A7xx GPUs,
the logic checks will be valid resulting in smaller diffs.
Tested-by: Neil Armstrong # on
The GMU on the A7xx series is pretty much the same as on the A6xx parts.
It's now "smarter", needs a bit less register writes and controls more
things (like inter-frame power collapse) mostly internally (instead of
us having to write to G[PM]U_[CG]X registers from APPS)
The only difference worth m
Some GPUs - particularly A7xx ones - are really really stubborn and
sometimes take a longer-than-expected time to finish unhalting GBIF.
Note that this is not caused by the request a few lines above.
Poll for the unhalt ack to make sure we're not trying to write bits to
an essentially dead GPU th
On Tue, Sep 12, 2023 at 09:42:44AM +0200, Thomas Hellström wrote:
> Hi, Danilo
>
> On 9/11/23 19:49, Danilo Krummrich wrote:
> > Hi Thomas,
> >
> > On 9/11/23 19:19, Thomas Hellström wrote:
> > > Hi, Danilo
> > >
> > > On 9/9/23 17:31, Danilo Krummrich wrote:
> > > > This patch adds an abstracti
On Fri, 25 Aug 2023 15:45:49 +0200
Christian König wrote:
> Am 25.08.23 um 15:36 schrieb Matthew Brost:
> > On Fri, Aug 25, 2023 at 10:02:32AM +0200, Christian König wrote:
> >> Am 25.08.23 um 04:58 schrieb Matthew Brost:
> >>> On Fri, Aug 25, 2023 at 01:04:10AM +0200, Danilo Krummrich wrote:
On 12/09/2023 9:28 am, Krzysztof Kozlowski wrote:
On 12/09/2023 08:16, Yong Wu (吴勇) wrote:
Hi Rob,
Thanks for your review.
On Mon, 2023-09-11 at 10:44 -0500, Rob Herring wrote:
External email : Please do not click links or open attachments until
you have verified the sender or the co
On Mon, 11 Sep 2023 19:16:13 -0700
Matthew Brost wrote:
> +void drm_sched_add_pending_job(struct drm_sched_job *job, bool tail)
> +{
> + struct drm_gpu_scheduler *sched = job->sched;
> + struct drm_sched_entity *entity = job->entity;
drm_sched_entity_pop_job() sets job->entity to NULL [1
On Tue, Sep 12, 2023 at 5:43 PM AngeloGioacchino Del Regno
wrote:
>
> Il 12/09/23 11:37, Chen-Yu Tsai ha scritto:
> > On Tue, Sep 12, 2023 at 5:00 PM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> Il 12/09/23 09:57, Moudy Ho ha scritto:
> >>> Changes since v4:
> >>> - Rebase on v6.6-rc1
> >>> -
On 9/12/23 12:06, Danilo Krummrich wrote:
On Tue, Sep 12, 2023 at 09:42:44AM +0200, Thomas Hellström wrote:
Hi, Danilo
On 9/11/23 19:49, Danilo Krummrich wrote:
Hi Thomas,
On 9/11/23 19:19, Thomas Hellström wrote:
Hi, Danilo
On 9/9/23 17:31, Danilo Krummrich wrote:
This patch adds an abs
On 12/09/2023 12:28, Chen-Yu Tsai wrote:
> On Tue, Sep 12, 2023 at 5:43 PM AngeloGioacchino Del Regno
> wrote:
>>
>> Il 12/09/23 11:37, Chen-Yu Tsai ha scritto:
>>> On Tue, Sep 12, 2023 at 5:00 PM AngeloGioacchino Del Regno
>>> wrote:
Il 12/09/23 09:57, Moudy Ho ha scritto:
> Change
On 09/09/23 9:50 pm, claudiu beznea wrote:
> [You don't often get email from claudiu.bez...@tuxon.dev. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hi, Manika
On Tue, Sep 12, 2023 at 12:13:57PM +0200, Boris Brezillon wrote:
> On Fri, 25 Aug 2023 15:45:49 +0200
> Christian König wrote:
>
> > Am 25.08.23 um 15:36 schrieb Matthew Brost:
> > > On Fri, Aug 25, 2023 at 10:02:32AM +0200, Christian König wrote:
> > >> Am 25.08.23 um 04:58 schrieb Matthew Bro
The sta_himax83102 panel sometimes shows abnormally flickering
horizontal lines. The front gate output will precharge the X point of
the next pole circuit before TP(TouchPanel Enable) term starts, and wait
until the end of the TP term to resume the CLK. For this reason, the X
point must be maintain
On Tue, Sep 12, 2023 at 12:33:14PM +0200, Thomas Hellström wrote:
>
> On 9/12/23 12:06, Danilo Krummrich wrote:
> > On Tue, Sep 12, 2023 at 09:42:44AM +0200, Thomas Hellström wrote:
> > > Hi, Danilo
> > >
> > > On 9/11/23 19:49, Danilo Krummrich wrote:
> > > > Hi Thomas,
> > > >
> > > > On 9/11/
The upcoming drm/xe driver [1][2] will reuse the drm/i915 display code,
initially by compiling the relevant compilation units separately as part
of the xe driver. This series prepares for that in i915 side.
The first patch defines I915 during the i915 driver build, to allow
conditional compilation
The xe driver will reuse i915 display code by compiling it separately as
part of xe. We'll want to be able to distinguish between building the
i915 display code for i915 and xe. Define I915 when building i915.
Cc: David Airlie
Cc: Daniel Vetter
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tvrtko U
Add stubs for !I915.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_lvds.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.h
b/drivers/gpu/drm/i915/display/intel_lvds.h
index 9d3372dc503f..7ad5fa9c0434 100644
--
Add stubs for !I915.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/hsw_ips.h | 35 ++
1 file changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/hsw_ips.h
b/drivers/gpu/drm/i915/display/hsw_ips.h
index 4eb83b350791..35364228e1c1 100644
---
On Tue, Sep 12, 2023 at 12:15:10AM +0300, Dmitry Baryshkov wrote:
> On 06/09/2023 16:38, Heikki Krogerus wrote:
> > On Wed, Sep 06, 2023 at 03:48:35PM +0300, Dmitry Baryshkov wrote:
> > > On Wed, 6 Sept 2023 at 15:44, Heikki Krogerus
> > > wrote:
> > > >
> > > > On Tue, Sep 05, 2023 at 01:56:59PM
Add stubs for !I915.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/i9xx_plane.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.h
b/drivers/gpu/drm/i915/display/i9xx_plane.h
index 027b66053984..b3d724a144cb 10064
Add stubs for !I915.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_lpe_audio.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.h
b/drivers/gpu/drm/i915/display/intel_lpe_audio.h
index 0beecac267ae..2c5fcb6e
Add stubs for !I915.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/display/intel_pch_refclk.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.h
b/drivers/gpu/drm/i915/display/intel_pch_refclk.h
index 9bcf56629f24..ae3403
Add stubs for !I915.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/display/intel_pch_display.h | 53 +++
1 file changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.h
b/drivers/gpu/drm/i915/display/intel_pch_display.h
index 41a63413cb3d..35f8
Add stubs for !I915.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_sprite.h | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h
b/drivers/gpu/drm/i915/display/intel_sprite.h
index 91c6dca342b2..044a032e41b9 100644
--- a/dri
1 - 100 of 217 matches
Mail list logo
