On Wed, 07 Sep 2022 09:29:37 +0200,
Thomas Zimmermann wrote:
>
> Hi
>
> Am 06.09.22 um 09:39 schrieb Takashi Iwai:
> > The alignment of damaged area was needed for the original udlfb driver
> > that tried to trim the superfluous copies between front and backend
> > buffers and handle data in long
ping @Eric Farman.
ccw is the only tricky player in this series. Please help take a look in case of
any oversight here.
> From: Tian, Kevin
> Sent: Thursday, September 1, 2022 10:38 PM
>
> ccw is the only exception which cannot use vfio_alloc_device() because
> its private device structure is d
Flush mechanism for DSPP blocks has changed in sc7280 family, it
allows individual sub blocks to be flushed in coordination with
master flush control.
Representation: master_flush && (PCC_flush | IGC_flush .. etc )
This change adds necessary support for the above design.
Changes in v1:
- Few nit
On Wed, 7 Sept 2022 at 11:26, Matthew Auld
wrote:
>
> On Wed, 7 Sept 2022 at 11:00, Christian König
> wrote:
> >
> > Otherwise lockdep will complain about cleaning up the bulk_move.
> >
> > Not even compile tested.
> >
> > Signed-off-by: Christian König
>
> Looks reasonable to me,
> Reviewed-by:
Am 08.09.22 um 09:46 schrieb Matthew Auld:
On Wed, 7 Sept 2022 at 11:26, Matthew Auld
wrote:
On Wed, 7 Sept 2022 at 11:00, Christian König
wrote:
Otherwise lockdep will complain about cleaning up the bulk_move.
Not even compile tested.
Signed-off-by: Christian König
Looks reasonable to me
On 6/9/2022 20:06, Robin Murphy wrote:
On 2022-09-04 05:13, Chris Ruehl wrote:
Hi,
Something you might have a head up for it,
have a mediapipe application for POSE which use the T860 GPU for the calculation
but the kernel driver report error (js fault) - I see one or 2 calculation
frames on
On Mon, Sep 5, 2022 at 8:31 AM Dmitry Torokhov
wrote:
> I would like to stop exporting OF-specific devm_gpiod_get_from_of_node()
> so that gpiolib can be cleaned a bit, so let's switch to the generic
> fwnode property API.
>
> Signed-off-by: Dmitry Torokhov
Reviewed-by: Linus Walleij
Yours,
L
This series contains 2 fixes related to it6505 power management.
Pin-yen Lin (2):
drm/bridge: it6505: Adapt runtime power management framework
drm/bridge: it6505: Add pre_enable/post_disable callback
drivers/gpu/drm/bridge/ite-it6505.c | 49 +++--
1 file changed, 40
Use pm_runtime_(get|put)_sync to control the bridge power, and add
SET_SYSTEM_SLEEP_PM_OPS with pm_runtime_force_(suspend|resume) to it6505
driver. Without SET_SYSTEM_SLEEP_PM_OPS, the bridge will be powered on
unnecessarily when no external display is connected.
Fixes: b5c84a9edcd4 ("drm/bridge:
Add atomic_pre_enable and atomic_post_disable callback to make sure the
bridge is not powered off until atomic_post_disable is called. This
prevents a power leakage when it6505 is powered off, but the upstream
DRM bridge is still sending display signals.
Fixes: b5c84a9edcd4 ("drm/bridge: add it650
On Mon, Sep 5, 2022 at 8:31 AM Dmitry Torokhov
wrote:
> I would like to limit (or maybe even remove) use of
> [devm_]gpiod_get_from_of_node in drivers so that gpiolib can be cleaned
> a bit, so let's switch to the generic device property API. It may even
> help with handling secondary fwnodes whe
On Mon, Sep 5, 2022 at 8:31 AM Dmitry Torokhov
wrote:
> I would like to stop exporting OF-specific devm_gpiod_get_from_of_node()
> so that gpiolib can be cleaned a bit, so let's switch to the generic
> device property API.
>
> I believe that the only reason the driver, instead of the standard
> d
On Tue, Sep 6, 2022 at 2:19 AM Dmitry Torokhov
wrote:
> On Sun, Sep 04, 2022 at 11:30:59PM -0700, Dmitry Torokhov wrote:
> > I would like to stop exporting OF-specific gpiod_get_from_of_node()
> > so that gpiolib can be cleaned a bit, so let's switch to the generic
> > fwnode property API.
> >
>
On Mon, Sep 5, 2022 at 8:31 AM Dmitry Torokhov
wrote:
> I would like to stop exporting OF-specific devm_gpiod_get_from_of_node()
> so that gpiolib can be cleaned a bit, so let's switch to the generic
> fwnode property API.
>
> While at it switch the rest of the calls to read properties in
> bd957
The variable i is already declared as uint32_t in the same function.
This fixes the following error, when compiling this code on older kernel:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c: In function
'dcn32_full_validate_bw_helper':
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/
Commit 52824ca4502d ("drm/panel-edp: Better describe eDP panel delays")
clarified the various delays used for eDP panels, tying them to the eDP
panel timing diagram.
For Innolux N116BCA-EA1, .prepare_to_enable would be:
t4_min + t5_min + t6_min + max(t7_max, t8_min)
Since t4_min and t5_min a
This panel has the same delay timing as N116BCA-EA1 from the same
company, which is also the same as delay_200_500_e80_d50.
Add an entry for it.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/panel/panel-edp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/panel/panel-edp.
Hi Kevin,
On 9/1/22 16:37, Kevin Tian wrote:
> From: Yi Liu
>
> and replace kref. With it a 'vfio-dev/vfioX' node is created under the
> sysfs path of the parent, indicating the device is bound to a vfio
> driver, e.g.:
>
> /sys/devices/pci\:6f/\:6f\:01.0/vfio-dev/vfio0
>
> It is also a p
Hi Kevin,
On 9/8/22 08:19, Tian, Kevin wrote:
>> From: Eric Auger
>> Sent: Thursday, September 8, 2022 3:28 AM
>>> +/*
>>> + * Alloc and initialize vfio_device so it can be registered to vfio
>>> + * core.
>>> + *
>>> + * Drivers should use the wrapper vfio_alloc_device() for allocation.
>>> + *
Hi Zhenyu,
This issue has been open for a few days. Could you plz write a patch
for that :) I'm not familiar with the logical code here.
Regards,
Zheng Wang
Zhenyu Wang 于2022年9月7日周三 11:33写道：
>
> On 2022.09.06 19:36:56 +0800, Zheng Hacker wrote:
> > Hi Greg,
> >
> > Alex has explained how we fig
On Wed, Sep 07, 2022 at 02:23:51PM -0400, Lyude Paul wrote:
> Surprised this didn't come up on Intel's CI (or at least it certainly didn't
> when the series that introduced this was tested),
Yes, this was a problem in CI which didn't have any MST sinks. Now there
is and the problem is visible:
htt
On 2022/9/8 17:06, Eric Auger wrote:
Hi Kevin,
On 9/1/22 16:37, Kevin Tian wrote:
From: Yi Liu
and replace kref. With it a 'vfio-dev/vfioX' node is created under the
sysfs path of the parent, indicating the device is bound to a vfio
driver, e.g.:
/sys/devices/pci\:6f/\:6f\:01.0/vfio-
Hi Sumit
On ven., 2022-08-19 at 13:54 +0530, Sumit Garg wrote:
> Caution: EXT Email
>
> Hi Olivier,
>
> On Fri, 12 Aug 2022 at 20:01, Olivier Masse
> wrote:
> >
> > Add a new ioctl called TEE_IOC_SHM_REGISTER_FD to register a
> > shared memory from a dmabuf file descriptor.
> > This new ioctl
On Thu, Sep 08, 2022 at 05:09:40PM +0800, Zheng Hacker wrote:
> Hi Zhenyu,
>
> This issue has been open for a few days. Could you plz write a patch
> for that :) I'm not familiar with the logical code here.
As this is only able to be hit in a theoretical system, it isn't that
high of a priority,
On 9/8/22 11:17, Yi Liu wrote:
> On 2022/9/8 17:06, Eric Auger wrote:
>> Hi Kevin,
>>
>> On 9/1/22 16:37, Kevin Tian wrote:
>>> From: Yi Liu
>>>
>>> and replace kref. With it a 'vfio-dev/vfioX' node is created under the
>>> sysfs path of the parent, indicating the device is bound to a vfio
>>>
On 07/09/2022 14:48, Tvrtko Ursulin wrote:
On 06/09/2022 17:14, Tvrtko Ursulin wrote:
On 05/09/2022 10:34, Tvrtko Ursulin wrote:
On 01/09/2022 19:38, Niranjana Vishwanathapura wrote:
So far, different views (normal, partial, rotated and remapped)
into the same object are only supported fo
Hi,
this is another respin of patch set for cleaning up and fixes for UDL
driver [*]. It covers the PM problems, regressions in the previous
patch set, fixes for the stalls on some systems, as well as more
hardening.
thanks,
Takashi
[*] v2: https://lore.kernel.org/r/20220906073951.2085-1-ti..
From: Thomas Zimmermann
Implement the reset_resume callback of struct usb_driver. Set the
standard channel when called.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Signed-off-by: Takashi Iwai
---
drivers/gpu/drm/udl/udl_drv.c | 11 +++
drivers/gpu/drm/udl/udl_drv.h
This reverts the recent fix commit
e25d5954264d ("drm/udl: Kill pending URBs at suspend and disconnect")
as it turned out to lead to potential hangup at a disconnection, and
it doesn't help much for suspend/resume problem, either.
Acked-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
---
dr
Restore the display mode whne resuming from suspend. Currently, the
display remains dark.
On resume, the CRTC's mode does not change, but the 'active' flag
changes to 'true'. Taking this into account when considering a mode
switch restores the display mode.
The bug is reproducable by using Gnome
It seems that the current size (4) for the URB list is too small on
some devices, and it resulted in the occasional stalls. Increase the
default URB list size to 20 for working around it.
Acked-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
---
drivers/gpu/drm/udl/udl_main.c | 2 +-
1 file
From: Thomas Zimmermann
Call drm_plane_enable_fb_damage_clips() and give userspace a chance
of minimizing the updated display area.
Signed-off-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
---
drivers/gpu/drm/udl/udl_modeset.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gp
A couple of error handlings forgot to process the URB completion.
Those are both with WARN_ON() so should be visible, but we must fix
them in anyway.
Fixes: 7350b2a3fbc6 ("drm/udl: Replace BUG_ON() with WARN_ON()")
Acked-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
---
drivers/gpu/drm/udl/
udl_alloc_urb_list() retires the allocation if there is no enough room
left, and it reinitializes the stuff unnecessarily such as the linked
list head and the waitqueue, which could be harmful. Those should be
outside the retry loop.
Acked-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
---
In the current design, udl_get_urb() may be called asynchronously
during the driver freeing its URL list via udl_free_urb_list().
The problem is that the sync is determined by comparing the urbs.count
and urbs.available fields, while we clear urbs.count field only once
after udl_free_urb_list() fin
Just for some code simplification.
Suggested-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
---
drivers/gpu/drm/udl/udl_modeset.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/udl/udl_modeset.c
b/drivers/gpu/drm/udl/udl_modeset.c
i
The driver may receive -EPROTO at the URB completion when the device
gets disconnected, and it's a normal situation. Suppress the error
print for that, too.
Signed-off-by: Takashi Iwai
---
drivers/gpu/drm/udl/udl_main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/udl/udl
It's better to perform the sync at the very last of the suspend
instead of the pipe-disable function, so that we can catch all pending
URBs (if any).
While we're at it, drop the error code from udl_sync_pending_urb()
since we basically ignore it; instead, give a clear error message
indicating a pr
The alignment of damaged area was needed for the original udlfb driver
that tried to trim the superfluous copies between front and backend
buffers and handle data in long int. It's not the case for udl DRM
driver, hence we can omit the whole unneeded alignment, as well as the
dead code.
Acked-by:
On 06/09/2022 16:30, Clément Péron wrote:
> Enabling panfrost GPU OPP with dynamic regulator will make OPP
> responsible to enable and configure it.
>
> Unfortunatly OPP configure and enable the regulator when an OPP
NIT: Unfortunately
> is asked to be set, which is not the case during
> panfros
Hi Daniel,
On Wed, 7 Sept 2022 at 01:29, Daniel Vetter wrote:
>
> On Fri, Aug 19, 2022 at 01:54:31PM +0530, Sumit Garg wrote:
> > Hi Olivier,
> >
> > On Fri, 12 Aug 2022 at 20:01, Olivier Masse wrote:
> > >
> > > Add a new ioctl called TEE_IOC_SHM_REGISTER_FD to register a
> > > shared memory fr
On Thu, 8 Sept 2022 at 14:48, Olivier Masse wrote:
>
> Hi Sumit
>
> On ven., 2022-08-19 at 13:54 +0530, Sumit Garg wrote:
> > Caution: EXT Email
> >
> > Hi Olivier,
> >
> > On Fri, 12 Aug 2022 at 20:01, Olivier Masse
> > wrote:
> > >
> > > Add a new ioctl called TEE_IOC_SHM_REGISTER_FD to registe
Smatch warns:
drivers/gpu/drm/vkms/vkms_plane.c:110 vkms_plane_atomic_update() warn:
variable dereferenced before check 'fb' (see line 108)
Fix the warning by moving the dereference after the NULL check.
Fixes: 8ba1648567e2 ("drm: vkms: Refactor the plane composer to accept new
formats")
Signe
On Tue, Sep 6, 2022 at 1:01 PM Daniel Vetter wrote:
>
> On Mon, Aug 15, 2022 at 12:05:19PM +0200, Christian König wrote:
> > Am 15.08.22 um 11:54 schrieb Dmitry Osipenko:
> > > Higher order pages allocated using alloc_pages() aren't refcounted and
> > > they
> > > need to be refcounted, otherwise
On 9/8/2022 11:34 AM, Christian König wrote:
Am 07.09.22 um 19:00 schrieb Daniel Vetter:
[SNIP]
I'm a bit confused why the bloat here ...
Drivers do have specialized implementations of the backend, e.g.
VMWGFX have
his handle backend, amdgpu the VRAM backend with special placements,
i915 i
On Wed, Sep 07, 2022 at 01:30:41PM -0700, Lucas De Marchi wrote:
> Continue converting the driver to the convention of last version first,
> extending it to the future platforms. Now, any GRAPHICS_VER >= 11 will
> be handled by the first branch.
>
> With the new ranges it's easier to see what plat
Hi,
On Tue, Aug 30, 2022 at 10:01:11AM -0300, Maíra Canal wrote:
> On 8/29/22 10:11, Maxime Ripard wrote:
> > Multiple drivers (meson, vc4, sun4i) define analog TV 525-lines and
> > 625-lines modes in their drivers.
> >
> > Since those modes are fairly standard, and that we'll need to use them
>
Hi Noralf,
On Tue, Aug 30, 2022 at 09:01:08PM +0200, Noralf Trønnes wrote:
> > +static const struct drm_prop_enum_list tv_mode_names[] = {
>
> Maybe call it legacy_tv_mode_enums?
>
> >
> > + { VC4_VEC_TV_MODE_NTSC, "NTSC", },
> >
> > + { VC4_VEC_TV_MODE_NTSC_J, "NTSC-J", },
> >
> > + {
Hi Maxime,
W dniu 08.09.2022 o 13:23, Maxime Ripard pisze:
> Hi Noralf,
>
> On Tue, Aug 30, 2022 at 09:01:08PM +0200, Noralf Trønnes wrote:
>>> +static const struct drm_prop_enum_list tv_mode_names[] = {
>>
>> Maybe call it legacy_tv_mode_enums?
>>
>>>
>>> + { VC4_VEC_TV_MODE_NTSC, "NTSC", },
>
Den 08.09.2022 13.23, skrev Maxime Ripard:
> Hi Noralf,
>
> On Tue, Aug 30, 2022 at 09:01:08PM +0200, Noralf Trønnes wrote:
>>> +static const struct drm_prop_enum_list tv_mode_names[] = {
>>
>> Maybe call it legacy_tv_mode_enums?
>>
>>>
>>> + { VC4_VEC_TV_MODE_NTSC, "NTSC", },
>>>
>>> + { V
Hi Greg,
I got it, Greg.
Mid-Autumn Festival is coming and I will have a couple of days off.
I'll see what I can do after holiday :)
Regards,
Zheng Wang
在 2022年9月8日星期四，Greg KH 写道：
> On Thu, Sep 08, 2022 at 05:09:40PM +0800, Zheng Hacker wrote:
> > Hi Zhenyu,
> >
> > This issue has been open
On Thu, Sep 08, 2022 at 01:31:34PM +0200, Mateusz Kwiatkowski wrote:
> W dniu 08.09.2022 o 13:23, Maxime Ripard pisze:
> > Hi Noralf,
> >
> > On Tue, Aug 30, 2022 at 09:01:08PM +0200, Noralf Trønnes wrote:
> >>> +static const struct drm_prop_enum_list tv_mode_names[] = {
> >>
> >> Maybe call it leg
On Thu, Sep 08, 2022 at 11:39:07AM +0200, Eric Auger wrote:
> >> I am not totally clear about remaining 'struct device *dev;' in
> >> vfio_device struct. I see it used in some places. Is it supposed to
> >> disappear at some point?
> >
> > no, Eric. *dev will not disappear, it stores the dev point
Hi Dave and Daniel,
this is the weekly PR for drm-misc-fixes.
Best regards
Thomas
drm-misc-fixes-2022-09-08:
Short summary of fixes pull:
* edid: Fix EDID 1.4 range-descriptor parsing
* panfrost: Fix devfreq OPP
* ttm: Fix ghost-object bulk moves
The following changes since commit a3f7c10a26
Hi
Am 08.09.22 um 11:51 schrieb Takashi Iwai:
Just for some code simplification.
Suggested-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
With my comments fixed, you can add
Acked-by: Thomas Zimmermann
---
drivers/gpu/drm/udl/udl_modeset.c | 20 +---
1 file changed
On Thu, 08 Sep 2022 14:47:52 +0200,
Thomas Zimmermann wrote:
>
> Hi
>
> Am 08.09.22 um 11:51 schrieb Takashi Iwai:
> > Just for some code simplification.
> >
> > Suggested-by: Thomas Zimmermann
> > Signed-off-by: Takashi Iwai
>
> With my comments fixed, you can add
>
> Acked-by: Thomas Zimme
On 31.08.2022 14:49, Radhakrishna Sripada wrote:
> Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
> From spec we have registers GPIO_CTL[1-5] mapped to native display phys and
> GPIO_CTL[9-12] are mapped to TC ports.
>
> v2:
> - Drop unused GPIO pins(MattR)
>
> BSpec: 4
On 01.09.2022 23:03, Radhakrishna Sripada wrote:
> Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
> From spec we have registers GPIO_CTL[1-5] mapped to native display phys and
> GPIO_CTL[9-12] are mapped to TC ports.
>
> v2:
> - Drop unused GPIO pins(MattR)
>
> BSpec: 4
On 06/09/2022 10:44, nathan.lu wrote:
> From: Nathan Lu
>
> modify VDOSYS0 display device tree Documentations for MT8188.
>
> Signed-off-by: Nathan Lu
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 06/09/2022 10:44, nathan.lu wrote:
> From: Nathan Lu
>
> modify VDOSYS0 mmsys device tree Documentations for MT8188.
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
Hi
Am 08.09.22 um 14:54 schrieb Takashi Iwai:
On Thu, 08 Sep 2022 14:47:52 +0200,
Thomas Zimmermann wrote:
Hi
Am 08.09.22 um 11:51 schrieb Takashi Iwai:
Just for some code simplification.
Suggested-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
With my comments fixed, you can add
Ac
On 06/09/2022 10:44, nathan.lu wrote:
> From: Nathan Lu
>
> modify VDOSYS0 mutex device tree Documentations for MT8188.
>
> Signed-off-by: Nathan Lu
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
Hi
Am 08.09.22 um 11:51 schrieb Takashi Iwai:
From: Thomas Zimmermann
Call drm_plane_enable_fb_damage_clips() and give userspace a chance
of minimizing the updated display area.
Signed-off-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
Daniel already gave an R-B here:
https://patchw
On 06/09/2022 10:44, nathan.lu wrote:
> From: Nathan Lu
>
> This path is based on [1] and [2]
> [1] Add MediaTek SoC(vdosys1) support for mt8195
> - https://patchwork.kernel.org/project/linux-mediatek/list/?series=658416
> [2] Add MediaTek SoC DRM (vdosys1) support for mt8195
> - https://
On Tue, Sep 6, 2022 at 3:58 PM Hamza Mahfooz wrote:
>
> Currently, we aren't handling DRM_IOCTL_MODE_DIRTYFB. So, use
> drm_atomic_helper_dirtyfb() as the dirty callback in the amdgpu_fb_funcs
> struct.
>
> Signed-off-by: Hamza Mahfooz
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu
On Wed, Aug 31, 2022 at 04:23:21AM +0200, Mateusz Kwiatkowski wrote:
> I tested your patchset on my Pi and it mostly works. Good work! However,
> I noticed a couple of issues.
>
> > -static int vc4_vec_encoder_atomic_check(struct drm_encoder *encoder,
> > - struct drm_crtc_state
Hi Christian
I need use entity->sched_list to track ring (ring = container_of(sched,
struct amdgpu_ring, sched))
during amdgpu_ctx_fini_entity.
I think change here to keep selected ring sched list in
entity->sched_list won't change the original logic too much.
Best Regards!
James
On 202
On Tue, Sep 6, 2022 at 10:38 PM Hans de Goede wrote:
>
> Fix gnome-shell (and other page-flip users) hanging after suspend/resume
> because of the gma500's IRQs not working.
>
> This fixes 2 problems with the IRQ handling:
>
> 1. gma_power_off() calls gma_irq_uninstall() which does a free_irq(), b
On 01/09/2022 12:23, Dmitry Baryshkov wrote:
> Split Mobile Display SubSystem (MDSS) root node bindings to the separate
> yaml file. Changes to the existing (txt) schema:
> - Added optional "vbif_nrt_phys" region used by msm8996
> - Made "bus" and "vsync" clocks optional (they are not used by som
Hi,
On 9/8/22 15:26, Patrik Jakobsson wrote:
> On Tue, Sep 6, 2022 at 10:38 PM Hans de Goede wrote:
>>
>> Fix gnome-shell (and other page-flip users) hanging after suspend/resume
>> because of the gma500's IRQs not working.
>>
>> This fixes 2 problems with the IRQ handling:
>>
>> 1. gma_power_off
On 01/09/2022 12:23, Dmitry Baryshkov wrote:
> In order to make the schema more readable, split dpu-sc7180 into the DPU
> and MDSS parts, each one describing just a single device binding.
>
> Signed-off-by: Dmitry Baryshkov
Thank you for your patch. There is something to discuss/improve.
> -
On 08/09/2022 15:44, Krzysztof Kozlowski wrote:
>> + interconnects:
>> +maxItems: 1
>> +
>> + interconnect-names:
>> +maxItems: 1
>> +
>> +patternProperties:
>> + "^display-controller@[0-9a-f]+$":
>> +type: object
>> +properties:
>> + compatible:
>> +const: qcom,sc71
Jadard JD9365DA-H3 is WUXGA MIPI DSI panel and it support TFT
dot matrix LCD with 800RGBx1280 dots at maximum.
Document it.
Cc: dri-devel@lists.freedesktop.org
Acked-by: Krzysztof Kozlowski
Signed-off-by: Jagan Teki
---
Changes for v2:
- collect Krzysztof ack
- rebased on drm-misc-next
.../di
Jadard JD9365DA-H3 is WUXGA MIPI DSI panel and it support TFT
dot matrix LCD with 800RGBx1280 dots at maximum.
Add support for it.
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Jagan Teki
---
Changes for v2:
- rebased on drm-misc-next
MAINTAINERS | 1 +
Hi Dave and Daniel,
A few fixes, but most targeting stable.
Here goes drm-intel-fixes-2022-09-08:
- Fix MIPI sequence block copy from BIOS' table. (Ville)
- Fix PCODE min freq setup when GuC's SLPC is in use. (Rodrigo)
- Implement Workaround for eDP. (Ville)
- Fix has_flat_ccs selection for DG1.
On Mon, 29 Aug 2022 15:11:50 +0200, Maxime Ripard wrote:
> Our mode_set implementation can be merged into our atomic_enable
> implementation to simplify things, so let's do this.
>
>
Applied to drm/drm-misc (drm-misc-next).
Thanks!
Maxime
On 9/8/22 06:15, wangjianli wrote:
> Delete the redundant word 'to'.
>
> Signed-off-by: wangjianli
> ---
> drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
> b/drivers/gpu/drm/vmwgfx/vmwg
On 08/09/2022 15:59, Jagan Teki wrote:
> Jadard JD9365DA-H3 is WUXGA MIPI DSI panel and it support TFT
> dot matrix LCD with 800RGBx1280 dots at maximum.
>
> Document it.
>
> Cc: dri-devel@lists.freedesktop.org
> Acked-by: Krzysztof Kozlowski
Reviewed-by: Krzysztof Kozlowski
> Signed-off-by
What's the reason for this entire patch set ?
Andrey
On 2022-09-07 16:57, James Zhu wrote:
drm_sched_pick_best returns struct drm_gpu_scheduler ** instead of
struct drm_gpu_scheduler *
Signed-off-by: James Zhu
---
include/drm/gpu_scheduler.h | 2 +-
1 file changed, 1 insertion(+), 1 deleti
On Tue, 6 Sep 2022 at 00:28 Javier Martinez Canillas
wrote:
> The simple display pipeline is a set of helpers that can be used by DRM
> drivers to avoid dealing with all the needed components and just define
> a few functions to operate a simple display device with one full-screen
> scanout buffe
Hi Andrey
Basically this entire patch set are derived from patch [3/4]:
entity->sched_list = num_sched_list > 1 ? sched_list : NULL;
I think no special reason to treat single and multiple schedule list here.
Best Regards!
James
On 2022-09-08 10:08 a.m., Andrey Grodzovsky wrote:
What's the
On 08/09/2022 16:12, Allen-KH Cheng wrote:
The width and height arguments in the cmdq packet for mtk_dither_config()
are inverted. We fix the incorrect width and height for dither settings
in mtk_dither_config().
Fixes: 73d3724745db ("drm/mediatek: Adjust to the alphabetic order for
mediatek
I guess it's an option but i don't really see what's the added value ?
You saved a few lines in this patch
but added a few lines in another. In total seems to me no to much
difference ?
Andrey
On 2022-09-08 10:17, James Zhu wrote:
Hi Andrey
Basically this entire patch set are derived from p
On 08/09/2022 10:26, Kalyan Thota wrote:
Flush mechanism for DSPP blocks has changed in sc7280 family, it
allows individual sub blocks to be flushed in coordination with
master flush control.
Representation: master_flush && (PCC_flush | IGC_flush .. etc )
This change adds necessary support for
To save lines is not the purpose.
Also I want to use entity->sched_list to track ring which is used in
this ctx in amdgpu_ctx_fini_entity
Best Regards!
James
On 2022-09-08 10:38 a.m., Andrey Grodzovsky wrote:
I guess it's an option but i don't really see what's the added value
? You saved
On 30/08/2022 06:33, Abhinav Kumar wrote:
DSI interface used with a bridge chip connected to an external
display is subject to the same pixel clock limits as one
which is natively pluggable like DisplayPort.
Hence filter out DSI modes having an unsupported pixel clock
if its connected to a bridg
On 08/09/2022 03:08, Abhinav Kumar wrote:
On 6/17/2022 4:33 PM, Dmitry Baryshkov wrote:
If worker creation fails, nullify the event_thread->worker, so that
msm_drm_uninit() doesn't try accessing invalid memory location. While we
are at it, remove duplicate assignment to the ret variable.
Fixe
Hi Jagan
On Thu, 8 Sept 2022 at 15:00, Jagan Teki wrote:
>
> Jadard JD9365DA-H3 is WUXGA MIPI DSI panel and it support TFT
> dot matrix LCD with 800RGBx1280 dots at maximum.
Sorry, I'm confused by this commit text.
WUXGA is normally defined as 1920x1200.
So the panel is 1920x1200, but it suppor
So this is the real need of this patch-set, but this explanation doesn't
appear anywhere in the description.
It's always good to add a short 0 RFC patch which describes the
intention of the patchset if the code is
not self explanatory.
And I still don't understand the need - i don't see anythin
Yes, it is for NPI design. I will send out patches for review soon.
Thanks!
James
On 2022-09-08 11:05 a.m., Andrey Grodzovsky wrote:
So this is the real need of this patch-set, but this explanation
doesn't appear anywhere in the description.
It's always good to add a short 0 RFC patch which d
On 07/09/2022 15:35, Chris Morgan wrote:
> On Wed, Sep 07, 2022 at 02:53:56PM +0200, Krzysztof Kozlowski wrote:
>> On 06/09/2022 20:52, Chris Morgan wrote:
>>> From: Chris Morgan
>>>
>>> Add documentation for the NewVision NV3051D panel bindings.
>>> Note that for the two expected consumers of thi
Always keep selected ring sched list in ctx entity.
Later entity->sched_list can always be used to track ring which
is used in this ctx in amdgpu_ctx_fini_entity.
v2: fixed typo
v3. Update comments
Signed-off-by: James Zhu
---
drivers/gpu/drm/scheduler/sched_entity.c | 7 ++-
1 file changed
Hi,
On Thu, Sep 8, 2022 at 1:55 AM Chen-Yu Tsai wrote:
>
> Commit 52824ca4502d ("drm/panel-edp: Better describe eDP panel delays")
> clarified the various delays used for eDP panels, tying them to the eDP
> panel timing diagram.
>
> For Innolux N116BCA-EA1, .prepare_to_enable would be:
>
> t4
Hi,
On Thu, Sep 8, 2022 at 1:55 AM Chen-Yu Tsai wrote:
>
> This panel has the same delay timing as N116BCA-EA1 from the same
> company, which is also the same as delay_200_500_e80_d50.
>
> Add an entry for it.
>
> Signed-off-by: Chen-Yu Tsai
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1
DOWNSPREAD_CTRL (0x107) shall be cleared to 0 upon power-on reset or an
upstream device disconnect. This patch will enforce this rule by always
cleared DOWNSPREAD_CTRL register to 0 before start link training. At rare
case that DP MSA timing parameters may be mis-interpreted by the sink
which cause
Hi Dave, Daniel,
New stuff for 6.1.
The following changes since commit 085292c3d78015412b752ee1ca4c7725fd2bf2fc:
Revert "drm/amd/amdgpu: add pipe1 hardware support" (2022-08-16 18:14:31
-0400)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd
Perf limit reasons bit positions were off by one.
Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces")
Cc: sta...@vger.kernel.org # v5.18+
Signed-off-by: Ashutosh Dixit
Acked-by: Andi Shyti
Reviewed-by: Sujaritha Sundaresan
---
drivers/gpu/drm/i915/i915_reg.h | 16 +
On Thu, 08 Sep 2022 08:58:21 -0700, Ashutosh Dixit wrote:
>
> Perf limit reasons bit positions were off by one.
>
> Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces")
> Cc: sta...@vger.kernel.org # v5.18+
> Signed-off-by: Ashutosh Dixit
> Acked-by: Andi Shyti
> Reviewed-
On Thu, 8 Sept 2022 at 18:38, Kuogee Hsieh wrote:
>
> DOWNSPREAD_CTRL (0x107) shall be cleared to 0 upon power-on reset or an
> upstream device disconnect. This patch will enforce this rule by always
> cleared DOWNSPREAD_CTRL register to 0 before start link training. At rare
> case that DP MSA tim
On 07-09-2022 05:19, Matt Roper wrote:
> We're going to introduce an additional intel_gt for MTL's media unit
> soon. Let's provide a bit more multi-GT initialization framework in
> preparation for that. The initialization will pull the list of GTs for
> a platform from the device info structu
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