On Mon, Sep 7, 2020 at 8:39 AM Gerd Hoffmann wrote:
>
> > > + /**
> > > +* @max_segment:
> > > +*
> > > +* Max size for scatter list segments. When unset the default
> > > +* (SCATTERLIST_MAX_SEGMENT) is used.
> > > +*/
> > > + size_t max_segment;
> >
> > Is there no bette
On Sun, Sep 6, 2020 at 1:19 PM Jan Kiszka wrote:
>
> On 11.02.20 18:04, Daniel Vetter wrote:
> > On Tue, Feb 11, 2020 at 06:22:07PM +0200, Ville Syrjala wrote:
> >> From: Ville Syrjälä
> >>
> >> WARN if the encoder possible_crtcs is effectively empty or contains
> >> bits for non-existing crtcs.
if of_find_device_by_node() succeed, mtk_ddp_comp_init() doesn't have
a corresponding put_device(). Thus add put_device() to fix the exception
handling for this function implementation.
Fixes: d0afe37f5209 ("drm/mediatek: support CMDQ interface in ddp component")
Signed-off-by: Yu Kuai
---
drive
The secondary video layer (VI) on "Allwinner V3s" displays
decoded video (YUV) in wrong colors. The secondary
CSC should be programmed.
Let's correct CSC register offset and extend regmap size.
Regards.
Martin Cerveny (2):
drm/sun4i: sun8i-csc: Secondary CSC register correction
drm/sun4i: mi
"Allwinner V3s" has secondary video layer (VI).
Decoded video is displayed in wrong colors until
secondary CSC registers are programmed correctly.
Signed-off-by: Martin Cerveny
---
drivers/gpu/drm/sun4i/sun8i_csc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/d
05.09.2020 13:34, Mikko Perttunen пишет:
...
> +
> +/**
> + * host1x_syncpt_put() - free a requested syncpoint
> + * @sp: host1x syncpoint
> + *
> + * Release a syncpoint previously allocated using host1x_syncpt_request(). A
> + * host1x client driver should call this when the syncpoint is no longe
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Drivers using legacy PCI power management .suspend()/.resume() callbacks
have to manage PCI states and device's PM states themselves. They also
need to take care of standard configuration registers.
Switch to generic power management framework using a "struct dev_pm_ops"
variable to take the unnec
Better guess. Secondary CSC registers are from 0xF.
Signed-off-by: Martin Cerveny
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index cc4fb916318f..c330402
Fixes commit 42ddb453a0cd ("radeon: Conditionally compile PM code")
Before the above mentioned patch, codes between the line number 547 and
2803 were already inside "#ifdef CONFIG_PM" container. Thus, addition of
"#if defined(CONFIG_PM)" was not required in the patch. It also affected
the "#ifdef
On Mon, Sep 07, 2020 at 08:48:10AM +0200, Greg KH wrote:
> On Mon, Sep 07, 2020 at 12:03:47PM +0530, Vaibhav Gupta wrote:
> >
>
> Why did you send empty emails out?
>
> greg k-h
I was trying to re-ping the patches. Guess it went empty. I will send patches
again.
Vaibhav
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Linux Kernel Mentee: Remove Legacy Power Management.
The original goal of the patch series is to upgrade the power management
framework of radeonfb fbdev driver. This has been done by upgrading .suspend()
and .resume() callbacks.
The upgrade makes sure that the involvement of PCI Core does not c
On 11.02.20 18:04, Daniel Vetter wrote:
> On Tue, Feb 11, 2020 at 06:22:07PM +0200, Ville Syrjala wrote:
>> From: Ville Syrjälä
>>
>> WARN if the encoder possible_crtcs is effectively empty or contains
>> bits for non-existing crtcs.
>>
>> v2: Move to drm_mode_config_validate() (Daniel)
>> Mak
Please review this patch-series.
Thank you
Vaibhav Gupta
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On Fri, Sep 04, 2020 at 12:38:22PM +0100, Daniel Thompson wrote:
> On Mon, Jul 20, 2020 at 09:25:21PM -0700, Alexandru Stan wrote:
> > Some displays need the low end of the curve cropped in order to make
> > them happy. In that case we still want to have the 0% point, even though
> > anything betwe
On Thu, Aug 06, 2020 at 12:52:54PM +0530, Vaibhav Gupta wrote:
> Linux Kernel Mentee: Remove Legacy Power Management.
>
> The original goal of the patch series is to upgrade the power management
> framework of radeonfb fbdev driver. This has been done by upgrading .suspend()
> and .resume() callb
On Fri, Sep 04, 2020 at 12:43:04PM +0200, Michel Dänzer wrote:
> From: Michel Dänzer
>
> Don't check drm_crtc_state::active for this either, per its
> documentation in include/drm/drm_crtc.h:
>
> * Hence drivers must not consult @active in their various
> * &drm_mode_config_funcs.atomic_check
On 01/07/2020 16:31, Yannick Fertre wrote:
> From: Antonio Borneo
>
> Current code does not properly computes the max length of LP
> commands that can be send during H or V sync, and rely on static
> values.
> Limiting the max LP length to 4 byte during the V-sync is overly
> conservative.
>
> R
On 01/07/2020 21:42, Yannick Fertre wrote:
> From: Antonio Borneo
>
> Current code enables the HS clock when video mode is started or to
> send out a HS command, and disables the HS clock to send out a LP
> command. This is not what DSI spec specify.
>
> Enable HS clock either in command and in
On 08/07/2020 16:08, Yannick Fertre wrote:
> From: Antonio Borneo
>
> Current code only sends LP commands in command mode.
>
> Allows sending LP commands also in video mode by setting the
> proper flag in DSI_VID_MODE_CFG.
>
> Signed-off-by: Antonio Borneo
> ---
> drivers/gpu/drm/bridge/synop
On Sat, Sep 05, 2020 at 11:50:05AM -0400, Alex Deucher wrote:
> On Thu, Sep 3, 2020 at 9:22 PM Luben Tuikov wrote:
> >
> > Convert to using devm_drm_dev_alloc(),
> > as drm_dev_init() is going away.
> >
> > Signed-off-by: Luben Tuikov
>
> I think we can drop the final drm_put in the error case?
On Mon, Sep 07, 2020 at 10:06:08AM +0200, Daniel Vetter wrote:
> On Sat, Sep 05, 2020 at 11:50:05AM -0400, Alex Deucher wrote:
> > On Thu, Sep 3, 2020 at 9:22 PM Luben Tuikov wrote:
> > >
> > > Convert to using devm_drm_dev_alloc(),
> > > as drm_dev_init() is going away.
> > >
> > > Signed-off-by:
Hi,
On 06/04/2020 15:49, Angelo Ribeiro wrote:
> Add support for the video pattern generator (VPG) BER pattern mode and
> configuration in runtime.
>
> This enables using the debugfs interface to manipulate the VPG after
> the pipeline is set.
> Also, enables the usage of the VPG BER pattern.
>
The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a),
with a custom
glue managing the IP resets, clock and data input similar to the DW-HDMI Glue
on other
Amlogic SoCs.
This adds support for the Glue managing the transceiver, mimicing the init flow
provided
by Amlogic to s
The Amlogic AXG SoC family has a downgraded VPU supporting only MIPI-DSI output
after it's ENCL DPI encoder output.
Signed-off-by: Neil Armstrong
---
.../bindings/display/amlogic,meson-vpu.yaml | 36 +--
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/Documentati
The Amlogic AXG SoC family has a downgraded VPU with the following
changes :
- Only a single OSD plane, no overlay video plane
- The primary plane doesn't support HW scaling
- The pixels are read directly from DDR without any Canvas module
- Doesn't support HDMI or CVBS
- Ouputs only with ENCL enco
This adds supports for the ENCL encoder connected to a MIPI-DSI transceiver on
the
Amlogic AXG SoCs.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_venc.c | 230 -
drivers/gpu/drm/meson/meson_venc.h | 6 +
drivers/gpu/drm/meson/meson_vpp.h | 2 +
The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a),
with a custom
glue managing the IP resets, clock and data input similar to the DW-HDMI Glue
on other
Amlogic SoCs.
Signed-off-by: Neil Armstrong
---
.../display/amlogic,meson-dw-mipi-dsi.yaml| 115 +
The Amlogic AXG SoC family has a downgraded VPU with the following
changes :
- Only a single OSD plane, no overlay video plane
- The primary plane doesn't support HW scaling
- The pixels are read directly from DDR without any Canvas module
- Doesn't support HDMI or CVBS
- Ouputs only with ENCL enco
The initial design was recursive to cover all port/endpoints, but only the
first layer
of endpoints should be covered by the components list.
This also breaks the MIPI-DSI init/bridge attach sequence, thus only parse the
first endpoints instead of recursing.
Signed-off-by: Neil Armstrong
---
dr
Gets rid of drmm_add_final_kfree, which I want to unexport so that it
stops confusion people about this transitional state of rolling drm
managed memory out.
This also fixes the missing drm_dev_put in the error path of the probe
code.
v2: Drop the misplaced drm_dev_put from zynqmp_dpsub_drm_init
On Fri, Sep 04, 2020 at 06:06:58PM +0200, Bas Nieuwenhuizen wrote:
> This adds modifier support to radeonsi.
> It has been tested on
>
> - VEGA10, RAVEN, NAVI14
> - weston, sway, X with xf86-video-amdgpu (i.e. legacy path still works)
>
> and includes some basic testing of the layout code.
>
> T
On Wed, Sep 02, 2020 at 02:59:49PM +, Simon Ser wrote:
> On Wednesday, September 2, 2020 4:29 PM, Daniel Vetter
> wrote:
>
> > On Wed, Sep 2, 2020 at 2:49 PM Simon Ser cont...@emersion.fr wrote:
> >
> > > On Wednesday, September 2, 2020 2:44 PM, Daniel Vetter
> > > daniel.vet...@ffwll.ch wr
On Monday, September 7, 2020 10:31 AM, Daniel Vetter wrote:
> On Wed, Sep 02, 2020 at 02:59:49PM +, Simon Ser wrote:
>
> > On Wednesday, September 2, 2020 4:29 PM, Daniel Vetter
> > daniel.vet...@ffwll.ch wrote:
> >
> > > On Wed, Sep 2, 2020 at 2:49 PM Simon Ser cont...@emersion.fr wrote:
>
On Mon, Sep 07, 2020 at 08:33:41AM +0200, Gerd Hoffmann wrote:
> virtio-gpu must make sure scatter list segments are not too big.
>
> Gerd Hoffmann (2):
> drm: allow limiting the scatter list size.
> drm/virtio: set max_segment
So this all feels a bit irky and mid-layer, and why can't the var
On Mon, Sep 07, 2020 at 08:37:31AM +, Simon Ser wrote:
> On Monday, September 7, 2020 10:31 AM, Daniel Vetter wrote:
>
> > On Wed, Sep 02, 2020 at 02:59:49PM +, Simon Ser wrote:
> >
> > > On Wednesday, September 2, 2020 4:29 PM, Daniel Vetter
> > > daniel.vet...@ffwll.ch wrote:
> > >
> >
On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
> The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a),
> with a custom
> glue managing the IP resets, clock and data input similar to the DW-HDMI Glue
> on other
> Amlogic SoCs.
>
> This adds support for the G
On Mon, Sep 07, 2020 at 10:43:51AM +0200, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
> > The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a),
> > with a custom
> > glue managing the IP resets, clock and data input similar to the DW
Hi Bas,
2 small typos you may want to fix:
On 04/09/2020 18:07, Bas Nieuwenhuizen wrote:
> This adds modifiers for GFX9+ AMD GPUs.
>
> As the modifiers need a lot of parameters I split things out in
> getters and setters.
> - Advantage: simplifies the code a lot
> - Disadvantage: Makes it ha
Den fre 4 sep. 2020 kl 18:07 skrev Bas Nieuwenhuizen <
b...@basnieuwenhuizen.nl>:
> This adds modifier support to radeonsi.
>
Wouldn't it be more correct to say that this adds modifier support to
amdgpu (and enables it to work with radeonsi OpenGL)
or something like that?
//E
> It has been tes
On 07/09/2020 10:44, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 10:43:51AM +0200, Daniel Vetter wrote:
>> On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
>>> The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a),
>>> with a custom
>>> glue managing the IP r
On Mon, 7 Sep 2020 10:41:37 +0200
Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 08:37:31AM +, Simon Ser wrote:
> > On Monday, September 7, 2020 10:31 AM, Daniel Vetter
> > wrote:
> >
> > > On Wed, Sep 02, 2020 at 02:59:49PM +, Simon Ser wrote:
> > >
> > > > On Wednesday, September
This fixes the following warnings while building in W=1 :
dw-mipi-dsi.c:1002:5: warning: no previous prototype for
'dw_mipi_dsi_debugfs_write' [-Wmissing-prototypes]
dw-mipi-dsi.c:1027:5: warning: no previous prototype for
'dw_mipi_dsi_debugfs_show' [-Wmissing-prototypes]
Fixes: e2435d69204c ("d
On 2020-09-07 9:55 a.m., Daniel Vetter wrote:
On Thu, Aug 06, 2020 at 12:52:54PM +0530, Vaibhav Gupta wrote:
Linux Kernel Mentee: Remove Legacy Power Management.
The original goal of the patch series is to upgrade the power management
framework of radeonfb fbdev driver. This has been done by up
Hi,
Please ignore this serie, the vendors patch is missing and the panel driver
still has the vrefresh...
Will repost.
Neil
On 04/09/2020 18:15, Neil Armstrong wrote:
> This adds support bindings and support for the TDO TL070WSH30 TFT-LCD panel
> module shipped with the Amlogic S400 Development
https://bugzilla.kernel.org/show_bug.cgi?id=204987
Bhasker C V (bhas...@unixindia.com) changed:
What|Removed |Added
CC||bhas...@unixindia.co
https://bugzilla.kernel.org/show_bug.cgi?id=204987
--- Comment #4 from Bhasker C V (bhas...@unixindia.com) ---
Created attachment 292395
--> https://bugzilla.kernel.org/attachment.cgi?id=292395&action=edit
Kernel crash AMD GPU at amdgpu_dm_atomic_commit_tail
--
You are receiving this mail beca
On Mon, Sep 07, 2020 at 12:33:41PM +0200, Neil Armstrong wrote:
> Hi,
>
> Please ignore this serie, the vendors patch is missing and the panel driver
> still has the vrefresh...
>
> Will repost.
Please fix so DRM_DEV_* is replaced by dev_* logging.
We no longer use the DRM_ based logging for pan
Hi Sam,
On 07/09/2020 12:54, Sam Ravnborg wrote:
> On Mon, Sep 07, 2020 at 12:33:41PM +0200, Neil Armstrong wrote:
>> Hi,
>>
>> Please ignore this serie, the vendors patch is missing and the panel driver
>> still has the vrefresh...
>>
>> Will repost.
>
> Please fix so DRM_DEV_* is replaced by de
On Fri, Sep 04, 2020 at 12:21:26AM -0700, Zwane Mwaikambo wrote:
> I observed this when unplugging a DP monitor whilst a computer is asleep
> and then waking it up. This left DP chardev nodes still being present on
> the filesystem and accessing these device nodes caused an oops because
> drm_dp
This adds support bindings and support for the TDO TL070WSH30 TFT-LCD panel
module shipped with the Amlogic S400 Development Kit.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
Changes
Shanghai Top Display Optolelectronics Co., Ltd is a display manufacturer
from Shanghai.
Web site of the company: http://www.shtdo.com/
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/dev
This add the bindings for the 1024*600 tl070wsh30 DSI panel.
Signed-off-by: Neil Armstrong
---
.../display/panel/tdo,tl070wsh30.yaml | 58 +++
1 file changed, 58 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/tdo,tl070wsh30.yaml
diff -
This adds support for the TDO TL070WSH30 TFT-LCD panel module.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/Kconfig
On Mon, Sep 7, 2020 at 10:51 AM Ernst Sjöstrand wrote:
>
>
>
> Den fre 4 sep. 2020 kl 18:07 skrev Bas Nieuwenhuizen
> :
>>
>> This adds modifier support to radeonsi.
>
>
> Wouldn't it be more correct to say that this adds modifier support to amdgpu
> (and enables it to work with radeonsi OpenGL)
Thanks, fixed both locally.
On Mon, Sep 7, 2020 at 10:44 AM Pierre-Eric Pelloux-Prayer
wrote:
>
> Hi Bas,
>
> 2 small typos you may want to fix:
>
> On 04/09/2020 18:07, Bas Nieuwenhuizen wrote:
> > This adds modifiers for GFX9+ AMD GPUs.
> >
> > As the modifiers need a lot of parameters I split
Add drm_device argument to drm_prime_pages_to_sg(), so we can
call dma_max_mapping_size() to figure the segment size limit
and call into __sg_alloc_table_from_pages() with the correct
limit.
This fixes virtio-gpu with sev. Possibly it'll fix other bugs
too given that drm seems to totaly ignore se
virtio-gpu must make sure scatter list segments are not too big.
Gerd Hoffmann (1):
drm: allow limiting the scatter list size.
include/drm/drm_prime.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 3 ++-
drivers/gpu/drm/drm_gem_shmem_helper.c | 2 +-
driver
Hi Neil.
On Mon, Sep 07, 2020 at 01:10:26PM +0200, Neil Armstrong wrote:
> This add the bindings for the 1024*600 tl070wsh30 DSI panel.
The binding looks like a panel-simple-dsi.yaml candidate.
Only differen is enable-gpios versus reset-gpios
Could you check if we can use panel-simple-dsi-yaml.
Hi Maxime,
On 9/3/20 5:00 PM, Maxime Ripard wrote:
> Hi everyone,
>
> Here's a (pretty long) series to introduce support in the VC4 DRM driver
> for the display pipeline found in the BCM2711 (and thus the RaspberryPi 4).
>
> The main differences are that there's two HDMI controllers and that there
Hi Maxime,
On 9/3/20 5:01 PM, Maxime Ripard wrote:
> The HDMI controllers found in the BCM2711 SoC need some adjustments to the
> bindings, especially since the registers have been shuffled around in more
> register ranges.
>
> Reviewed-by: Rob Herring
> Tested-by: Chanwoo Choi
> Tested-by: Hoeg
From: Ville Syrjälä
The timestamping constants have nothing to do with any legacy state
so should not be updated from
drm_atomic_helper_update_legacy_modeset_state().
Let's make everyone call drm_atomic_helper_calc_timestamping_constants()
directly instead of relying on
drm_atomic_helper_update_
From: Ville Syrjälä
Put the vblank timestamping constants update loop into its own
function. It has no business living inside
drm_atomic_helper_update_legacy_modeset_state() so we'll be wanting
to move it out entirely. As a first step we'll still call it
from drm_atomic_helper_update_legacy_modes
From: Ville Syrjälä
We update the timestamping constants per-crtc explicitly in
intel_crtc_update_active_timings(). Furtermore the helper will
use uapi.adjusted_mode whereas we want hw.adjusted_mode. Thus
let's drop the helper call an rely on what we already have in
intel_crtc_update_active_timin
Hi Maxime,
On 9/3/20 5:01 PM, Maxime Ripard wrote:
> Now that all the drivers have been adjusted for it, let's bring in the
> necessary device tree changes.
>
> The VEC and PV3 are left out for now, since it will require a more specific
> clock setup.
>
> Reviewed-by: Dave Stevenson
> Tested-by:
This is used by TTM to communicate the physical address
which should be used with ioremap(), ioremap_wc(). We don't
need to separate the base and offset in any way here.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 7 ---
drivers/gpu/drm/drm_gem_ttm_helper
On Mon, 2020-09-07 at 09:55 +0200, Daniel Vetter wrote:
> On Thu, Aug 06, 2020 at 12:52:54PM +0530, Vaibhav Gupta wrote:
> > Linux Kernel Mentee: Remove Legacy Power Management.
> >
> > The original goal of the patch series is to upgrade the power
> > management
> > framework of radeonfb fbdev dr
Acked-by: Nirmoy Das
On 9/7/20 2:05 PM, Christian König wrote:
This is used by TTM to communicate the physical address
which should be used with ioremap(), ioremap_wc(). We don't
need to separate the base and offset in any way here.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/am
Hi Dave & Daniel,
Exactly same content as previous PR:
https://lists.freedesktop.org/archives/intel-gfx/2020-September/247626.html
Just rebased adding the missing S-o-b:s and updated "Fixes:" tags accordingly
as requested.
Regards, Joonas
***
drm-intel-gt-next-2020-09-07:
(Same content as dr
Hi Marek,
On Fri, Sep 4, 2020 at 3:35 PM Marek Szyprowski
wrote:
>
> Use recently introduced common wrappers operating directly on the struct
> sg_table objects and scatterlist page iterators to make the code a bit
> more compact, robust, easier to follow and copy/paste safe.
>
> No functional ch
Hi,
On 07/09/2020 13:45, Sam Ravnborg wrote:
> Hi Neil.
>
> On Mon, Sep 07, 2020 at 01:10:26PM +0200, Neil Armstrong wrote:
>> This add the bindings for the 1024*600 tl070wsh30 DSI panel.
>
> The binding looks like a panel-simple-dsi.yaml candidate.
> Only differen is enable-gpios versus reset-g
This is internal to TTM and should not be used by drivers directly.
Drop the call to qxl_ttm_io_mem_reserve() and use mem->start instead.
Signed-off-by: Christian König
---
drivers/gpu/drm/qxl/qxl_object.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm
This is used by TTM to communicate the physical address
which should be used with ioremap(), ioremap_wc(). We don't
need to separate the base and offset in any way here.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 7 ---
drivers/gpu/drm/drm_gem_ttm_helper
On Mon, Sep 7, 2020 at 11:07 AM Pekka Paalanen wrote:
>
> On Mon, 7 Sep 2020 10:41:37 +0200
> Daniel Vetter wrote:
>
> > On Mon, Sep 07, 2020 at 08:37:31AM +, Simon Ser wrote:
> > > On Monday, September 7, 2020 10:31 AM, Daniel Vetter
> > > wrote:
> > >
> > > > On Wed, Sep 02, 2020 at 02:59
On Mon, Sep 7, 2020 at 1:24 PM Gerd Hoffmann wrote:
>
> Add drm_device argument to drm_prime_pages_to_sg(), so we can
> call dma_max_mapping_size() to figure the segment size limit
> and call into __sg_alloc_table_from_pages() with the correct
> limit.
>
> This fixes virtio-gpu with sev. Possibly
Hi Tomasz,
On 07.09.2020 15:07, Tomasz Figa wrote:
> On Fri, Sep 4, 2020 at 3:35 PM Marek Szyprowski
> wrote:
>> Use recently introduced common wrappers operating directly on the struct
>> sg_table objects and scatterlist page iterators to make the code a bit
>> more compact, robust, easier to fo
If the hardware is still accessing memory after SMMU translation
is disabled (as part of smmu shutdown callback), then the
IOVAs (I/O virtual address) which it was using will go on the bus
as the physical addresses which will result in unknown crashes
like NoC/interconnect errors.
So, implement sh
On 07.09.2020 11:08, Sergei Shtylyov wrote:
From: Kuninori Morimoto
This patch adds VSP device nodes for R-Car M3-W+ (r8a77961) SoC.
This patch is test on R-Car M3-W+ Salvator-XS board.
Was tested?
The same comment to the patches 6 & 7.
Signed-off-by: Kuninori Morimoto
[...]
M
On 2020-08-26 17:26, Akash Asthana wrote:
Hi Roja,
On 8/20/2020 4:05 PM, Roja Rani Yarubandi wrote:
If the hardware is still accessing memory after SMMU translation
is disabled (as part of smmu shutdown callback), then the
IOVAs (I/O virtual address) which it was using will go on the bus
as the
Le dim. 30 août 2020 à 22:28, Sam Ravnborg a
écrit :
Hi Laurent.
>
> Please read the cover letter, it explains why it's done this way.
The
> whole point of this patchset is to merge DSI and DBI frameworks
in a
> way that can be maintained.
I think this proves the point that the pr
On 07.09.2020 5:58, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This patch adds FCP device nodes for R-Car M3-W+ (r8a77961) SoC.
This patch is test on R-Car M3-W+ Salvator-XS board.
Was tested?
Signed-off-by: Kuninori Morimoto
[...]
MBR, Sergei
__
Hello!
On 07.09.2020 5:59, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This patch enables HDMI Display on R-Car M3-W+ Salvator-XS board.
This patch is test on R-Car M3-W+ Salvator-XS board.
Was tested, perhaps?
Signed-off-by: Kuninori Morimoto
[...]
MBR, Sergei
___
On 04/09/2020 20:28, Jonathan Marek wrote:
Add support for SM8150 and SM8250 DSI.
Note I haven't tested SM8150 recently, but DSI is almost identical to SM8250.
On SM8250:
Tested-by: Dmitry Baryshkov
Jonathan Marek (3):
drm/msm/dsi: remove unused clk_pre/clk_post in msm_dsi_dphy_timing
On Thu, Aug 27, 2020 at 09:29:59AM -0400, Jim Quinlan wrote:
> On Thu, Aug 27, 2020 at 2:35 AM Christoph Hellwig wrote:
> >
> > On Tue, Aug 25, 2020 at 10:40:27AM -0700, Florian Fainelli wrote:
> > > Hi,
> > >
> > > On 8/24/2020 12:30 PM, Jim Quinlan wrote:
> > >>
> > >> Patchset Summary:
> > >>
Remove first assignment to info which is meaningless.
Put the width and higth check first.
This change is to make the code a bit readable.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/drm_framebuffer.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/dr
On 2020-08-26 17:25, Akash Asthana wrote:
Hi Roja,
On 8/20/2020 4:05 PM, Roja Rani Yarubandi wrote:
Store DMA mapping data in geni_i2c_dev struct to enhance DMA mapping
data scope. For example during shutdown callback to unmap DMA mapping,
this stored DMA mapping data can be used to call geni_s
On 07.09.2020 5:59, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This patch adds VSP device nodes for R-Car M3-W+ (r8a77961) SoC.
This patch is test on R-Car M3-W+ Salvator-XS board.
Was tested?
Signed-off-by: Kuninori Morimoto
[...]
MBR, Sergei
_
On Mon, Sep 07, 2020 at 09:55:59AM +0200, Daniel Vetter wrote:
> On Thu, Aug 06, 2020 at 12:52:54PM +0530, Vaibhav Gupta wrote:
> > Linux Kernel Mentee: Remove Legacy Power Management.
> >
> > The original goal of the patch series is to upgrade the power management
> > framework of radeonfb fbdev
Hi Morimoto-san,
On Mon, Sep 7, 2020 at 4:58 AM Kuninori Morimoto
wrote:
> From: Kuninori Morimoto
>
> Document the R-Car M3-W+ (R8A77961) SoC in the R-Car DU bindings.
>
> Signed-off-by: Kuninori Morimoto
Thanks for your patch!
> --- a/Documentation/devicetree/bindings/display/renesas,du.txt
On Mon, Sep 7, 2020 at 4:58 AM Kuninori Morimoto
wrote:
> From: Kuninori Morimoto
>
> This patch adds R-Car M3-W+ (R8A77961) SoC bindings.
>
> Signed-off-by: Kuninori Morimoto
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's
Hi
[This is an automated email]
This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all
The bot has tested the following trees: v5.8.7, v5.4.63, v4.19.143, v4.14.196,
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On Mon, Sep 7, 2020 at 4:02 PM Marek Szyprowski
wrote:
>
> Hi Tomasz,
>
> On 07.09.2020 15:07, Tomasz Figa wrote:
> > On Fri, Sep 4, 2020 at 3:35 PM Marek Szyprowski
> > wrote:
> >> Use recently introduced common wrappers operating directly on the struct
> >> sg_table objects and scatterlist page
Hi Morimoto-san,
On 07/09/2020 03:59, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> This patch adds VSP device nodes for R-Car M3-W+ (r8a77961) SoC.
> This patch is test on R-Car M3-W+ Salvator-XS board.
>
> Signed-off-by: Kuninori Morimoto
> ---
> arch/arm64/boot/dts/renesas/r8a7
The lcdif IP does not support a framebuffer pitch (stride) other than
the CRTC width. Check for equality and reject the state otherwise.
This prevents a distorted picture when using 640x800 and running the
Mesa graphics stack. Mesa tires to use a cache aligned stride, which
leads at that particula
Hi Stefan,
Thank you for the patch.
On Mon, Sep 07, 2020 at 06:03:43PM +0200, Stefan Agner wrote:
> The lcdif IP does not support a framebuffer pitch (stride) other than
> the CRTC width. Check for equality and reject the state otherwise.
>
> This prevents a distorted picture when using 640x800
From: Sandeep Raghuraman
[ Upstream commit d98299885c9ea140c1108545186593deba36c4ac ]
On my R9 390, the voltage was reported as a constant 1000 mV.
This was due to a bug in smu7_hwmgr.c, in the smu7_read_sensor()
function, where some magic constants were used in a condition,
to determine whether
From: Sandeep Raghuraman
[ Upstream commit d98299885c9ea140c1108545186593deba36c4ac ]
On my R9 390, the voltage was reported as a constant 1000 mV.
This was due to a bug in smu7_hwmgr.c, in the smu7_read_sensor()
function, where some magic constants were used in a condition,
to determine whether
From: Sandeep Raghuraman
[ Upstream commit d98299885c9ea140c1108545186593deba36c4ac ]
On my R9 390, the voltage was reported as a constant 1000 mV.
This was due to a bug in smu7_hwmgr.c, in the smu7_read_sensor()
function, where some magic constants were used in a condition,
to determine whether
https://bugzilla.kernel.org/show_bug.cgi?id=208997
Martin (martin...@gmx.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|
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