Hi Morimoto-san,
On 07/09/2020 03:59, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto <kuninori.morimoto...@renesas.com>
>
> This patch adds VSP device nodes for R-Car M3-W+ (r8a77961) SoC.
> This patch is test on R-Car M3-W+ Salvator-XS board.
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto...@renesas.com>
> ---
> arch/arm64/boot/dts/renesas/r8a77961.dtsi | 55 +++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> index fe0db11b9cb9..c2a6918ed5e6 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> @@ -2056,6 +2056,61 @@ fcpvd2: fcp@fea37000 {
> iommus = <&ipmmu_vi0 10>;
> };
The FCP's added are:
fcpf0: fcp@fe950000 {
fcpf1: fcp@fe951000 {
fcpvb0: fcp@fe96f000 {
fcpvb1: fcp@fe92f000 {
fcpvi0: fcp@fe9af000 {
fcpvi1: fcp@fe9bf000 {
fcpvd0: fcp@fea27000 {
fcpvd1: fcp@fea2f000 {
fcpvd2: fcp@fea37000 {
So indeed, the first fcpf0 comes before fe960000.
Do we keep the items grouped by the first occurrence? or sort the nodes
based on address?
for some reason I thought we were ordering based on address, but I see
other situations where we group too - so I'm confused (and wishing there
was an automatic tool to get the sorting correct without fuss).
Is there a set policy?
--
Kieran
> + vspb: vsp@fe960000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfe960000 0 0x8000>;
> + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 626>;
> + power-domains = <&sysc R8A77961_PD_A3VC>;
> + resets = <&cpg 626>;
> +
> + renesas,fcp = <&fcpvb0>;
> + };
> +
> + vspd0: vsp@fea20000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfea20000 0 0x5000>;
> + interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 623>;
> + power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
> + resets = <&cpg 623>;
> +
> + renesas,fcp = <&fcpvd0>;
> + };
> +
> + vspd1: vsp@fea28000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfea28000 0 0x5000>;
> + interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 622>;
> + power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
> + resets = <&cpg 622>;
> +
> + renesas,fcp = <&fcpvd1>;
> + };
> +
> + vspd2: vsp@fea30000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfea30000 0 0x5000>;
> + interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 621>;
> + power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
> + resets = <&cpg 621>;
> +
> + renesas,fcp = <&fcpvd2>;
> + };
> +
> + vspi0: vsp@fe9a0000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfe9a0000 0 0x8000>;
> + interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 631>;
> + power-domains = <&sysc R8A77961_PD_A3VC>;
> + resets = <&cpg 631>;
> +
> + renesas,fcp = <&fcpvi0>;
> + };
> +
> csi20: csi2@fea80000 {
> reg = <0 0xfea80000 0 0x10000>;
> /* placeholder */
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
