On Wed, Jun 14, 2017 at 1:15 AM, Dmitry Osipenko wrote:
> Commit bdd2f9cd ("Don't leak kernel pointer to userspace") added a mutex
> around staging IOCTL's, some of those mutexes are taken twice.
>
> Fixes: bdd2f9cd10eb ("drm/tegra: Don't leak kernel pointer to userspace")
> Signed-off-by: Dmitry
On Wed, Jun 14, 2017 at 1:15 AM, Dmitry Osipenko wrote:
> Commit 33a8eb8 ("Implement runtime PM") introduced HW reset control. It
> causes a hang on Tegra20 if both display controllers are utilized (RGB
> panel and HDMI). The TRM suggests that each display controller has its own
> reset control, a
Hi Andrzej,
Thanks for your review.
On 06/12/2017 10:16 PM, Andrzej Hajda wrote:
Hi Hoegeun,
Nice to see patches completing support for mainlined platforms.
On 09.06.2017 06:59, Hoegeun Kwon wrote:
This patch adds MIPI-DSI based S6E63J0X03 AMOLED LCD panel driver
which uses mipi_dsi bus to c
On Wed, Jun 14, 2017 at 1:15 AM, Dmitry Osipenko wrote:
> On Tegra20 an overlay plane should be clipped, otherwise its output is
> distorted once plane crosses display boundary.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/gpu/drm/tegra/dc.c | 29 +
> 1 file cha
On Wed, Jun 14, 2017 at 1:15 AM, Dmitry Osipenko wrote:
> On Tegra20 if plane has width or height equal to 0, it will be infinitely
> wide or tall. Let's disable the plane if it is invisible on atomic state
> committing to fix the issue. The Rockchip DRM driver does the same.
>
> Signed-off-by: Dm
On Wed, Jun 14, 2017 at 1:15 AM, Dmitry Osipenko wrote:
> There is no IOMMU on Tegra20, instead a GART would be picked as an IOMMU
> provider.
>
> Signed-off-by: Dmitry Osipenko
> Acked-by: Joerg Roedel
> ---
> drivers/gpu/drm/tegra/drm.c | 3 ++-
> drivers/gpu/host1x/dev.c| 3 ++-
> 2 file
On Wed, Jun 14, 2017 at 1:15 AM, Dmitry Osipenko wrote:
> The commands stream is prepended by the jobs class on the CDMA submission,
> so that explicitly setting a module class in the commands stream isn't
> necessary. The firewall initializes its class to 0 and the command stream
> that doesn't e
On Wed, Jun 14, 2017 at 1:15 AM, Dmitry Osipenko wrote:
> Check waits in the firewall in a way it is done for relocations.
>
> Signed-off-by: Dmitry Osipenko
> Reviewed-by: Mikko Perttunen
Reviewed-by: Erik Faye-Lund
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dri-de
On Wed, Jun 14, 2017 at 1:16 AM, Dmitry Osipenko wrote:
> The blocking gather copy allocation is a major performance downside of the
> Host1x firewall, it may take hundreds milliseconds which is unacceptable
> for the real-time graphics operations. Let's try a non-blocking allocation
> first as a
https://bugs.freedesktop.org/show_bug.cgi?id=93826
--- Comment #58 from q...@outlook.com ---
(In reply to iuno from comment #55)
> Make sure to raise the DC clock above the default value, e.g. to 625 MHz
> (value 62500)
>
> If you use amdgpu: in amdgpu_atombios.c adev->clock.default_dispclk
> If
On Tue, Jun 13, 2017 at 10:32:23AM -0700, Eric Anholt wrote:
Brian Starkey writes:
Hi Boris,
Sorry lost track of this thread.
On Tue, Jun 06, 2017 at 09:13:00PM +0200, Boris Brezillon wrote:
Hi Brian,
Le Mon, 5 Jun 2017 12:25:50 +0100,
Brian Starkey a écrit :
Hi Boris,
I can't speak f
On Thu, Jun 08, 2017 at 03:25:28PM +0200, Christoph Hellwig wrote:
> DMA_ERROR_CODE is not a public API and will go away. Instead properly
> unwind based on the loop counter.
Acked-By: Vinod Koul
--
~Vinod
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On Wed, Jun 14, 2017 at 10:32 AM, Dmitry Osipenko wrote:
> On 14.06.2017 10:56, Erik Faye-Lund wrote:
>> On Wed, Jun 14, 2017 at 1:16 AM, Dmitry Osipenko wrote:
>>> The blocking gather copy allocation is a major performance downside of the
>>> Host1x firewall, it may take hundreds milliseconds wh
The nonblocking modeset tests were failing on systems with a DP output,
because lijnk training could occur during the modeset.
With normal modesets we're protected by the connection_mutex lock,
but nonblocking modesets drop locks before completing. To get around
that, check if the most recent crtc
Moving the wait to a helper allows callers outside of the core to
wait for pending updates to complete.
This can be used to prevent races against nonblocking modesets.
Only the hw_done call in swap_state is moved to a helper, doing
it for the other callers requires too many changes and I think thi
These tests are reversed so it complains on every successful call and
stays quiet for every failure. Also we may as well preserve the error
code.
Fixes: f40a7b7558ef ("drm/i915: Initial selftests for exercising eviction")
Signed-off-by: Dan Carpenter
---
Static analysis. Not tested.
diff --git
Quoting Dan Carpenter (2017-06-14 10:14:52)
> These tests are reversed so it complains on every successful call and
> stays quiet for every failure. Also we may as well preserve the error
> code.
The test is correct. The expectation here is that i915_gem_object_ggtt_pin()
fails and reports ENOSPC
On Wed, Jun 14, 2017 at 10:29:57AM +0100, Chris Wilson wrote:
> Quoting Dan Carpenter (2017-06-14 10:14:52)
> > These tests are reversed so it complains on every successful call and
> > stays quiet for every failure. Also we may as well preserve the error
> > code.
>
> The test is correct. The ex
https://bugs.freedesktop.org/show_bug.cgi?id=101278
--- Comment #4 from Nicolai Hähnle ---
Created attachment 131949
--> https://bugs.freedesktop.org/attachment.cgi?id=131949&action=edit
Patch making the conditions even tighter
Odd. Maybe the game lies to you about tessellation being off? Anyw
https://bugs.freedesktop.org/show_bug.cgi?id=101278
--- Comment #5 from Nicolai Hähnle ---
Created attachment 131950
--> https://bugs.freedesktop.org/attachment.cgi?id=131950&action=edit
Alternative patch
If the patch from the previous comment works, could you please also try this
patch as an
We accidentally return ERR_PTR(0) which is NULL. The caller is not
expecting that and it leads to an Oops.
Fixes: dd59239a9862 ("amdkfd: init aperture once per process")
Signed-off-by: Dan Carpenter
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
b/drivers/gpu/drm/amd/amdkfd/kfd_process.
On 13 June 2017 at 10:45, Michel Dänzer wrote:
> From: Xiaojie Yuan
>
> v2: fix an off by one error and leading white spaces
> v3: use thread safe strtok_r(); initialize len before calling getline();
> change printf() to drmMsg(); add initial amdgpu.ids
> v4: integrate some recent internal ch
https://bugs.freedesktop.org/show_bug.cgi?id=101387
--- Comment #8 from Carlo Caione ---
Just a better description of what's going on and a couple of questions.
When amdgpu_atombios_crtc_powergate_init() is called this triggers the parsing
of the command table with index == 13 (>> execute C5C0 (
Hello Hoegeun,
my last question (does this regress the case "node required, but
absent") still stands.
Hoegeun Kwon wrote:
> Remove the error handling of bridge_node because the bridge_node is
> required optionally.
I don't think a construction like that exists. Either it's required, or
it's opt
On 13/06/2017 14:47, Colin King wrote:
From: Colin Ian King
The function cnl_ddi_dp_set_dpll_hw_state does not need to be in global
scope, so make it static.
Cleans up sparse warning:
"symbol 'cnl_ddi_dp_set_dpll_hw_state' was not declared. Should it
be static?"
Signed-off-by: Colin Ian Ki
On Tue, Jun 13, 2017 at 1:17 AM, Mario Kleiner
wrote:
> Commit e6b9a6c84b93
> ("drm/radeon: Make display watermark calculations more accurate")
> made watermark calculations more accurate, but not for > 4k
> resolutions on 32-Bit architectures, as it introduced an integer
> overflow for those setu
https://bugs.freedesktop.org/show_bug.cgi?id=96868
Psi changed:
What|Removed |Added
CC||w...@psitrax.de
--- Comment #28 from Psi ---
Are
On Friday, May 12, 2017 10:08:02 AM Jiri Slaby wrote:
> This is just a whitespace cleanup. The code was a mess having multiple
> commands on one line like:
> scr_writew(0xAA55, p); if (scr_readw(p) == 0xAA55) count++;
>
> Indent that properly and make it nicer for reading.
>
> Signed-off-by: Jiri
Hi all,
On 14-06-17 11:34, Michael Thayer wrote:
Hello Sean,
13.06.2017 20:03, Sean Paul wrote:
[Discussion of vboxvideo driver clean-up.]
First, thank you for your submission.
Thank you for your feedback.
[Discussion of the OS-independent code in the driver submission.]
I took a quick s
On Friday, May 12, 2017 10:08:03 AM Jiri Slaby wrote:
> Given every user of mda_vram_base expects a pointer, let
> mda_vram_base be a pointer to u16.
>
> The offset calculation in mda_detect had to be adjusted by / 2 (due to
> different pointer arithmetic now).
>
> We introduce a cast to a value
On Friday, May 12, 2017 10:08:04 AM Jiri Slaby wrote:
> MDA_ADDR is one of those macros which could be an inline function. So
> convert MDA_ADDR to mda_addr.
>
> Note that we take x and y as unsigned now. But they are absolute
> coordinates, so this is no problem.
>
> Signed-off-by: Jiri Slaby
>
On Wed, Jun 14, 2017 at 11:08:42AM +0200, Maarten Lankhorst wrote:
> The nonblocking modeset tests were failing on systems with a DP output,
> because lijnk training could occur during the modeset.
>
> With normal modesets we're protected by the connection_mutex lock,
> but nonblocking modesets dr
https://bugs.freedesktop.org/show_bug.cgi?id=96868
Alex Deucher changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On Tue, Jun 13, 2017 at 01:50:38PM -0400, mathieu.larou...@matrox.com wrote:
> From: Mathieu Larouche
>
> - Changed the HiPri value for G200e4 to always be 0.
> - Added Bandwith limitation to block resolution above 1920x1200x60Hz
Hi Mathieu,
There's no Signed-off-by on this patch, can you pl
On Wed, Jun 14, 2017 at 11:34:10AM +0200, Michael Thayer wrote:
> Hello Sean,
>
> 13.06.2017 20:03, Sean Paul wrote:
> [Discussion of vboxvideo driver clean-up.]
>
> > First, thank you for your submission.
>
> Thank you for your feedback.
>
> [Discussion of the OS-independent code in the driver
On Wed, Jun 14, 2017 at 11:08:41AM +0200, Maarten Lankhorst wrote:
> Moving the wait to a helper allows callers outside of the core to
> wait for pending updates to complete.
>
> This can be used to prevent races against nonblocking modesets.
> Only the hw_done call in swap_state is moved to a hel
Hi,
On 14-06-17 15:40, Michael Thayer wrote:
Hello Hans,
14.06.2017 15:30, Hans de Goede wrote:
[Discussion of vboxvideo and vboxguest driver clean-up.]
As I already mentioned in previous mails on this, for the vboxguest driver
my plan is to simply do a fork and remove anything related to the
https://bugs.freedesktop.org/show_bug.cgi?id=101224
--- Comment #5 from Nicolai Hähnle ---
FWIW, in Mesa debug builds, you can set the environment variable
MESA_DEBUG=incomplete_tex, and it will print out information about incomplete
textures. Might be a nice project for somebody to hook that up
On Thu, Jun 08, 2017 at 08:07:57PM +0200, Lucas Stach wrote:
> This adds support for the NLT Technologies NL192108AC18-02D
> 15.6" LVDS FullHD TFT LCD panel, which can be supported
> by the simple panel driver.
>
> Timings are taken from the preliminary datasheet, as a final
> one is not yet avail
On Thu, Jun 08, 2017 at 08:07:58PM +0200, Lucas Stach wrote:
> This adds support for the AU Optronics Corporation 31.5"
> FHD (1920x1080) LVDS TFT LCD panel, which can be supported
> by the simple panel driver
>
> Signed-off-by: Lucas Stach
> ---
> v2: mention power-supply property
> ---
> .../b
On Fri, Jun 09, 2017 at 01:59:12PM +0900, Hoegeun Kwon wrote:
> The Samsung s6e63j0x03 is a 1.63" 320x320 AMOLED panel connected using
> MIPI-DSI interfaces.
>
> Signed-off-by: Hoegeun Kwon
> ---
> .../bindings/display/panel/samsung,s6e63j0x03.txt | 24
> ++
> 1 file change
On Fri, Jun 09, 2017 at 03:10:36PM +0800, Mark Yao wrote:
> RK3399 and RK3288 shared the same HDMI IP controller, only some light
> difference with GRF configure.
>
> Signed-off-by: Yakir Yang
> Signed-off-by: Mark Yao
> ---
> Changes in v3:
> remove hdmi_phy_configure_dwc_hdmi_3d_tx callbak.
On Fri, Jun 09, 2017 at 03:10:41PM +0800, Mark Yao wrote:
> For RK3399 HDMI, there is an external clock need for HDMI PHY,
> and it should keep the same clock rate with VOP DCLK.
>
> VPLL have supported the clock for HDMI PHY, but there is no
> clock divider bewteen VPLL and HDMI PHY. So we need t
On Tue, Jun 13, 2017 at 6:52 PM, Sushmita Susheelendra
wrote:
> Buffer object specific resources like pages, domains, sg list
> need not be protected with struct_mutex. They can be protected
> with a buffer object level lock. This simplifies locking and
> makes it easier to avoid potential recursi
> -Original Message-
> From: Dan Carpenter [mailto:dan.carpen...@oracle.com]
> Sent: Wednesday, June 14, 2017 6:59 AM
> To: Oded Gabbay; Alexey Skidanov
> Cc: Deucher, Alexander; Koenig, Christian; David Airlie; dri-
> de...@lists.freedesktop.org; amd-...@lists.freedesktop.org; kernel-
> ja
On Fri, Mar 24, 2017 at 08:51:31AM +0800, Chris Zhong wrote:
> The Innolux P079ZCA is a 7.85" panel with a 768X1024 resolution and
> connected to DSI using four lanes.
>
> Signed-off-by: Chris Zhong
> Reviewed-by: Brian Norris
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
On Thu, Jun 08, 2017 at 08:07:55PM +0200, Lucas Stach wrote:
> This adds support for the NEC LCD Technologies, Ltd. 12.1"
> WXGA (1280x800) LVDS TFT LCD panel, which can be supported
> by the simple panel driver.
>
> Signed-off-by: Lucas Stach
> ---
> v2: new patch in V2
> ---
> .../bindings/dis
This patch series adds support for YCBCR HDMI output handling in DRM layer.
The main aim of this patch series was to handle YCBCR 4:2:0 output for
HDMI 2.0 displays. But while providing a framework to handle non-RGB
outputs, support for YCBCR 4:4:4 and 4:2:2 was also added.
First 2 patches, comple
CEA-861-F specs defines new video modes to be used with
HDMI 2.0 EDIDs. The VIC range has been extended from 1-64 to
1-107.
Our existing CEA modedb contains only 64 modes (VIC=1 to VIC=64). Now
to be able to parse new CEA modes using the existing methods, we have
to complete the modedb (VIC=65 onw
HDMI 1.4b support the CEA video modes as per range of CEA-861-D (VIC 1-64).
For any other mode, the VIC filed in AVI infoframes should be 0.
HDMI 2.0 sinks, support video modes range as per CEA-861-F spec, which is
extended to (VIC 1-107).
This patch adds a bool input variable, which indicates if
This patch adds a bool variable (is_hdmi2_src) in the drm connector
structure. While handling the EDID for HDMI 2.0 sinks, its important
to know if the source is HDMI 2.0 capable or not, so that a lot of
work can be done/bypassed based on this information. One such example
is adding YCBCR420 only m
HDMI 2.0 spec adds support for YCBCR420 sub-sampled output.
CEA-861-F adds two new blocks in EDID's CEA extension blocks,
to provide information about sink's YCBCR420 output capabilities.
These blocks are:
- YCBCR420vdb(YCBCR 420 video data block):
This block contains VICs of video modes, which c
To get a YCBCR420 output from intel platforms, we need one
scaler to scale down YCBCR444 samples to YCBCR420 samples.
This patch:
- Does scaler allocation for HDMI ycbcr420 outputs.
- Programs PIPE_MISC register for ycbcr420 output.
- Adds a new scaler user "HDMI output" to plug-into existing
sc
CEA-861-F spec adds ycbcr420 deep color support information
in hf-vsdb block. This patch extends the existing hf-vsdb parsing
function by adding parsing of ycbcr420 deep color support from the
EDID and adding it into display information stored.
V2: Rebase
V3: Rebase
Cc: Ville Syrjälä
Cc: Jose Ab
HDMI displays can support various output types, based on
the color space and subsampling type. The possible
outputs from a HDMI 2.0 monitor could be:
- RGB
- YCBCR 444
- YCBCR 422
- YCBCR 420
This patch adds a drm property "hdmi_output_format", using which,
a user can specify its preference, f
This patch checks encoder level support for HDMI YCBCR outputs.
HDMI output mode is a connector property, this patch checks if
source and sink can support the HDMI output type selected by user.
And if they both can, it commits the hdmi output type into crtc state,
for further staging in driver.
V2
To get HDMI YCBCR420 output, the PIPEMISC register should be
programmed to:
- Generate YCBCR output (bit 11)
- In case of YCBCR420 outputs, it should be programmed in full
blend mode to use the scaler in 5x3 ratio (bits 26 and 27)
This patch:
- Adds definition of these bits.
- Programs PIPEMISC
HDMI source must set output colorspace information in AVI
infoframes, so that the sink can decode upcoming frames
accordingly.
As this patch series is adding support for HDMI output modes
other than RGB, this patch adds a function in DRM layer, to
add the output colorspace information in the AVI i
To support ycbcr HDMI output, we need a pipe CSC block to
do the RGB->YCBCR conversion, as the blender output is in RGB.
Current Intel platforms have only one pipe CSC unit, so
we can either do color correction using it, or we can perform
RGB->YCBCR conversion.
This function adds a csc handler, t
This patch sets the is_hdmi2_src identifier in drm connector
for GLK platform. GLK contains a native HDMI 2.0 controller.
This identifier will help the EDID handling functions to save
lot of work which is specific to HDMI 2.0 sources.
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/i915/intel
When HDMI output is other than RGB, we have to load the
corresponding colorspace of output mode. This patch fills
the colorspace of AVI infoframe as per the HDMI output mode.
Cc: Ville Syrjala
Cc: Ander Conselvan De Oliveira
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/i915/intel_hdmi.c
This patch adds set of helper functions for YCBCR HDMI output
handling. These functions provide functionality like:
- check if a given video mode is YCBCR 420 only mode.
- check if a given video mode is YCBCR 420 mode.
- get the highest subsamled ycbcr output.
- get the lowest subsamled ycbcr outpu
On Tue, Apr 25, 2017 at 01:18:35PM -0300, Marco Franchi wrote:
> Add driver for Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480)
> TFT with Touch-Panel.
>
> Datasheet available at:
> http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf
>
> Seiko 43WVF1G panel has two power supplies: AVDD and DV
Op 14-06-17 om 16:52 schreef Ville Syrjälä:
> On Wed, Jun 14, 2017 at 11:08:41AM +0200, Maarten Lankhorst wrote:
>> Moving the wait to a helper allows callers outside of the core to
>> wait for pending updates to complete.
>>
>> This can be used to prevent races against nonblocking modesets.
>> Onl
On Wed, Apr 19, 2017 at 07:59:18PM +0200, Arnd Bergmann wrote:
> The new S6E3HA2 driver fails to link when backlight is disabled:
>
> ERROR: "backlight_device_register"
> [drivers/gpu/drm/panel/panel-samsung-s6e3ha2.ko] undefined!
> ERROR: "backlight_device_unregister"
> [drivers/gpu/drm/panel/p
On Wed, Apr 19, 2017 at 08:03:08PM +0200, Arnd Bergmann wrote:
> Without the dependency, we run into a link error:
>
> drivers/gpu/drm/panel/panel-sitronix-st7789v.o: In function `st7789v_probe':
> panel-sitronix-st7789v.c:(.text.st7789v_probe+0xc0): undefined reference to
> `of_find_backlight_by
On Tue, Apr 18, 2017 at 05:40:33PM +0900, Hoegeun Kwon wrote:
> Hi all,
>
> The purpose of this patch is add support for s6e3hf2 AMOLED panel on
> the TM2e board. The panel has 1600x2560 resolution in 5.65" physical
> panel in the TM2e device.
>
> The s6e3hf2 panel(5.65") is simliar to the previo
On Tue, May 30, 2017 at 11:01:36PM +0200, Maxime Ripard wrote:
> The driver depends on the backlight functions, but we have no dependency
> on it in Kconfig. Add this dependency to avoid breakages.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/panel/Kconfig | 1 +
> 1 file changed, 1
On Wed, Jun 14, 2017 at 08:11:18PM +0200, Maarten Lankhorst wrote:
> Op 14-06-17 om 16:52 schreef Ville Syrjälä:
> > On Wed, Jun 14, 2017 at 11:08:41AM +0200, Maarten Lankhorst wrote:
> >> Moving the wait to a helper allows callers outside of the core to
> >> wait for pending updates to complete.
>
On Fri, Jun 09, 2017 at 03:10:46PM +0800, Mark Yao wrote:
> For RK3399's GRF module, if we want to operate the graphic related grf
> registers, we need to enable the pclk_vio_grf which supply power for VIO
> GRF IOs, so it's better to introduce an optional grf clock in driver.
>
> Signed-off-by: Y
Yeah, I saw this earlier. I'm on the amd-gfx list.
The patch looks good to me. Feel free to add my R-b. Do you want to
apply it to amd-staging-4.11 and drm-next? I can take care of
amd-kfd-staging and the release branches.
Thanks,
Felix
On 17-06-14 12:41 PM, Deucher, Alexander wrote:
> >
On Fri, Jun 9, 2017 at 4:59 AM, Christian König wrote:
> From: Christian König
>
> Try to resize BAR0 to let CPU access all of VRAM.
>
> v2: rebased, style cleanups, disable mem decode before resize,
> handle gmc_v9 as well, round size up to power of two.
> v3: handle gmc_v6 as well, release
On Wed, Jun 14, 2017 at 11:17:32PM +0530, Shashank Sharma wrote:
[...]
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 2e55599..d312fe1 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -4334,12 +4334,14 @@ EXPORT_SYMBOL(drm_set_preferr
On Wed, Jun 14, 2017 at 1:58 PM, Dan Carpenter wrote:
>
> We accidentally return ERR_PTR(0) which is NULL. The caller is not
> expecting that and it leads to an Oops.
>
> Fixes: dd59239a9862 ("amdkfd: init aperture once per process")
> Signed-off-by: Dan Carpenter
>
> diff --git a/drivers/gpu/dr
Hi David,
Here is the pull request for the sun4i-drm driver for 4.13.
Thanks!
Maxime
The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/
On Thu, Jun 1, 2017 at 1:28 PM, Geert Uytterhoeven
wrote:
> Signed-off-by: Geert Uytterhoeven
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_process.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> b/drivers/gpu/drm/amd/amdkfd/kfd
Hi Dave,
A few fixes for 4.12:
- fix a UVD regression on SI
- fix overflow in watermark calcs on large modes
The following changes since commit 6e88007e224ce51969ccf9afeec645146c638816:
Merge branch 'vmwgfx-fixes-4.12' of
git://people.freedesktop.org/~thomash/linux into drm-fixes (2017-06-09
Forward declarations in C are great but I'm pretty sure one is enough.
Signed-off-by: Dawid Kurek
---
include/drm/drm_connector.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 4eeda12..930222c 100644
--- a/include/drm/drm_con
I think the trick is what is the best way to synchronize access to
msm_obj->madv in the shrinker path, since we can't reliably just take
msm_obj->lock in shrinker path since we might already hold it:
https://hastebin.com/ubafepahov.xml
fwiw, that was with my work-in-progress attempt to deal with s
https://bugs.freedesktop.org/show_bug.cgi?id=101325
--- Comment #11 from Luke ---
Hi Julien,
Thanks for reproducing the problem! If the issue is related to
GL_EXT_gpu_shader4, is it more likely the card not supporting it properly or a
bug in the mesa driver?
--
You are receiving this mail beca
https://bugs.freedesktop.org/show_bug.cgi?id=101401
Aaron Watry changed:
What|Removed |Added
Status|RESOLVED|CLOSED
--- Comment #3 from Aaron Watry -
On 14.06.2017 10:56, Erik Faye-Lund wrote:
> On Wed, Jun 14, 2017 at 1:16 AM, Dmitry Osipenko wrote:
>> The blocking gather copy allocation is a major performance downside of the
>> Host1x firewall, it may take hundreds milliseconds which is unacceptable
>> for the real-time graphics operations. L
On Fri, Jun 09, 2017 at 10:59:47AM +0200, Christian König wrote:
> From: Christian König
>
> Try to resize BAR0 to let CPU access all of VRAM.
>
> v2: rebased, style cleanups, disable mem decode before resize,
> handle gmc_v9 as well, round size up to power of two.
> v3: handle gmc_v6 as wel
14.06.2017 16:42, Sean Paul wrote:
[Discussion of vboxvideo driver kernel integration and clean-up.]
> Once the code is upstream, it's going to be difficult to motivate developers
> to
> keep the driver close to your downstream version. If I'm working on feature X
> which touches your driver, I'm
Several channels could be made to write the same unit concurrently via the
SETCLASS opcode, trusting userspace is a bad idea. It should be possible to
drop the per-client channel reservation and add a per-unit locking by
inserting MLOCK's to the command stream to re-allow the SETCLASS opcode, but
i
The client ID 0 is reserved by the host1x/cdma to mark the timeout timer
work as already been scheduled and context ID is used as the clients one.
This fixes spurious CDMA timeouts.
Fixes: bdd2f9cd10eb ("drm/tegra: Don't leak kernel pointer to userspace")
Signed-off-by: Dmitry Osipenko
Reviewed-b
Hi,
On Tue, Jun 13, 2017 at 12:02:08PM +0300, Tomi Valkeinen wrote:
> Seems that on omap3 enabling a crtc without any planes causes a sync
> lost flood. This only happens on the first enable, and after that it
> works. This looks like an HW issue.
>
> It's unclear why this is happening or how to
On 14.06.2017 14:47, Mikko Perttunen wrote:
>
>
> On 14.06.2017 12:06, Dmitry Osipenko wrote:
>> On 14.06.2017 09:50, Mikko Perttunen wrote:
>>> On 14.06.2017 02:15, Dmitry Osipenko wrote:
Incorrectly shifted relocation address will cause a lower memory corruption
and likely a hang on a
On Tegra20 if plane has width or height equal to 0, it will be infinitely
wide or tall. Let's disable the plane if it is invisible on atomic state
committing to fix the issue. The Rockchip DRM driver does the same.
Signed-off-by: Dmitry Osipenko
Reviewed-by: Erik Faye-Lund
---
drivers/gpu/drm/t
* Tomi Valkeinen [170613 02:06]:
> Hi,
>
> Here's three fixes for omapdrm:
>
> - fix synclost flood on omap3
> - fix analog tv-out videomode check
> - fix DSI PLL setup
>
> Tony, Aaro, Nikolaus, can you see if these fix the issues you're seeing?
Seems to get rid of the warnings I was seeing on
Hi Tomi,
> Am 13.06.2017 um 11:02 schrieb Tomi Valkeinen :
>
> Hi,
>
> Here's three fixes for omapdrm:
>
> - fix synclost flood on omap3
> - fix analog tv-out videomode check
> - fix DSI PLL setup
>
> Tony, Aaro, Nikolaus, can you see if these fix the issues you're seeing?
I have reverted the
The blocking gather copy allocation is a major performance downside of the
Host1x firewall, it may take hundreds milliseconds which is unacceptable
for the real-time graphics operations. Let's try a non-blocking allocation
first as a least invasive solution, it makes opentegra (Xorg driver)
perform
Commit bdd2f9cd ("Don't leak kernel pointer to userspace") added a mutex
around staging IOCTL's, some of those mutexes are taken twice.
Fixes: bdd2f9cd10eb ("drm/tegra: Don't leak kernel pointer to userspace")
Signed-off-by: Dmitry Osipenko
Reviewed-by: Mikko Perttunen
Reviewed-by: Erik Faye-Lun
K
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Commit 33a8eb8 ("Implement runtime PM") introduced HW reset control. It
causes a hang on Tegra20 if both display controllers are utilized (RGB
panel and HDMI). The TRM suggests that each display controller has its own
reset control, apparently it is not correct.
Fixes: 33a8eb8d40ee ("drm/tegra: dc
The waitchecks along with multiple syncpoints per submit are not ready for
use yet, let's forbid them for now.
Signed-off-by: Dmitry Osipenko
Reviewed-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 60 ++---
drivers/gpu/host1x/job.h| 7 --
On 14.06.2017 12:06, Dmitry Osipenko wrote:
On 14.06.2017 09:50, Mikko Perttunen wrote:
On 14.06.2017 02:15, Dmitry Osipenko wrote:
Incorrectly shifted relocation address will cause a lower memory corruption
and likely a hang on a write or a read of an arbitrary data in case of IOMMU
absent.
This is a bug found by the 0day kernel test robot. When drm is
compiled into the kernel, and register_chrdev fails (due, in this, case
to overfilling the chardev dynamic major numbers), a kernel panic
occurs on boot:
BUG: unable to handle kernel NULL pointer dereference at
00a8
The commands stream is prepended by the jobs class on the CDMA submission,
so that explicitly setting a module class in the commands stream isn't
necessary. The firewall initializes its class to 0 and the command stream
that doesn't explicitly specify the class effectively bypasses the firewall.
S
In case of invalid syncpoint ID, the host1x_syncpt_get() returns NULL and
none of its users perform a check of the returned pointer later. Let's bail
out until it's too late.
Signed-off-by: Dmitry Osipenko
Reviewed-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 9 +
1 file change
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