Hi
Am 18.06.20 um 03:40 schrieb Rong Chen:
>
>
> On 6/17/20 8:29 PM, Thomas Zimmermann wrote:
>> Hi
>>
>> Am 17.06.20 um 11:22 schrieb Rong Chen:
>>> On Wed, Jun 17, 2020 at 08:28:02AM +0200, Thomas Zimmermann wrote:
Hi Emil
Am 16.06.20 um 17:14 schrieb Emil Velikov:
> Hi Thom
On 6/17/20 8:29 PM, Thomas Zimmermann wrote:
Hi
Am 17.06.20 um 11:22 schrieb Rong Chen:
On Wed, Jun 17, 2020 at 08:28:02AM +0200, Thomas Zimmermann wrote:
Hi Emil
Am 16.06.20 um 17:14 schrieb Emil Velikov:
Hi Thomas,
On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann wrote:
The original m
On Wed, 17 Jun 2020 at 07:28, Thomas Zimmermann wrote:
> Maybe I can write a better commit message to highlight the change.
>
That would be amazing, thank you.
Emil
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Hi
Am 17.06.20 um 11:22 schrieb Rong Chen:
> On Wed, Jun 17, 2020 at 08:28:02AM +0200, Thomas Zimmermann wrote:
>> Hi Emil
>>
>> Am 16.06.20 um 17:14 schrieb Emil Velikov:
>>> Hi Thomas,
>>>
>>> On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann wrote:
The original modesetting code set MIS
On Wed, Jun 17, 2020 at 08:28:02AM +0200, Thomas Zimmermann wrote:
> Hi Emil
>
> Am 16.06.20 um 17:14 schrieb Emil Velikov:
> > Hi Thomas,
> >
> > On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann wrote:
> >>
> >> The original modesetting code set MISC to 0x2d, which is ,
> >> and
> >>
> >> With
Hi Emil
Am 16.06.20 um 17:14 schrieb Emil Velikov:
> Hi Thomas,
>
> On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann wrote:
>>
>> The original modesetting code set MISC to 0x2d, which is ,
>> and
>>
>> With the conversion to atomic modesetting, accidentally
>> got enabled as well. Revert this
Hi Thomas,
On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann wrote:
>
> The original modesetting code set MISC to 0x2d, which is ,
> and
>
> With the conversion to atomic modesetting, accidentally
> got enabled as well. Revert this change and initialize MISC with a
> constant value of and . The
The original modesetting code set MISC to 0x2d, which is ,
and
With the conversion to atomic modesetting, accidentally
got enabled as well. Revert this change and initialize MISC with a
constant value of and . The bits are set
in mga_crtc_set_plls(), sync flags are set in mgag200_set_mode_reg