d-off-by: Nicolas Frattaroli
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi | 57
1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
b/arch/arm64/boot/dts/rockchip/r
in the DT bindings (Nicolas
Frattaroli)
v4:
- Adapt to changes in bindings
v6:
- pclk and npu clocks are needed by all clocks (Rob Herring)
v8:
- Remove notion of top core (Robin Murphy)
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base
Enable the nodes added in a previous commit to the rk3588s device tree.
v2:
- Split nodes (Sebastian Reichel)
- Sort nodes (Sebastian Reichel)
- Add board regulators (Sebastian Reichel)
v8:
- Remove notion of top core (Robin Murphy)
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
be on, add a label to
the NPU power domain node so board files can reference it.
Signed-off-by: Nicolas Frattaroli
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64
directions (Robin Murphy)
Reviewed-by: Jeff Hugo
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/rocket_drv.c | 2 ++
drivers/accel/rocket/rocket_gem.c | 56 +++
drivers/accel/rocket/rocket_gem.h | 4 +++
include/uapi/drm/rock
: Krzysztof Kozlowski
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
.../bindings/npu/rockchip,rk3588-rknn-core.yaml| 112 +
1 file changed, 112 insertions(+)
diff --git
a/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml
b/Documentation/devicetree
the IOMMU (Robin Murphy)
- Specify the size of the embedded structs in the IOCTLs for future
extensibility (Rob Herring)
- Expose only 32 bits for the address of the regcmd BO (Robin Murphy)
Tested-by: Heiko Stuebner
Reviewed-by: Jeff Hugo
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket
dma_sync_sgtable_for_device (Robin Murphy)
Reviewed-by: Jeffrey Hugo
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile | 3 +-
drivers/accel/rocket/rocket_drv.c | 15 -
drivers/accel/rocket/rocket_drv.h | 4 ++
drivers/accel/rocket/rocket_gem.c
Heiko Stuebner
Reviewed-by: Jeff Hugo
Signed-off-by: Tomeu Vizoso
---
Documentation/accel/index.rst| 1 +
Documentation/accel/rocket/index.rst | 19 +++
MAINTAINERS | 10 ++
drivers/accel/Kconfig| 1 +
drivers/accel/Makefile
/mesa/mesa/-/merge_requests/29698
Signed-off-by: Tomeu Vizoso
---
Changes in v9:
- Rename the DT reference for the IOMMU for core 0
- Link to v8:
https://lore.kernel.org/r/20250713-6-10-rocket-v8-0-64fa3115e...@tomeuvizoso.net
Changes in v8:
- Kconfig improvements
- Removed notion of top core
d-off-by: Nicolas Frattaroli
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi | 57
1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
b/arch/arm64/boot/dts/rockchip/r
be on, add a label to
the NPU power domain node so board files can reference it.
Signed-off-by: Nicolas Frattaroli
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64
Enable the nodes added in a previous commit to the rk3588s device tree.
v2:
- Split nodes (Sebastian Reichel)
- Sort nodes (Sebastian Reichel)
- Add board regulators (Sebastian Reichel)
v8:
- Remove notion of top core (Robin Murphy)
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
in the DT bindings (Nicolas
Frattaroli)
v4:
- Adapt to changes in bindings
v6:
- pclk and npu clocks are needed by all clocks (Rob Herring)
v8:
- Remove notion of top core (Robin Murphy)
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base
: Krzysztof Kozlowski
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
.../bindings/npu/rockchip,rk3588-rknn-core.yaml| 112 +
1 file changed, 112 insertions(+)
diff --git
a/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml
b/Documentation/devicetree
the IOMMU (Robin Murphy)
- Specify the size of the embedded structs in the IOCTLs for future
extensibility (Rob Herring)
- Expose only 32 bits for the address of the regcmd BO (Robin Murphy)
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3
directions (Robin Murphy)
Reviewed-by: Jeff Hugo
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/rocket_drv.c | 2 ++
drivers/accel/rocket/rocket_gem.c | 56 +++
drivers/accel/rocket/rocket_gem.h | 4 +++
include/uapi/drm/rock
Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
Documentation/accel/index.rst| 1 +
Documentation/accel/rocket/index.rst | 19 +++
MAINTAINERS | 10 ++
drivers/accel/Kconfig| 1 +
drivers/accel/Makefile | 1 +
drivers/accel/r
dma_sync_sgtable_for_device (Robin Murphy)
Reviewed-by: Jeffrey Hugo
Tested-by: Heiko Stuebner
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile | 3 +-
drivers/accel/rocket/rocket_drv.c | 15 -
drivers/accel/rocket/rocket_drv.h | 4 ++
drivers/accel/rocket/rocket_gem.c
/mesa/mesa/-/merge_requests/29698
Signed-off-by: Tomeu Vizoso
---
Changes in v8:
- Kconfig improvements
- Removed notion of top core, all cores are equivalent now
- Explicitly allocate DMA addresses
- Sync BOs always in both directions
- UAPI improvements
- Simplified job scheduling
- Misc. style
On Fri, Jul 11, 2025 at 7:38 PM Andrew Davis wrote:
>
> On 6/6/25 1:28 AM, Tomeu Vizoso wrote:
> > This initial version supports the NPU as shipped in the RK3588 SoC and
> > described in the first part of its TRM, in Chapter 36.
> >
> > This NPU contains 3 indepen
On Fri, Jul 11, 2025 at 6:40 PM Robin Murphy wrote:
>
> On 11/07/2025 5:00 pm, Tomeu Vizoso wrote:
> > On Tue, Jun 24, 2025 at 3:50 PM Robin Murphy wrote:
> >>
> >> On 2025-06-06 7:28 am, Tomeu Vizoso wrote:
> >> [...]
> >>> diff --git a/dr
On Tue, Jun 24, 2025 at 3:27 PM Robin Murphy wrote:
>
> On 2025-06-06 7:28 am, Tomeu Vizoso wrote:
> > Add the bindings for the Neural Processing Unit IP from Rockchip.
> >
> > v2:
> > - Adapt to new node structure (one node per core, each with its own
> >I
On Tue, Jun 24, 2025 at 3:50 PM Robin Murphy wrote:
>
> On 2025-06-06 7:28 am, Tomeu Vizoso wrote:
> [...]
> > diff --git a/drivers/accel/rocket/rocket_device.h
> > b/drivers/accel/rocket/rocket_device.h
> > index
> > 10acfe8
On Fri, Jun 20, 2025 at 11:28 AM Heiko Stuebner wrote:
>
> Am Freitag, 6. Juni 2025, 08:28:20 Mitteleuropäische Sommerzeit schrieb Tomeu
> Vizoso:
> > This series adds a new driver for the NPU that Rockchip includes in its
> > newer SoCs, developed by them on the NVDLA
/mesa/mesa/-/merge_requests/29698
Signed-off-by: Tomeu Vizoso
---
Changes in v7:
- Actually enable process isolation by allocating its own IOMMU domain
to each DRM client.
- Link to v6:
https://lore.kernel.org/r/20250604-6-10-rocket-v6-0-237ac75dd...@tomeuvizoso.net
Changes in v6:
- Make all
From: Nicolas Frattaroli
The NPU on the ROCK5B uses the same regulator for both the sram-supply
and the npu's supply. Add this regulator, and enable all the NPU bits.
Also add the regulator as a domain-supply to the pd_npu power domain.
Signed-off-by: Nicolas Frattaroli
Signed-off-by:
Enable the nodes added in a previous commit to the rk3588s device tree.
v2:
- Split nodes (Sebastian Reichel)
- Sort nodes (Sebastian Reichel)
- Add board regulators (Sebastian Reichel)
Signed-off-by: Tomeu Vizoso
---
.../arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 30
isolation (Daniel
Stone and Robin Murphy)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3 +-
drivers/accel/rocket/rocket_core.c | 10 +
drivers/accel/rocket/rocket_core.h | 14 +
drivers/accel/rocket/rocket_device.c | 2 +
drivers/accel/rocket/rocket_device.h | 2
in the DT bindings (Nicolas
Frattaroli)
v4:
- Adapt to changes in bindings
v6:
- pclk and npu clocks are needed by all clocks (Rob Herring)
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 87 +++
1 file changed, 87 insertions(+)
diff --
be on, add a label to
the NPU power domain node so board files can reference it.
Signed-off-by: Nicolas Frattaroli
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/r
incidentally related
(Kever Yang)
- Mark pclk and npu clocks as required by all clocks (Rob Herring)
v7:
- Remove allOf section, not needed now that all nodes require 4 clocks
(Heiko Stübner)
Signed-off-by: Sebastian Reichel
Signed-off-by: Tomeu Vizoso
Reviewed-by: Krzysztof Kozlowski
ad of GFP_ZERO (Jeff Hugo)
- Explicitly include linux/container_of.h (Jeff Hugo)
- pclk and npu clocks are now needed by all cores (Rob Herring)
v7:
- Assign its own IOMMU domain to each client, for isolation (Daniel
Stone and Robin Murphy)
Signed-off-by: Tomeu Vizoso
---
Documentation/accel/inde
same IOCTLs from the Etnaviv driver.
v2:
- Don't break UABI by reordering the IOCTL IDs (Jeff Hugo)
v3:
- Check that padding fields in IOCTLs are zero (Jeff Hugo)
v6:
- Fix conversion logic to make sure we use DMA_BIDIRECTIONAL when needed
(Lucas Stach)
Signed-off-by: Tomeu Vizoso
Reviewe
(Markus Elfring)
v7:
- Assign its own IOMMU domain to each client, for isolation (Daniel
Stone and Robin Murphy)
Reviewed-by: Jeffrey Hugo
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3 +-
drivers/accel/rocket/rocket_device.c | 4 ++
drivers/accel/rocket
On Thu, Jun 5, 2025 at 3:37 PM Robin Murphy wrote:
>
> On 05/06/2025 8:41 am, Tomeu Vizoso wrote:
> [...]
> >> In fact this is precisely the usage model I would suggest for this sort
> >> of thing, and IIRC I had a similar conversation with the Ethos driver
> >
On Thu, Jun 5, 2025 at 2:29 PM Daniel Stone wrote:
>
> Hey,
>
> On Thu, 5 Jun 2025 at 08:41, Tomeu Vizoso wrote:
> > > Indeed if you're using the IOMMU API directly then you need to do your
> > > own address space management either way, so matching bits of proc
On Wed, Jun 4, 2025 at 7:03 PM Robin Murphy wrote:
>
> On 2025-06-04 5:18 pm, Daniel Stone wrote:
> > Hi Tomeu,
> > I have some bad news ...
> >
> > On Wed, 4 Jun 2025 at 08:57, Tomeu Vizoso wrote:
> >> +int rocket_ioctl_create_bo(struct drm_device *dev,
macros (Thomas Zimmermann)
- Add padding to ioctls and check for zero (Jeff Hugo)
- Improve error handling (Nicolas Frattaroli)
v6:
- Use mutexes guard (Markus Elfring)
- Use u64_to_user_ptr (Jeff Hugo)
- Drop rocket_fence (Rob Herring)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket
rockchip,iommu compatible to IOMMU nodes (Sebastian Reichel)
v3:
- Adapt to a split of the register block in the DT bindings (Nicolas
Frattaroli)
v4:
- Adapt to changes in bindings
v6:
- pclk and npu clocks are needed by all clocks (Rob Herring)
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/
On Wed, Jun 4, 2025 at 10:25 AM Heiko Stübner wrote:
>
> Am Mittwoch, 4. Juni 2025, 09:57:14 Mitteleuropäische Sommerzeit schrieb
> Tomeu Vizoso:
> > Add the bindings for the Neural Processing Unit IP from Rockchip.
> >
> > v2:
> > - Adapt to new node structure
(Markus Elfring)
Reviewed-by: Jeffrey Hugo
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3 +-
drivers/accel/rocket/rocket_device.c | 4 ++
drivers/accel/rocket/rocket_device.h | 2 +
drivers/accel/rocket/rocket_drv.c| 7 +-
drivers/accel/rocket/rocket_gem.c
On Wed, May 28, 2025 at 3:41 PM Rob Herring wrote:
>
> On Tue, May 20, 2025 at 5:27 AM Tomeu Vizoso wrote:
> >
> > Add the bindings for the Neural Processing Unit IP from Rockchip.
> >
> > v2:
> > - Adapt to new node structure (one node per core, each with its
same IOCTLs from the Etnaviv driver.
v2:
- Don't break UABI by reordering the IOCTL IDs (Jeff Hugo)
v3:
- Check that padding fields in IOCTLs are zero (Jeff Hugo)
v6:
- Fix conversion logic to make sure we use DMA_BIDIRECTIONAL when needed
(Lucas Stach)
Signed-off-by: Tomeu Vizoso
Reviewe
ad of GFP_ZERO (Jeff Hugo)
- Explicitly include linux/container_of.h (Jeff Hugo)
- pclk and npu clocks are now needed by all cores (Rob Herring)
Signed-off-by: Tomeu Vizoso
---
Documentation/accel/index.rst| 1 +
Documentation/accel/rocket/index.rst | 19 +++
MAINTA
Enable the nodes added in a previous commit to the rk3588s device tree.
v2:
- Split nodes (Sebastian Reichel)
- Sort nodes (Sebastian Reichel)
- Add board regulators (Sebastian Reichel)
Signed-off-by: Tomeu Vizoso
---
.../arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 30
be on, add a label to
the NPU power domain node so board files can reference it.
Signed-off-by: Nicolas Frattaroli
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/r
From: Nicolas Frattaroli
The NPU on the ROCK5B uses the same regulator for both the sram-supply
and the npu's supply. Add this regulator, and enable all the NPU bits.
Also add the regulator as a domain-supply to the pd_npu power domain.
Signed-off-by: Nicolas Frattaroli
Signed-off-by:
incidentally related
(Kever Yang)
- Mark pclk and npu clocks as required by all clocks (Rob Herring)
Signed-off-by: Sebastian Reichel
Signed-off-by: Tomeu Vizoso
Reviewed-by: Krzysztof Kozlowski
---
.../bindings/npu/rockchip,rk3588-rknn-core.yaml| 144 +
1 file changed
/mesa/mesa/-/merge_requests/29698
Signed-off-by: Tomeu Vizoso
---
Changes in v6:
- Make all cores depend on pclk and npu clocks
- Fix BO sync direction logic
- Misc. cleanups
- Link to v5:
https://lore.kernel.org/r/20250520-6-10-rocket-v5-0-18c9ca0fc...@tomeuvizoso.net
Changes in v5:
- Use bulk
On Wed, May 28, 2025 at 5:34 PM Tomeu Vizoso wrote:
>
> On Wed, May 28, 2025 at 3:41 PM Rob Herring wrote:
> >
> > On Tue, May 20, 2025 at 5:27 AM Tomeu Vizoso wrote:
> > >
> > > Add the bindings for the Neural Processing Unit IP from Rockchip.
>
Hi Rob,
[adding Kever to CC]
On Wed, May 28, 2025 at 3:41 PM Rob Herring wrote:
>
> On Tue, May 20, 2025 at 5:27 AM Tomeu Vizoso wrote:
> >
> > Add the bindings for the Neural Processing Unit IP from Rockchip.
> >
> > v2:
> > - Adapt to new node structure (
On Fri, May 30, 2025 at 8:50 PM Jagan Teki wrote:
>
> On Mon, 19 May 2025 at 19:14, Tomeu Vizoso wrote:
> >
> > This series adds a new driver for the NPU that Rockchip includes in its
> > newer SoCs, developed by them on the NVDLA base.
> >
> > In its curren
On Wed, May 28, 2025 at 3:41 PM Rob Herring wrote:
>
> On Tue, May 20, 2025 at 5:27 AM Tomeu Vizoso wrote:
> >
> > Add the bindings for the Neural Processing Unit IP from Rockchip.
> >
> > v2:
> > - Adapt to new node structure (one node per core, each with its
://devicetree.org/schemas/npu/rockchip,rk3588-rknn-core.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Neural Processing Unit IP from Rockchip
+
+maintainers:
+ - Tomeu Vizoso
+
+description:
+ Rockchip IP for accelerating inference of neural networks, based on NVIDIA's
+ open s
Hugo
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3 +-
drivers/accel/rocket/rocket_device.c | 4 ++
drivers/accel/rocket/rocket_device.h | 2 +
drivers/accel/rocket/rocket_drv.c| 7 +-
drivers/accel/rocket/rocket_gem.c| 131
same IOCTLs from the Etnaviv driver.
v2:
- Don't break UABI by reordering the IOCTL IDs (Jeff Hugo)
v3:
- Check that padding fields in IOCTLs are zero (Jeff Hugo)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/rocket_drv.c | 2 +
drivers/accel/rocket/rocket_
Enable the nodes added in a previous commit to the rk3588s device tree.
v2:
- Split nodes (Sebastian Reichel)
- Sort nodes (Sebastian Reichel)
- Add board regulators (Sebastian Reichel)
Signed-off-by: Tomeu Vizoso
---
.../arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 30
/mesa/mesa/-/merge_requests/29698
Signed-off-by: Tomeu Vizoso
---
Changes in v5:
- Use bulk clk API
- Rename bindings file
- Syntax improvement to bindings
- Link to v4:
https://lore.kernel.org/r/20250519-6-10-rocket-v4-0-d6dff6b4c...@tomeuvizoso.net
Changes in v4:
- Several fixes to DT bindings
From: Nicolas Frattaroli
The NPU on the ROCK5B uses the same regulator for both the sram-supply
and the npu's supply. Add this regulator, and enable all the NPU bits.
Also add the regulator as a domain-supply to the pd_npu power domain.
Signed-off-by: Nicolas Frattaroli
Signed-off-by:
be on, add a label to
the NPU power domain node so board files can reference it.
Signed-off-by: Nicolas Frattaroli
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/r
macros (Thomas Zimmermann)
- Add padding to ioctls and check for zero (Jeff Hugo)
- Improve error handling (Nicolas Frattaroli)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3 +-
drivers/accel/rocket/rocket_core.c | 14 +-
drivers/accel/rocket/rocket_core.h | 14
anups (Thomas Zimmermann and Jeff Hugo)
- Make use of GPL-2.0-only for the copyright notice (Jeff Hugo)
- PM improvements (Nicolas Frattaroli)
v4:
- Use bulk clk API (Krzysztof Kozlowski)
Signed-off-by: Tomeu Vizoso
---
Documentation/accel/index.rst| 1 +
Documentation/accel/rocket/inde
rockchip,iommu compatible to IOMMU nodes (Sebastian Reichel)
v3:
- Adapt to a split of the register block in the DT bindings (Nicolas
Frattaroli)
v4:
- Adapt to changes in bindings
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 85 +++
1 f
/mesa/mesa/-/merge_requests/29698
Signed-off-by: Tomeu Vizoso
---
Changes in v4:
- Several fixes to DT bindings.
- Link to v3:
https://lore.kernel.org/r/20250516-6-10-rocket-v3-0-7051ac922...@tomeuvizoso.net
Changes in v3:
- Reference in the device tree only the register blocks that are
same IOCTLs from the Etnaviv driver.
v2:
- Don't break UABI by reordering the IOCTL IDs (Jeff Hugo)
v3:
- Check that padding fields in IOCTLs are zero (Jeff Hugo)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/rocket_drv.c | 2 +
drivers/accel/rocket/rocket_
Kozlowski)
- Add reg-names to list of required properties (Krzysztof Kozlowski)
- Fix example (Krzysztof Kozlowski)
Signed-off-by: Tomeu Vizoso
Signed-off-by: Sebastian Reichel
---
.../bindings/npu/rockchip,rknn-core.yaml | 149 +
1 file changed, 149 insertions
macros (Thomas Zimmermann)
- Add padding to ioctls and check for zero (Jeff Hugo)
- Improve error handling (Nicolas Frattaroli)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3 +-
drivers/accel/rocket/rocket_core.c | 14 +-
drivers/accel/rocket/rocket_core.h | 14
be on, add a label to
the NPU power domain node so board files can reference it.
Signed-off-by: Nicolas Frattaroli
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/r
rockchip,iommu compatible to IOMMU nodes (Sebastian Reichel)
v3:
- Adapt to a split of the register block in the DT bindings (Nicolas
Frattaroli)
v4:
- Adapt to changes in bindings
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 85 +++
1 f
Enable the nodes added in a previous commit to the rk3588s device tree.
v2:
- Split nodes (Sebastian Reichel)
- Sort nodes (Sebastian Reichel)
- Add board regulators (Sebastian Reichel)
Signed-off-by: Tomeu Vizoso
---
.../arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 30
anups (Thomas Zimmermann and Jeff Hugo)
- Make use of GPL-2.0-only for the copyright notice (Jeff Hugo)
- PM improvements (Nicolas Frattaroli)
Signed-off-by: Tomeu Vizoso
---
Documentation/accel/index.rst| 1 +
Documentation/accel/rocket/index.rst | 25 +++
MAINTA
From: Nicolas Frattaroli
The NPU on the ROCK5B uses the same regulator for both the sram-supply
and the npu's supply. Add this regulator, and enable all the NPU bits.
Also add the regulator as a domain-supply to the pd_npu power domain.
Signed-off-by: Nicolas Frattaroli
Signed-off-by:
ivers/accel/rocket/rocket_gem.c
b/drivers/accel/rocket/rocket_gem.c
new file mode 100644
index
..8a8a7185daac4740081293aae6945c9b2bbeb2dd
--- /dev/null
+++ b/drivers/accel/rocket/rocket_gem.c
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* Copy
On Mon, May 19, 2025 at 10:47 AM Krzysztof Kozlowski wrote:
>
> On 19/05/2025 10:27, Tomeu Vizoso wrote:
> > On Mon, May 19, 2025 at 8:08 AM Krzysztof Kozlowski wrote:
> >>
> >> On 16/05/2025 18:53, Tomeu Vizoso wrote:
> >>> See Chapter 36 "RKNN&quo
On Mon, May 19, 2025 at 8:08 AM Krzysztof Kozlowski wrote:
>
> On 16/05/2025 18:53, Tomeu Vizoso wrote:
> > See Chapter 36 "RKNN" from the RK3588 TRM (Part 1).
> >
> > This is a derivative of NVIDIA's NVDLA, but with its own front-end
> > proces
macros (Thomas Zimmermann)
- Add padding to ioctls and check for zero (Jeff Hugo)
- Improve error handling (Nicolas Frattaroli)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3 +-
drivers/accel/rocket/rocket_core.c | 14 +-
drivers/accel/rocket/rocket_core.h | 14
be on, add a label to
the NPU power domain node so board files can reference it.
Signed-off-by: Nicolas Frattaroli
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/r
From: Nicolas Frattaroli
The NPU on the ROCK5B uses the same regulator for both the sram-supply
and the npu's supply. Add this regulator, and enable all the NPU bits.
Also add the regulator as a domain-supply to the pd_npu power domain.
Signed-off-by: Nicolas Frattaroli
Signed-off-by:
Enable the nodes added in a previous commit to the rk3588s device tree.
v2:
- Split nodes (Sebastian Reichel)
- Sort nodes (Sebastian Reichel)
- Add board regulators (Sebastian Reichel)
Signed-off-by: Tomeu Vizoso
---
.../arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 30
same IOCTLs from the Etnaviv driver.
v2:
- Don't break UABI by reordering the IOCTL IDs (Jeff Hugo)
v3:
- Check that padding fields in IOCTLs are zero (Jeff Hugo)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/rocket_drv.c | 2 +
drivers/accel/rocket/rocket_
ivers/accel/rocket/rocket_gem.c
b/drivers/accel/rocket/rocket_gem.c
new file mode 100644
index
..8a8a7185daac4740081293aae6945c9b2bbeb2dd
--- /dev/null
+++ b/drivers/accel/rocket/rocket_gem.c
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* Copy
anups (Thomas Zimmermann and Jeff Hugo)
- Make use of GPL-2.0-only for the copyright notice (Jeff Hugo)
- PM improvements (Nicolas Frattaroli)
Signed-off-by: Tomeu Vizoso
---
Documentation/accel/index.rst| 1 +
Documentation/accel/rocket/index.rst | 25 +++
MAINTA
rockchip,iommu compatible to IOMMU nodes (Sebastian Reichel)
v3:
- Adapt to a split of the register block in the DT bindings (Nicolas
Frattaroli)
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 85 +++
1 file changed, 85 insertions(+)
diff --g
/mesa/mesa/-/merge_requests/29698
Signed-off-by: Tomeu Vizoso
---
Changes in v3:
- Reference in the device tree only the register blocks that are
actually used.
- Several style and robustness fixes suggested in the mailing list.
- Added patches from Nicolas Frattaroli that add support to the NPU
would ever use (Nicolas Frattaroli)
- Group supplies (Rob Herring)
- Explain the way in which the top core is special (Rob Herring)
Signed-off-by: Tomeu Vizoso
Signed-off-by: Sebastian Reichel
---
.../bindings/npu/rockchip,rknn-core.yaml | 162 +
1 file changed, 162
On Fri, May 16, 2025 at 12:25 PM Nicolas Frattaroli
wrote:
>
> On Thursday, 15 May 2025 10:30:14 Central European Summer Time Tomeu Vizoso
> wrote:
> > On Wed, May 14, 2025 at 7:50 PM Nicolas Frattaroli
> > wrote:
> > >
> > > On Wednesday, 14 May 2025 17:1
On Fri, Apr 25, 2025 at 8:22 PM Nicolas Frattaroli
wrote:
>
> On Tuesday, 25 February 2025 08:55:50 Central European Summer Time Tomeu
> Vizoso wrote:
> > This initial version supports the NPU as shipped in the RK3588 SoC and
> > described in the first part of i
On Wed, May 14, 2025 at 7:50 PM Nicolas Frattaroli
wrote:
>
> On Wednesday, 14 May 2025 17:18:22 Central European Summer Time Tomeu Vizoso
> wrote:
> > Hi Nicolas,
> >
> > Thanks for looking at this. Some thoughts below:
> >
> > On Fri, Apr 25, 2025 a
Hi Rob,
On Tue, Feb 25, 2025 at 5:02 PM Rob Herring wrote:
>
> On Tue, Feb 25, 2025 at 08:55:47AM +0100, Tomeu Vizoso wrote:
> > Add the bindings for the Neural Processing Unit IP from Rockchip.
> >
> > v2:
> > - Adapt to new node structure (one node per core,
Hi Nicolas,
Thanks for looking at this. Some thoughts below:
On Fri, Apr 25, 2025 at 8:50 PM Nicolas Frattaroli
wrote:
>
> On Tuesday, 25 February 2025 08:55:47 Central European Summer Time Tomeu
> Vizoso wrote:
> > Add the bindings for the Neural Processing Unit IP from Rockc
On Thu, May 8, 2025 at 7:08 PM Lucas Stach wrote:
>
> Am Donnerstag, dem 08.05.2025 um 16:56 +0200 schrieb Tomeu Vizoso:
> > We should be comparing the last submitted sequence number with that of
> > the address space we may be switching to.
> >
> This isn't the re
We should be comparing the last submitted sequence number with that of
the address space we may be switching to.
Fixes: 27b67278e007 ("drm/etnaviv: rework MMU handling")
Signed-off-by: Tomeu Vizoso
---
drivers/gpu/drm/etnaviv/etnaviv_buffer.c | 2 +-
1 file changed, 1 insertion(+),
We should be comparing the last submitted sequence number with that of
the address space we may be switching to.
And we should be using the latter as the last submitted sequence number
afterwards.
Signed-off-by: Tomeu Vizoso
---
drivers/gpu/drm/etnaviv/etnaviv_buffer.c | 3 ++-
1 file changed
of cores
- Misc. style fixes (Jeffrey Hugo)
- Repack IOCTL struct (Jeffrey Hugo)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3 +-
drivers/accel/rocket/rocket_core.c | 6 +
drivers/accel/rocket/rocket_core.h | 14 +
drivers/accel/rocket/rocket_device.c | 2
Enable the nodes added in a previous commit to the rk3588s device tree.
v2:
- Split nodes (Sebastian Reichel)
- Sort nodes (Sebastian Reichel)
- Add board regulators (Sebastian Reichel)
Signed-off-by: Tomeu Vizoso
---
.../arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 30
same IOCTLs from the Etnaviv driver.
v2:
- Don't break UABI by reordering the IOCTL IDs (Jeffrey Hugo)
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/rocket_drv.c | 2 ++
drivers/accel/rocket/rocket_gem.c | 75 +++
drivers/accel/rocket/rocket_
This uses the SHMEM DRM helpers and we map right away to the CPU and NPU
sides, as all buffers are expected to be accessed from both.
v2:
- Sync the IOMMUs for the other cores when mapping and unmapping.
Signed-off-by: Tomeu Vizoso
---
drivers/accel/rocket/Makefile| 3 +-
drivers
rockchip,iommu compatible to IOMMU nodes (Sebastian Reichel)
Signed-off-by: Tomeu Vizoso
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 76 +++
1 file changed, 76 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
b/arch/arm64/boot/dts/rockchip/r
Add the bindings for the Neural Processing Unit IP from Rockchip.
v2:
- Adapt to new node structure (one node per core, each with its own
IOMMU)
- Several misc. fixes from Sebastian Reichel
Signed-off-by: Tomeu Vizoso
Signed-off-by: Sebastian Reichel
---
.../bindings/npu/rockchip,rknn
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