Hi,
On 14/01/2025 at 14:05:40 GMT, "Usyskin, Alexander"
wrote:
>> > > Create master device without partition when
>> > > CONFIG_MTD_PARTITIONED_MASTER flag is unset.
>> >
>> > I don't think you took into consideration my remarks regarding the fact
>> > that you would break userspace. If you en
Hi Maxime,
>> The exclusive rate code could support this if it doesn't already do so.
>> If you call clk_set_rate_exclusive(child, ) followed by
>> clk_set_rate(parent, ) the core code should try to keep the
>> child at the constant rate, or fail the clk_set_rate() call on the
>> parent. It should
Hi Stephen,
>> The idea is: if the flag is set, instead of accepting the new upstream
>> rate and recalculate the downstream rate based on a previously set
>> divider value, we change our divider value to match the same frequency
>> as before. But if we cannot, then we just keep the old way.
>>
>
Hi Alexander,
On 01/01/2025 at 17:39:15 +02, Alexander Usyskin
wrote:
> Create master device without partition when
> CONFIG_MTD_PARTITIONED_MASTER flag is unset.
I don't think you took into consideration my remarks regarding the fact
that you would break userspace. If you enable the master, y
On 29/12/2024 at 15:08:56 GMT, "Usyskin, Alexander"
wrote:
>>
>> Hello Alexander,
>>
>> >> If so, I have to add patch for mtd subsystem to always have device for
>> master
>> >> initialized regardless of kernel flag.
>> >> Only to initialize struct device, not to create full mtd node.
>> >>
>>
Hello Alexander,
>> If so, I have to add patch for mtd subsystem to always have device for master
>> initialized regardless of kernel flag.
>> Only to initialize struct device, not to create full mtd node.
>>
>> Miquel - are you agree to this?
Conceptually yes, but please mind one thing: we do n
ock statically by changing the
>> device tree, implies calculating the PLL clock by
>> hand, e.g. commit 4fbb73416b10 ("arm64: dts:
>> imx8mp-phyboard-pollux: Set Video PLL1 frequency to 506.8 MHz")
>>
>> 2. Walk down the clock tree and modify the
Hello,
>> >> [After applying PATCH "clk: imx: clk-imx8mp: Allow LDB serializer clock
>> >> reconfigure parent rate"]
>> >>
>> >> This is a commit from Marek, which is, I believe going in the right
>> >> direction, so I am including it. Just with this change, the situation is
>> >> slightly diffe
Hi Maxime,
On 17/12/2024 at 13:47:53 +01, Maxime Ripard wrote:
> On Thu, Nov 21, 2024 at 06:41:14PM +0100, Miquel Raynal wrote:
>> There are mainly two ways to change a clock frequency.
>
> There's much more than that :)
"mainly"
Or maybe I should have added &qu
Hi Stephen,
>> +/* do not passively change this clock rate during subtree rate propagation
>> */
>> +#define CLK_NO_RATE_CHANGE_DURING_PROPAGATION BIT(14)
>
> Why doesn't rate locking work?
Can you be more specific? What function from the API is supposed to do
what I need? AFAIU, none of them is
Hi Nikolaus,
On 03/12/2024 at 20:09:52 +01, Nikolaus Voss wrote:
> LDB clock has to be a fixed multiple of the pixel clock.
Not only, IIUC it also needs to be synchronized, ie. share the same
source.
> As LDB and pixel clock are derived from different clock sources
> (at least on imx8mp),
Wai
Hi Liu,
>>> The
>>> pixel clock can be got from LDB's remote input LCDIF DT node by
>>> calling of_clk_get_by_name() in fsl_ldb_probe() like the below patch
>>> does. Similar to setting pixel clock rate, I think a chance is that
>>> pixel clock enablement can be moved from LCDIF driver to
>>> fsl_
Hello Liu,
Thanks for the feedback!
On 22/11/2024 at 14:01:49 +08, Liu Ying wrote:
> Hi Miquel,
>
> On 11/22/2024, Miquel Raynal wrote:
>> Recent changes in the clock tree have set CLK_SET_RATE_PARENT to the two
>> LCDIF pixel clocks. The idea is, instead of using assigne
hange intended.
Signed-off-by: Miquel Raynal
---
drivers/clk/clk.c | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index
f171539bbb842f57698249a475c62f3f5719ccd1..adfc5bfb93b5a65b6f58c52ca2c432d651f7dd7d
100644
about finding
the next output clock based on a parent frequency change.
The prototype is based on clk_recalc() which does exactly the same for
the "recalc" situation.
Signed-off-by: Miquel Raynal
---
drivers/clk/clk.c | 12
1 file changed, 12 insertions(+)
diff --git a/dri
that
results in accurate serializer clock.
Signed-off-by: Marek Vasut
Reviewed-by: Abel Vesa
Signed-off-by: Miquel Raynal
---
drivers/clk/imx/clk-imx8mp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index
to fix both Marek situation and all people using a
straightforward LCD based setup. For more complex setups, we need more
smartness from DRM and clk, but this is gonna take a bit of time.
---
Marek Vasut (1):
clk: imx: clk-imx8mp: Allow LDB serializer clock reconfigure parent rate
Miquel R
rate")
Cc: sta...@vger.kernel.org
Signed-off-by: Miquel Raynal
--
All patches in this series must be backported for this one to apply.
---
drivers/clk/imx/clk-imx8mp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/cl
g this is the purpose of the new clock flag:
CLK_NO_RATE_CHANGE_DURING_PROPAGATION
Please note, if the kernel was setting the ldb clock before a pixel
clock, the result would be different, and this is also what this patch
is trying to solve.
Signed-off-by: Miquel Raynal
---
In all cases, the LDB mus
Hi Alexander,
Please reduce the context when answering, otherwise it's hard to find
all places where you commented.
>> > > > That's the part that I'm not sure if I agree. if I remember from some
>> > > > experiments in the past,
>> > > > when you call to wake up the child, the parent will wakeup
ed to be pushed through drm-xe-next.
Overall the mtd bits look fine, I don't want to block this series
further so you can add on the mtd patches my
Acked-by: Miquel Raynal
Thanks,
Miquèl
>> > That's the part that I'm not sure if I agree. if I remember from some
>> > experiments in the past,
>> > when you call to wake up the child, the parent will wakeup first anyway.
>> >
>> The child (mtd device) does not exist at this point of time.
>> To create MTD device, the partition table
Hi Uros,
ubiz...@gmail.com wrote on Mon, 9 Sep 2024 09:53:49 +0200:
> Substitute the inclusion of header with
> to allow the removal of legacy inclusion
> of from .
Acked-by: Miquel Raynal
>
> Signed-off-by: Uros Bizjak
> Cc: Miquel Raynal
> Cc: Richard Wein
Hi Hui-Ping,
hpchen0...@gmail.com wrote on Wed, 28 Aug 2024 10:47:17 +0800:
> Dear Miquèl,
>
> Thank you for your reply.
>
>
>
> On 2024/8/24 上午 12:26, Miquel Raynal wrote:
> > Hi,
> >
> > hpchen0...@gmail.com wrote on Wed, 21 Aug 2024 07:11:31 +0
Hi Hui-Ping,
hpchen0...@gmail.com wrote on Wed, 21 Aug 2024 07:11:32 +:
> Nuvoton MA35 SoCs NAND Flash Interface Controller
> supports 2KB, 4KB and 8KB page size, and up to 8-bit,
Suffix is: kiB
> 12-bit, and 24-bit hardware ECC calculation circuit
> to protect data communication.
It's not
Hi,
hpchen0...@gmail.com wrote on Wed, 21 Aug 2024 07:11:31 +:
> Add dt-bindings for the Nuvoton MA35 SoC NAND Controller.
>
> Signed-off-by: Hui-Ping Chen
> Reviewed-by: Krzysztof Kozlowski
> ---
> .../bindings/mtd/nuvoton,ma35d1-nand.yaml | 93 +++
> 1 file changed,
On Fri, 2023-12-08 at 22:47:03 UTC, "Matthew Wilcox (Oracle)" wrote:
> As far as anybody can tell, this product never shipped. If it did,
> it shipped in 2007 and nobody has access to one any more. Remove the
> mtd NOR driver.
>
> Signed-off-by: Matthew Wilcox (Oracle)
Applied to https://git.k
Hi Pekka,
pekka.paala...@haloniitty.fi wrote on Fri, 2 Feb 2024 17:49:13 +0200:
> On Fri, 2 Feb 2024 13:13:22 +0100
> Miquel Raynal wrote:
>
> > Hello Maxime,
> >
> > + Arthur
> >
> > mrip...@kernel.org wrote on Fri, 2 Feb 2024 10:53:37 +0100:
> >
Hello Maxime,
+ Arthur
mrip...@kernel.org wrote on Fri, 2 Feb 2024 10:53:37 +0100:
> Hi Miquel,
>
> On Fri, Feb 02, 2024 at 10:26:01AM +0100, Miquel Raynal wrote:
> > pekka.paala...@haloniitty.fi wrote on Fri, 2 Feb 2024 10:55:22 +0200:
> >
> > > On T
Hi Pekka,
pekka.paala...@haloniitty.fi wrote on Fri, 2 Feb 2024 10:55:22 +0200:
> On Thu, 01 Feb 2024 18:31:32 +0100
> Louis Chauvet wrote:
>
> > Change the composition algorithm to iterate over pixels instead of lines.
> > It allows a simpler management of rotation and pixel access for complex
(and other RAM consuming subsystem)
> also matter, it may be relevant to apply this workaround in order to
> help them fetching from RAM more reliably.
>
> Signed-off-by: Miquel Raynal
> ---
>
> Hello,
>
> This really is an RFC as the bug was also observed on
consuming subsystem)
also matter, it may be relevant to apply this workaround in order to
help them fetching from RAM more reliably.
Signed-off-by: Miquel Raynal
---
Hello,
This really is an RFC as the bug was also observed on v6.5 but the fix
proposed here was written and tested on a v4.14 kerne
Hi Boris,
s...@ravnborg.org wrote on Thu, 10 Aug 2023 19:31:25 +0200:
> > I queued it to drm-misc-next this morning.
Yeah, thanks a lot!
Cheers,
Miquèl
Hi Sam,
s...@ravnborg.org wrote on Mon, 7 Aug 2023 18:52:45 +0200:
> Hi Miquel,
>
> On Mon, Aug 07, 2023 at 11:12:46AM +0200, Miquel Raynal wrote:
> > Hi Sam,
> >
> > s...@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200:
> >
> > > On Fri
Add Mitsubishi AA084XE01 8.4" XGA TFT LCD panel compatible string.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Miquel Raynal
Acked-by: Krzysztof Kozlowski
---
Changes in v4:
* Add datasheet link.
* Supplement Cc: list.
Changes in v3:
* None.
Chang
From: Thomas Weber
Add support for the Mitsubishi AA084XE01 panel which is an 8.4 inch XGA
TFT-LCD module for industrial use.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Thomas Weber
Signed-off-by: Miquel Raynal
---
Changes in v4:
* None.
Changes in v3
Hi Sam,
s...@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200:
> On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote:
> > On the SoC host controller, the pixel clock can be:
> > * standard: data is launched on the rising edge
> > * inverted: data is launche
engineering. I also appended the series
> from Miquel Raynal adding EDT ET028013DMA panel support, so that I could
> easily test it with my SPI_NO_RX setup. They are slightly different due
> to rebasing.
Thanks a lot! I'll continue following the series and provide my help
when required.
Hi Sebastian,
+ Thomas
s...@kernel.org wrote on Sat, 22 Apr 2023 22:49:59 +0200:
> Hi,
>
> This adds panel support for Inanbo T28CP45TN89, which I found inside of a
> handheld thermal camera. The panel is based on the st7789v controller. All
> information is based on reverse engineering.
I hav
nks,
> Miquèl
>
> Changes in v3:
> * Fixed the dev->parent referencing in the host1x driver.
> * Collected Rob's Acked-by.
>
> Changes in v2:
> * Dropped all the of_device.h/of_module.h changes
> * Directly used of_device_uevent() from the host1x driver
>
>
Hello,
s...@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200:
> On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote:
> > On the SoC host controller, the pixel clock can be:
> > * standard: data is launched on the rising edge
> > * inverted: data is launche
d-off-by: Miquel Raynal
---
drivers/gpu/host1x/bus.c | 29 ++---
1 file changed, 6 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c
index 4d16a3396c4a..84d042796d2e 100644
--- a/drivers/gpu/host1x/bus.c
+++ b/drivers/gpu/host
tly used of_device_uevent() from the host1x driver
Miquel Raynal (2):
of: module: Export of_device_uevent()
gpu: host1x: Stop open-coding of_device_uevent()
drivers/gpu/host1x/bus.c | 29 ++---
drivers/of/device.c | 1 +
2 files changed, 7 insertions(+), 23 deletions(-)
--
2.34.1
only useful in drivers/base, which is built-in anyway.
With the idea of getting rid of the hardcoded implementation of
of_device_uevent() in other places in the kernel, let's export it to GPL
modules (very much like its cousins in the same file).
Signed-off-by: Miquel Raynal
Acked-by: Rob He
Hi Rob,
r...@kernel.org wrote on Thu, 22 Jun 2023 08:31:40 -0600:
> On Fri, Jun 09, 2023 at 05:56:34PM +0200, Miquel Raynal wrote:
> > There is apparently no reasons to open-code of_device_uevent() besides:
> > - The helper receives a struct device while we want to use the of_no
Add Mitsubishi AA084XE01 8.4" XGA TFT LCD panel compatible string.
Signed-off-by: Miquel Raynal
Acked-by: Krzysztof Kozlowski
---
Changes in v3:
* None.
Changes in v2:
* Collected tag.
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 inser
From: Thomas Weber
Add support for the Mitsubishi AA084XE01 panel which is an 8.4 inch XGA
TFT-LCD module for industrial use.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Thomas Weber
Signed-off-by: Miquel Raynal
---
Changes in v3:
* Fix connector type
1.pdf
> Signed-off-by: Thomas Weber
> Signed-off-by: Miquel Raynal
> ---
>
> Changes in v2:
> * Lowered the clock to match the typical 65MHz frequency.
> * Added the connector type and the missing bus flags.
> * Collected an A-by tag.
>
> drivers/gpu/drm/panel/panel
, in case
the DT description would be lacking the Rx bus width (which is likely on
old descriptions) in order to avoid breaking existing devices.
Signed-off-by: Miquel Raynal
Acked-by: Sam Ravnborg
Acked-by: Maxime Ripard
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 81
. Correct the
definition to ease the comparison with the datasheet.
Signed-off-by: Miquel Raynal
Acked-by: Maxime Ripard
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
b/drivers
following situation
occurs:
* Pixel clock is above 3MHz
* Pixel clock is not inverted
I could not properly identify the reasons behind these failures, scope
captures show valid input signals.
Signed-off-by: Miquel Raynal
Acked-by: Maxime Ripard
---
.../gpu/drm/panel/panel-sitronix-st7789v.c
The Sitronix controller expects 9-bit words, provide this as default at
probe time rather than specifying this in each and every access.
Signed-off-by: Miquel Raynal
Reviewed-by: Sam Ravnborg
Acked-by: Maxime Ripard
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 6 +-
1 file changed
The ST7789V LCD controller supports regular SPI wiring, as well as no Rx
data line at all. The operating system needs to know whether it can read
registers from the device or not. Let's detail this specific design
possibility by bounding the spi-rx-bus-width property.
Signed-off-by: Miquel R
here is no MISO line.
* Used dev_err_probe() when relevant.
* Sorted the IDs in the tables.
* Renamed the panel mode.
* Fixed typos.
Miquel Raynal (6):
dt-bindings: display: st7789v: Add the edt,et028013dma panel
compatible
dt-bindings: display: st7789v: bound the number of Rx data lines
The ST7789V LCD controller is also embedded in the ET028013DMA
panel. Add a compatible string to describe this other panel.
Signed-off-by: Miquel Raynal
Acked-by: Krzysztof Kozlowski
Acked-by: Maxime Ripard
---
.../devicetree/bindings/display/panel/sitronix,st7789v.yaml | 1 +
1 file
Hi Maxime,
max...@cerno.tech wrote on Mon, 19 Jun 2023 11:39:56 +0200:
> On Sun, Jun 18, 2023 at 07:37:32PM +0200, Miquel Raynal wrote:
> > Hello Maxime,
> >
> > max...@cerno.tech wrote on Sun, 18 Jun 2023 16:37:58 +0200:
> >
> > > Hi,
> > >
&
Add Mitsubishi AA084XE01 8.4" XGA TFT LCD panel compatible string.
Signed-off-by: Miquel Raynal
Acked-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/di
From: Thomas Weber
Add support for the Mitsubishi AA084XE01 panel which is an 8.4 inch XGA
TFT-LCD module for industrial use.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Thomas Weber
Signed-off-by: Miquel Raynal
---
Changes in v2:
* Lowered the clock to
Hello Maxime,
max...@cerno.tech wrote on Sun, 18 Jun 2023 16:37:58 +0200:
> Hi,
>
> On Fri, Jun 16, 2023 at 06:32:51PM +0200, Miquel Raynal wrote:
> > The ST7789V LCD controller supports regular SPI wiring, as well as no Rx
> > data line at all. The operating system needs t
From: Thomas Weber
Add support for the Mitsubishi AA084XE01 panel which is an 8.4 inch XGA
TFT-LCD module for industrial use.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Thomas Weber
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-simple.c
Add Mitsubishi AA084XE01 8.4" XGA TFT LCD panel compatible string.
Signed-off-by: Miquel Raynal
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.ya
following situation
occurs:
* Pixel clock is above 3MHz
* Pixel clock is not inverted
I could not properly identify the reasons behind these failures, scope
captures show valid input signals.
Signed-off-by: Miquel Raynal
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 25
The Sitronix controller expects 9-bit words, provide this as default at
probe time rather than specifying this in each and every access.
Signed-off-by: Miquel Raynal
Reviewed-by: Sam Ravnborg
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 6 +-
1 file changed, 5 insertions(+), 1
. Correct the
definition to ease the comparison with the datasheet.
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
b/drivers/gpu/drm/panel/panel
The ST7789V LCD controller supports regular SPI wiring, as well as no Rx
data line at all. The operating system needs to know whether it can read
registers from the device or not. Let's detail this specific design
possibility by bounding the spi-rx-bus-width property.
Signed-off-by: Miquel R
read helper and use it to verify the communication with the panel
is working as soon as possible in order to fail early if this is not the
case.
As this panel may work with no MISO line, the check is discarded in this
case.
Signed-off-by: Miquel Raynal
Acked-by: Sam Ravnborg
---
.../gpu/drm
ure he has already added.
* Collected tags.
* Prevented the ID check to fail if there is no MISO line.
* Used dev_err_probe() when relevant.
* Sorted the IDs in the tables.
* Renamed the panel mode.
* Fixed typos.
Miquel Raynal (6):
dt-bindings: display: st7789v: Add the edt,et028013dma panel
The ST7789V LCD controller is also embedded in the ET028013DMA
panel. Add a compatible string to describe this other panel.
Signed-off-by: Miquel Raynal
---
.../devicetree/bindings/display/panel/sitronix,st7789v.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation
Hi Sebastian,
s...@kernel.org wrote on Thu, 15 Jun 2023 01:27:24 +0200:
> Hi,
>
> On Sat, Jun 10, 2023 at 10:45:25PM +0200, Sam Ravnborg wrote:
> > Hi Miquel,
> >
> > On Fri, Jun 09, 2023 at 04:59:51PM +0200, Miquel Raynal wrote:
> > > A very basic debug
Hi Maxime,
mrip...@kernel.org wrote on Mon, 12 Jun 2023 10:51:09 +0200:
> On Fri, Jun 09, 2023 at 04:59:50PM +0200, Miquel Raynal wrote:
> > This panel from Emerging Display Technologies Corporation features an
> > ST7789V2 panel inside which is almost identical to what the Sit
Hi Sam,
s...@ravnborg.org wrote on Sat, 10 Jun 2023 22:12:46 +0200:
> On Fri, Jun 09, 2023 at 04:59:47PM +0200, Miquel Raynal wrote:
> > The LCD controller supports RGB444, RGB565 and RGB888. The value that is
> > written in the COLMOD register indicates using RGB888, s
Hi liao,
jaimeliao...@gmail.com wrote on Wed, 14 Jun 2023 17:06:16 +0800:
> Hi Miquel
>
>
> >
> > Hello,
> >
> > avkras...@sberdevices.ru wrote on Tue, 23 May 2023 13:16:34 +0300:
> >
> > > This adds support for OTP area access on MX30LFxG18AC chip series.
> >
> > Jaime, any feedback on thi
Hi Michael,
michael.rie...@wolfvision.net wrote on Tue, 13 Jun 2023 08:15:26 +0200:
> Hi Miquel,
>
> On 6/9/23 16:59, Miquel Raynal wrote:
> > The spi core warns us about using an of_device_id table without a
>
> s/spi/SPI ?
Actually both are accepted in the kernel, II
Hello,
avkras...@sberdevices.ru wrote on Tue, 23 May 2023 13:16:34 +0300:
> This adds support for OTP area access on MX30LFxG18AC chip series.
Jaime, any feedback on this? Will you test it?
How are we supposed to test the OTP is locked? I see this is still an
open point.
>
> Signed-off-by: Ar
only useful in drivers/base, which is built-in anyway.
With the idea of getting rid of the hardcoded implementation of
of_device_uevent() in other places in the kernel, let's export it to GPL
modules (very much like its cousins in the same file).
Signed-off-by: Miquel Raynal
---
drivers/of/dev
d-off-by: Miquel Raynal
---
This patch depends on the changes performed earlier in the series under
the drivers/of/ folder.
---
drivers/gpu/host1x/bus.c | 29 ++---
1 file changed, 6 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus
are, alone.
Link: https://lore.kernel.org/all/20230608184903.ga3200973-r...@kernel.org/
Thanks,
Miquèl
Changes in v2:
* Dropped all the of_device.h/of_module.h changes
* Directly used of_device_uevent() from the host1x driver
Miquel Raynal (2):
of: module: Export of_device_uevent()
gpu
On the SoC host controller, the pixel clock can be:
* standard: data is launched on the rising edge
* inverted: data is launched on the falling edge
Some panels may need the inverted option to be used so let's support
this DRM flag.
Signed-off-by: Miquel Raynal
---
Hello, this chang
a read helper and use it to verify the communication with the panel
is working as soon as possible in order to fail early if this is not the
case.
Signed-off-by: Miquel Raynal
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 78 +++
1 file changed, 78 insertions(+)
diff --git
The Sitronix controller expects 9-bit words, provide this as default at
probe time rather than specifying this in each and every access.
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a
The LCD controller supports RGB444, RGB565 and RGB888. The value that is
written in the COLMOD register indicates using RGB888, so let's clearly
specify the in-use bus format.
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 4
1 file changed, 4 inser
ronix,st7789v" valid alone for backward compatibility,
but we should definitely provide two compatibles to fully describe such
panel, so let's expect to have both when describing a panel such as the
EDT ET028013DMA.
Signed-off-by: Miquel Raynal
---
.../bindings/display/panel/sitro
situation
occurs:
* Pixel clock is above 3MHz
* Pixel clock is not inverted
I could not properly identify the reasons behind these failures, scope
captures show valid input signals.
Signed-off-by: Miquel Raynal
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 34 +--
1 file changed
The spi core warns us about using an of_device_id table without a
spi_device_id table aside for module utilities in orter to not rely on
OF modaliases. Just add this table using the device name without the
vendor prefix (as it is usually done).
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm
lable as platform data.
There is no functional change.
Signed-off-by: Miquel Raynal
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 30 +++
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
b/drivers/gpu/drm/panel/
patch
actually adds a read helper and uses it to perform a sanity check at
probe time by verifying the Sitronix controller IDs. If deemed
irrelevant, this patch may be discarded.
Thanks,
Miquèl
Miquel Raynal (7):
drm/panel: sitronix-st7789v: Prevent core spi warnings
drm/panel: sitronix-st7789v
Hi Arseniy,
avkras...@sberdevices.ru wrote on Mon, 15 May 2023 12:49:50 +0300:
> Hello @Miquel!
>
> Sorry, but who could review this patch? :) IIUC this logic is very hw
> specific and we need
> someone who knows it well? I tested this patch on our devices (with already
> known Meson NAND
> co
d-off-by: Miquel Raynal
---
This patch depends on the changes performed earlier in the series under
the drivers/of/ folder.
---
drivers/gpu/host1x/bus.c | 31 ++-
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host
of int.
Signed-off-by: Miquel Raynal
---
drivers/of/device.c | 25 -
drivers/of/module.c | 19 +++
include/linux/of.h| 8
include/linux/of_device.h | 13 ++---
4 files changed, 37 insertions(+), 28 deletions(-)
diff
Let's move the logic of the former helper into module.c and use it from
an inline helper located under of_device.c. This way there is no change
for users while the logic gets moved to an OF-only file.
Signed-off-by: Miquel Raynal
---
drivers/of/device.c
: here they are.
Link:
https://lore.kernel.org/lkml/20230307165359.225361-1-miquel.ray...@bootlin.com/
The last step of this series is to actually remove a copy of one of
these helpers which I think is not needed. This drivers/gpu/ patch
depends on the previous changes.
Thanks, Miquèl
Miquel R
drivers/base, which is built-in anyway.
With the idea of getting rid of the hardcoded implementation of
of_uevent() in other places in the kernel, let's export it to GPL
modules (very much like its cousins in the same file).
Signed-off-by: Miquel Raynal
---
drivers/of/module.c | 1 +
1 file ch
Move the OF related logic inside of/module.c and use it from of_device.h
with an inline helper so there is no visible change from the users point
of view.
Signed-off-by: Miquel Raynal
---
drivers/of/device.c | 42 ---
drivers/of/module.c | 41
clocks) is selected by a
+ * single bit.
+ * That single bit affects all sub-clocks, and therefore needs to change the
+ * active gate (and turn the others off) and force a recalculation of the
rates.
I don't know how much of this file has been upstreamed (under a
different form) but t
On Mon, 2022-09-05 at 06:30:55 UTC, Dmitry Torokhov wrote:
> I would like to stop exporting OF-specific devm_gpiod_get_from_of_node()
> so that gpiolib can be cleaned a bit, so let's switch to the generic
> fwnode property API.
>
> Signed-off-by: Dmitry Torokhov
Applied to https://git.kernel.org
/sst25l.c | 4 +---
For MTD devices:
Acked-by: Miquel Raynal
Thanks,
Miquèl
Add runtime PM
> and OPP support to the NAND driver.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/mtd/nand/raw/tegra_nand.c | 62 +++
> 1 file changed, 54 insertions(+), 8 deletions(-)
>
Acked-by: Miquel Raynal
Thanks,
Miquèl
/spi-nor/controllers/hisi-sfc.c:328: warning: Function parameter
> or member 'host' not described in 'hisi_spi_nor_register'
>
> Cc: Tudor Ambarus
> Cc: Miquel Raynal
> Cc: Richard Weinberger
> Cc: Vignesh Raghavendra
> Cc: Sumit Semwal
> Cc: "Chr
Hi Lee,
Lee Jones wrote on Fri, 6 Nov 2020 21:36:32
+:
> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
>
> v1 => v2:
> - Added tags
> - Satisfied Miquel's review comments
>
You
rn ret;
>
> - phy_set_mode(lvds->dphy, PHY_MODE_LVDS);
> + ret = phy_set_mode(lvds->dphy, PHY_MODE_LVDS);
> if (ret)
> return ret;
>
I thought I (or Heiko) already sent a patch for that but apparently
not...
Reviewed-by: Mi
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