Re: [PATCH libdrm] intel: add support for ICL 11

t. v3: Fix double definition of PCI IDs, update IDs according to bspec and keep them in the same order and rebase (Lucas) Cc: Michel Thierry Signed-off-by: Paulo Zanoni Signed-off-by: Rodrigo Vivi Signed-off-by: Lucas De Marchi --- intel/intel_bufmgr_gem.c | 2 ++ intel/intel_chipset

[Mesa-dev] [PATCH v4 1/2] intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)

On 11/18/2015 10:53 PM, Kristian Høgsberg wrote: > On Wed, Oct 14, 2015 at 5:11 AM, Michel Thierry > wrote: >> On 10/14/2015 8:19 AM, Daniel Vetter wrote: >>> >>> On Tue, Oct 13, 2015 at 02:51:36PM -0700, Kristian Høgsberg wrote: >>>> >>&g

[Mesa-dev] [PATCH v4 1/2] intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)

On 10/14/2015 8:19 AM, Daniel Vetter wrote: > On Tue, Oct 13, 2015 at 02:51:36PM -0700, Kristian Høgsberg wrote: >> On Tue, Oct 13, 2015 at 7:55 AM, Michel Thierry >> wrote: >>> On 10/13/2015 3:13 PM, Emil Velikov wrote: >>>> >>>> On 13 O

[PATCH v4 1/2] intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)

On 10/13/2015 3:13 PM, Emil Velikov wrote: > On 13 October 2015 at 13:16, Michel Thierry > wrote: >> On 10/6/2015 2:12 PM, Michel Thierry wrote: >>> >>> On 10/5/2015 7:06 PM, Kristian Høgsberg wrote: >>>> >>>> On Mon, Oct 5, 2015 at 7:03 AM

[PATCH v4 1/2] intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)

On 10/6/2015 2:12 PM, Michel Thierry wrote: > On 10/5/2015 7:06 PM, Kristian Høgsberg wrote: >> On Mon, Oct 5, 2015 at 7:03 AM, Michel Thierry >> wrote: >>> On 9/14/2015 2:54 PM, Michał Winiarski wrote: >>>> >>>> On Thu, Sep 03, 2015 at 03:23:58

[PATCH v4 1/2] intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)

On 10/5/2015 7:06 PM, Kristian Høgsberg wrote: > On Mon, Oct 5, 2015 at 7:03 AM, Michel Thierry > wrote: >> On 9/14/2015 2:54 PM, Michał Winiarski wrote: >>> >>> On Thu, Sep 03, 2015 at 03:23:58PM +0100, Michel Thierry wrote: >>>> >>>> Gen

[PATCH v4 1/2] intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)

On 9/14/2015 2:54 PM, Michał Winiarski wrote: > On Thu, Sep 03, 2015 at 03:23:58PM +0100, Michel Thierry wrote: >> Gen8+ supports 48-bit virtual addresses, but some objects must always be >> allocated inside the 32-bit address range. >> >> In specific, any resou

[RFC v4] i965/gen8+: bo in state base address must be in 32-bit address range

, libdrm requires to set the support flag before calling emit_reloc. References: http://lists.freedesktop.org/archives/dri-devel/2015-September/089757.html Cc: Ben Widawsky Cc: Chris Wilson Signed-off-by: Michel Thierry --- configure.ac | 2 +- src/mesa

[PATCH v4 2/2] intel: add drm_intel_bo_use_48b_address_range to symbol-check test

Signed-off-by: Michel Thierry --- intel/intel-symbol-check | 1 + 1 file changed, 1 insertion(+) diff --git a/intel/intel-symbol-check b/intel/intel-symbol-check index c555e6d..64ec4ed 100755 --- a/intel/intel-symbol-check +++ b/intel/intel-symbol-check @@ -39,6 +39,7 @@ drm_intel_bo_subdata

[PATCH v4 1/2] intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)

http://lists.freedesktop.org/archives/intel-gfx/2015-July/072612.html Cc: Ben Widawsky Cc: Michał Winiarski Signed-off-by: Michel Thierry --- include/drm/i915_drm.h| 3 +- intel/intel_bufmgr.c | 11 ++ intel/intel_bufmgr.h | 1 + intel/intel_bufmgr_gem.c

[PATCH libdrm v4 0/2] 48-bit virtual address support in i915

these patches to comply with the i915 merge process. Once the kernel patch is merged, I'll make a new libdrm release and address the mesa build dependency. [1] http://lists.freedesktop.org/archives/dri-devel/2015-August/087837.html Michel Thierry (2): intel: 48b ppg

[PATCH] drm/mm: Do DRM_MM_CREATE_TOP adj_start calculation after color_adjust

systems without LLC. But I'm not aware of anybody using this test case yet. Signed-off-by: Michel Thierry --- drivers/gpu/drm/drm_mm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c index 3427b11..04de6fd 100644 ---

[Intel-gfx] [PATCH mesa v3] i965/gen8+: bo in state base address must be in 32-bit address range

Hi, Thanks for the comments, On 8/7/2015 11:46 PM, Kristian Høgsberg wrote: > On Fri, Aug 7, 2015 at 2:45 AM, Michel Thierry > wrote: >> Gen8+ supports 48-bit virtual addresses, but some objects must always be >> allocated inside the 32-bit address range. >> >>

[Intel-gfx] [PATCH libdrm v3 1/2] intel: Add EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag

On 8/7/2015 11:56 AM, Michał Winiarski wrote: > On Fri, Aug 07, 2015 at 10:45:21AM +0100, Michel Thierry wrote: >> Gen8+ supports 48-bit virtual addresses, but some objects must always be >> allocated inside the 32-bit address range. >> >> In specific, any resou

[PATCH mesa v3] i965/gen8+: bo in state base address must be in 32-bit address range

/2015-July/072612.html Cc: Ben Widawsky Cc: Chris Wilson Signed-off-by: Michel Thierry --- configure.ac | 2 +- src/mesa/drivers/dri/i965/gen8_misc_state.c | 19 +++ src/mesa/drivers/dri/i965/intel_batchbuffer.c | 20 src

[PATCH libdrm v3 2/2] intel: add new function name to symbol-check test

Signed-off-by: Michel Thierry --- intel/intel-symbol-check | 1 + 1 file changed, 1 insertion(+) diff --git a/intel/intel-symbol-check b/intel/intel-symbol-check index c555e6d..6f8450b 100755 --- a/intel/intel-symbol-check +++ b/intel/intel-symbol-check @@ -18,6 +18,7 @@ drm_intel_bo_busy

[PATCH libdrm v3 1/2] intel: Add EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag

internal, no-one needs to use them directly. References: http://lists.freedesktop.org/archives/intel-gfx/2015-July/072612.html Cc: Ben Widawsky Cc: Dave Gordon Signed-off-by: Michel Thierry --- include/drm/i915_drm.h| 3 ++- intel/intel_bufmgr.c | 16 ++ intel

[PATCH libdrm v3 0/2] 48-bit virtual address support in i915

erged, I'll make a new libdrm release and address the mesa build dependency. Michel Thierry (2): intel: Add EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag intel: add new function name to symbol-check test include/drm/i915_drm.h| 3 ++- intel/intel-symbol-check | 1 + intel/intel_bufmgr.c

[PATCH libdrm v2 1/2] intel: Add EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag.

On 7/1/2015 6:06 PM, Emil Velikov wrote: > Hi Michel, > > Although I cannot comment on the exact implementation I can give you > general some tips which you might find useful. > Hi Emil, > On 1 July 2015 at 16:28, Michel Thierry wrote: >> Gen8+ supports 48-bit virtual add

[PATCH libdrm v2 2/2] configure.ac: bump version to 2.4.63

Cc: dri-devel at lists.freedesktop.org Signed-off-by: Michel Thierry --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 001fd3d..12b8465 100644 --- a/configure.ac +++ b/configure.ac @@ -20,7 +20,7 @@ AC_PREREQ([2.63]) AC_INIT

[PATCH libdrm v2 1/2] intel: Add EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag.

calls to drm_intel_bo_emit_reloc will clear it. v2: Make set/clear functions nops on pre-gen8 platforms, and use them internally in emit_reloc functions (Ben) s/48BADDRESS/48B_ADDRESS/ (Dave) Cc: Ben Widawsky Cc: Dave Gordon Cc: dri-devel at lists.freedesktop.org Signed-off-by: Michel

[PATCH libdrm] intel: Add EXEC_OBJECT_SUPPORTS_48BADDRESS flag.

State Offset and Instruction State Offset are limited to 32-bits. Provide a flag to set when the 4GB limit is not necessary in a given bo. 48-bit range will only be used when explicitly requested. Cc: dri-devel at lists.freedesktop.org Signed-off-by: Michel Thierry --- include/drm/i915_drm.h| 3