> drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 274 ++-
> drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 1948 -
> 5 files changed, 2683 insertions(+), 1128 deletions(-)
I gave your changes a quick test on my RK3568 device and did not find
any regressions ->
Tested-by: Michael Riesch # on RK3568
Thanks and best regards,
Michael
s a missing
"rotation" property gracefully.
Also, all other panel drivers I checked handle the
of_drm_get_panel_orientation call as you suggested. Nice to see this
becoming aligned.
Reviewed-by: Michael Riesch
Thanks and best regards,
Michael
Add compatible for the Jasonic Technology Ltd. JT240MHQS-HWT-EK-E3
display.
Acked-by: Conor Dooley
Signed-off-by: Michael Riesch
---
Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings
The ST7789V controller features support for the partial mode. Here,
the area to be displayed can be restricted in one direction (by default,
in vertical direction). This is useful for panels that are partially
occluded by design. Add support for the partial mode.
Signed-off-by: Michael Riesch
The Jasonic JT240MHQS-HWT-EK-E3 is a custom panel using the Sitronix
ST7789V controller. While the controller features a resolution of
320x240, only an area of 280x240 is visible by design.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 29
!
---
Changes in v2:
- Add comment w.r.t. modes (as requested by Maxime)
- Link to v1:
https://lore.kernel.org/r/20230718-feature-lcd-panel-v1-0-e9a85d537...@wolfvision.net
---
Michael Riesch (4):
dt-bindings: vendor-prefixes: add jasonic
dt-bindings: display: st7789v: add jasonic jt240mhqs
Add vendor prefix for Jasonic Technology Ltd., a manufacturer
of custom LCD panels.
Acked-by: Conor Dooley
Signed-off-by: Michael Riesch
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor
Hi Neil,
On 8/4/23 10:40, Neil Armstrong wrote:
> Hi,
>
> On 03/08/2023 22:13, Michael Riesch wrote:
>> Determine the orientation of the display based on the device tree and
>> propagate it.
>>
>> Reviewed-by: Neil Armstrong
>> Signed-off-by: Michael Ri
The sitronix-st7789v driver now considers the rotation property.
Add the property to the documentation.
Acked-by: Conor Dooley
Reviewed-by: Sebastian Reichel
Signed-off-by: Michael Riesch
---
Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml | 2 ++
1 file changed, 2
-st7789v-v2-0-207cb1bae...@wolfvision.net
Changes in v2:
- Move indentation fix to separate patch (as suggested by Neil)
- Link to v1:
https://lore.kernel.org/r/20230718-feature-st7789v-v1-0-76d6ca9b3...@wolfvision.net
---
Michael Riesch (3):
drm/panel: sitronix-st7789v: fix indentation in
Determine the orientation of the display based on the device tree and
propagate it.
Reviewed-by: Neil Armstrong
Reviewed-by: Sebastian Reichel
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 17 +
1 file changed, 17 insertions(+)
diff --git
Fix indentation of the callbacks in struct drm_panel_funcs.
No functional changes.
Reviewed-by: Sebastian Reichel
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm
Hi Neil,
On 8/4/23 10:41, Neil Armstrong wrote:
> Hi Michael,
>
> On 18/07/2023 17:31, Michael Riesch wrote:
>> The ST7789V controller features support for the partial mode. Here,
>> the area to be displayed can be restricted in one direction (by default,
>> in v
Determine the orientation of the display based on the device tree and
propagate it.
Reviewed-by: Neil Armstrong
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel
Fix indentation of the callbacks in struct drm_panel_funcs.
No functional changes.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
b
The sitronix-st7789v driver now considers the rotation property.
Add the property to the documentation.
Acked-by: Conor Dooley
Signed-off-by: Michael Riesch
---
Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a
://lore.kernel.org/r/20230718-feature-st7789v-v1-0-76d6ca9b3...@wolfvision.net
---
Michael Riesch (3):
drm/panel: sitronix-st7789v: fix indentation in drm_panel_funcs
drm/panel: sitronix-st7789v: add panel orientation support
dt-bindings: display: add rotation property to sitronix
Hi all,
In order to avoid spamming the list, I sparked a discussion in
#dri-devel. FTR the log can be found here:
https://oftc.irclog.whitequark.org/dri-devel/2023-08-02#32360491;
On 8/2/23 14:47, Maxime Ripard wrote:
> Hi,
>
> On Wed, Aug 02, 2023 at 02:34:28PM +0200, Michael Rie
Hi Neil,
On 8/2/23 14:39, Neil Armstrong wrote:
> On 18/07/2023 17:12, Michael Riesch wrote:
>> Determine the orientation of the display based on the device tree and
>> propagate it.
>>
>> While at it, fix the indentation in the struct drm_panel_funcs.
>>
Hi Maxime,
On 7/19/23 08:39, Maxime Ripard wrote:
> Hi,
>
> On Tue, Jul 18, 2023 at 05:31:52PM +0200, Michael Riesch wrote:
>> The ST7789V controller features support for the partial mode. Here,
>> the area to be displayed can be restricted in one direction (by default,
>
Hi all,
On 7/18/23 17:12, Michael Riesch wrote:
> Hi all,
>
> This series adds support for orientation specification in the device
> tree to the Sitronix ST7789V panel driver.
>
> This is can be seen as reduced version of [0] (some things of [0] have
> been implemented in
Add compatible for the Jasonic Technology Ltd. JT240MHQS-HWT-EK-E3
display.
Signed-off-by: Michael Riesch
---
Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/sitronix
The Jasonic JT240MHQS-HWT-EK-E3 is a custom panel using the Sitronix
ST7789V controller. While the controller features a resolution of
320x240, only an area of 280x240 is visible by design.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 29
The ST7789V controller features support for the partial mode. Here,
the area to be displayed can be restricted in one direction (by default,
in vertical direction). This is useful for panels that are partially
occluded by design. Add support for the partial mode.
Signed-off-by: Michael Riesch
Add vendor prefix for Jasonic Technology Ltd., a manufacturer
of custom LCD panels.
Signed-off-by: Michael Riesch
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b
https://lore.kernel.org/lkml/20230714013756.1546769-1-...@kernel.org/
Looking forward to your comments!
---
Michael Riesch (4):
dt-bindings: vendor-prefixes: add jasonic
dt-bindings: display: st7789v: add jasonic jt240mhqs-hwt-ek-e3 display
drm/panel: sitronix-st7789v: add
Determine the orientation of the display based on the device tree and
propagate it.
While at it, fix the indentation in the struct drm_panel_funcs.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 28 +-
1 file changed, 23 insertions
The sitronix-st7789v driver now considers the rotation property.
Add the property to the documentation.
Signed-off-by: Michael Riesch
---
Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree
forward to your comments!
[0]
https://lore.kernel.org/lkml/20230314115644.3775169-1-gerald.loac...@wolfvision.net/
[1] https://lore.kernel.org/lkml/20230714013756.1546769-1-...@kernel.org/
---
Michael Riesch (2):
drm/panel: sitronix-st7789v: add panel orientation support
dt-bindings
Hi Miquel,
On 6/9/23 16:59, Miquel Raynal wrote:
> A very basic debugging rule when a device is connected for the first
> time is to access a read-only register which contains known data in
> order to ensure the communication protocol is properly working. This
> driver lacked any read helper which
Hi Miquel,
On 6/9/23 16:59, Miquel Raynal wrote:
> The spi core warns us about using an of_device_id table without a
s/spi/SPI ?
> spi_device_id table aside for module utilities in orter to not rely on
s/in orter to/in order to ?
> OF modaliases. Just add this table using the device name witho
4 + 4,
> };
>
> +struct st7789_panel_info default_panel = {
> + .mode = &default_mode,
> +};
Shouldn't this be "static const struct st7789_panel_info default_panel"?
(Same holds for "struct st7789_panel_info t28cp45tn89_panel" in patch
13/13.)
With
Hi Maxime,
On 4/4/23 18:04, Maxime Ripard wrote:
> On Fri, Mar 31, 2023 at 11:36:43AM +0200, Michael Riesch wrote:
>> On 3/30/23 16:58, Maxime Ripard wrote:
>>> On Wed, Mar 29, 2023 at 12:08:50PM +0200, Michael Riesch wrote:
>>>> On 3/29/23 11:16, Maxime Ripard wro
Hi Sebastian,
On 3/18/23 00:23, Sebastian Reichel wrote:
> SPI device drivers should also have a SPI ID table.
>
> Signed-off-by: Sebastian Reichel
> ---
> drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel
Hi Sebastian,
Thanks for your work and for the beautiful timing :-)
On 3/18/23 00:23, Sebastian Reichel wrote:
> UNI-T UTi260b has a Inanbo T28CP45TN89 v17 panel. I could not find
> proper documentation for the panel apart from a technical drawing, but
> according to the vendor U-Boot it is based
e device tree to override timing mode
> dt-bindings: display: add panel-timing property to sitronix,st7789v
>
> Michael Riesch (3):
> drm/panel: sitronix-st7789v: propagate RGB666 format
> drm/panel: sitronix-st7789v: add panel orientation support
> dt-bindings: display: add
Hi Maxime,
On 3/30/23 16:58, Maxime Ripard wrote:
> On Wed, Mar 29, 2023 at 12:08:50PM +0200, Michael Riesch wrote:
>> On 3/29/23 11:16, Maxime Ripard wrote:
>>> On Thu, Mar 16, 2023 at 11:29:53PM +0100, Michael Riesch wrote:
>>>> Hi Rob,
>>>>
>>
Hi Maxime,
On 3/29/23 11:16, Maxime Ripard wrote:
> On Thu, Mar 16, 2023 at 11:29:53PM +0100, Michael Riesch wrote:
>> Hi Rob,
>>
>> On 3/16/23 22:57, Rob Herring wrote:
>>> On Tue, Mar 14, 2023 at 12:56:44PM +0100, Gerald Loacker wrote:
>>>> The sitro
Hi Rob,
On 3/16/23 22:57, Rob Herring wrote:
> On Tue, Mar 14, 2023 at 12:56:44PM +0100, Gerald Loacker wrote:
>> The sitronix-st7789v driver now considers the panel-timing property.
>
> I read the patch for that and still don't know 'why'. Commit messages
> should answer why.
>
>> Add the prop
rtcs = (1 << nvps) - 1;
>> +
>
> After a long hard stare at the code in question, I think doing it this
> way looks like the correct one, as as you mention in the commit message
> the first "if" will change the win->type to OVERLAY in one case, but this
> then wil
lete. Initialize the
variable with zero to cover all possible paths.
Fixes: 368419a2d429 ("drm/rockchip: vop2: initialize possible_crtcs properly")
Reported-by: kernel test robot
Reported-by: Nathan Chancellor
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2
Hi Nathan,
On 3/14/23 17:08, Nathan Chancellor wrote:
> Hi Michael,
>
> On Tue, Jan 24, 2023 at 06:47:01AM +0100, Michael Riesch wrote:
>> The variable possible_crtcs is only initialized for primary and
>> overlay planes. Since the VOP2 driver only supports these plane
&
On 1/24/23 06:47, Michael Riesch wrote:
> The Rockchip VOP2 features an internal RGB output block, which can be
> attached any video port of the VOP2. Add support for this output block.
s/attached any/attached to any/ of course. Can this be fixed when the
patch is applied?
Michael
> S
The Rockchip VOP2 features an internal RGB output block, which can be
attached any video port of the VOP2. Add support for this output block.
Signed-off-by: Michael Riesch
---
v3:
- fix commit messages (still assumed video port 2)
- fix condition to make 0 a valid video port
v2:
- move away
Let the function name vop2_create_crtcs reflect that the function creates
multiple CRTCS. Also, use a symmetric function pair to create and destroy
the CRTCs and the corresponding planes.
Signed-off-by: Michael Riesch
---
v3:
- no changes
v2:
- no changes
drivers/gpu/drm/rockchip
/f33a0488-528c-99de-3279-3c0346a03...@wolfvision.net/T/
Signed-off-by: Michael Riesch
---
v3:
- no changes
v2:
- no changes
.../boot/dts/rockchip/rk3568-pinctrl.dtsi | 94 +++
1 file changed, 94 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
b
The VOP2 driver has more than one video port, hence the hard-coded
port id will not work anymore. Add an extra parameter for the video
port id to the rockchip_rgb_init function.
Signed-off-by: Michael Riesch
---
v3:
- no changes
v2:
- no changes
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
e into the rockchip_encoder structure and set the
endpoint ID correctly.
Signed-off-by: Michael Riesch
---
v3:
- no changes
v2:
- use endpoint id from device tree instead of hardcoded value
drivers/gpu/drm/rockchip/rockchip_rgb.c | 10 +-
1 file changed, 5 insertions(+), 5 deletion
robot
Reported-by: Dan Carpenter
Signed-off-by: Michael Riesch
---
v3:
- no changes
v2:
- new patch
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
b/drivers/gpu/drm/rockchip
comments!
Best regards,
Michael
Michael Riesch (6):
drm/rockchip: vop2: initialize possible_crtcs properly
drm/rockchip: rgb: embed drm_encoder into rockchip_encoder
drm/rockchip: rgb: add video_port parameter to init function
drm/rockchip: vop2: use symmetric function pair
vop2_{create
Hi Sascha,
On 1/19/23 16:17, Sascha Hauer wrote:
> Hi Michael,
>
> On Thu, Jan 19, 2023 at 03:39:10PM +0100, Michael Riesch wrote:
>> The Rockchip VOP2 features an internal RGB output block, which can be
>> attached to the video port 2 of the VOP2. Add support for
e into the rockchip_encoder structure and set the
endpoint ID correctly.
Signed-off-by: Michael Riesch
---
v2:
- use endpoint id from device tree instead of hardcoded value
drivers/gpu/drm/rockchip/rockchip_rgb.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/d
The Rockchip VOP2 features an internal RGB output block, which can be
attached to the video port 2 of the VOP2. Add support for this output
block.
Signed-off-by: Michael Riesch
---
v2:
- move away from wrong assumption that the RGB block is always
connected to video port 2 -> ch
Let the function name vop2_create_crtcs reflect that the function creates
multiple CRTCS. Also, use a symmetric function pair to create and destroy
the CRTCs and the corresponding planes.
Signed-off-by: Michael Riesch
---
v2:
- no changes
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 31
robot
Reported-by: Dan Carpenter
Signed-off-by: Michael Riesch
---
v2:
- new patch
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
/f33a0488-528c-99de-3279-3c0346a03...@wolfvision.net/T/
Signed-off-by: Michael Riesch
---
v2:
- no changes
.../boot/dts/rockchip/rk3568-pinctrl.dtsi | 94 +++
1 file changed, 94 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
b/arch/arm64/boot/dts
The VOP2 driver has more than one video port, hence the hard-coded
port id will not work anymore. Add an extra parameter for the video
port id to the rockchip_rgb_init function.
Signed-off-by: Michael Riesch
---
v2:
- no changes
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +-
drivers/gpu
.
Patch 5 activates the support for the RGB output block in the VOP2 driver.
Patch 6 adds pinctrls for the 16-bit and 18-bit RGB data lines.
Tested on a custom board featuring the RK3568 SoC with a 18-bit RGB
display.
Looking forward to your comments!
Best regards,
Michael
Michael Riesch (6):
drm
Hi Sascha,
Thanks for your comments!
On 12/7/22 07:45, Sascha Hauer wrote:
> On Wed, Nov 30, 2022 at 03:02:13PM +0100, Michael Riesch wrote:
>> Commit 540b8f271e53 ("drm/rockchip: Embed drm_encoder into
>> rockchip_decoder") provides the means to pass the endpoint ID to
Hi Heiko,
On 11/30/22 15:02, Michael Riesch wrote:
> The rk3568-pinctrl.dtsi only defines the 24-bit RGB interface. Add separate
> nodes for the 16-bit and 18-bit version, respectively. While at it, split
> off the clock/sync signals from the data signals.
>
> The exact mapping o
Hi Dan,
On 1/3/23 09:07, Dan Carpenter wrote:
> Hi Michael,
>
> url:
> https://github.com/intel-lab-lkp/linux/commits/Michael-Riesch/drm-rockchip-vop2-add-support-for-the-rgb-output-block/20221130-220346
> base: b7b275e60bcd5f89771e865a8239325f86d9927d
> patch
dw_hdmi: discard modes with unachievable pixelclocks
For the complete series
Tested-by: Michael Riesch
Best regards,
Michael
>
> drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 40 -
> 1 file changed, 32 insertions(+), 8 deletions(-)
>
e into the rockchip_encoder structure and set the
endpoint ID correctly.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/rockchip/rockchip_rgb.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c
b/drivers/gpu/dr
/f33a0488-528c-99de-3279-3c0346a03...@wolfvision.net/T/
Signed-off-by: Michael Riesch
---
.../boot/dts/rockchip/rk3568-pinctrl.dtsi | 94 +++
1 file changed, 94 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
b/arch/arm64/boot/dts/rockchip/rk3568
The Rockchip VOP2 features an internal RGB output block, which can be
attached to the video port 2 of the VOP2. Add support for this output
block.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 21
1 file changed, 21 insertions(+)
diff
Let the function name vop2_create_crtcs reflect that the function creates
multiple CRTCS. Also, use a symmetric function pair to create and destroy
the CRTCs and the corresponding planes.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 31 ++--
1
The VOP2 driver has more than one video port, hence the hard-coded
port id will not work anymore. Add an extra parameter for the video
port id to the rockchip_rgb_init function.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +-
drivers/gpu/drm/rockchip
Michael Riesch (5):
drm/rockchip: rgb: embed drm_encoder into rockchip_encoder
drm/rockchip: rgb: add video_port parameter to init function
drm/rockchip: vop2: use symmetric function pair
vop2_{create,destroy}_crtcs
drm/rockchip: vop2: add support for the rgb output block
arm64: dts
ha Hauer (2):
> drm/rockchip: dw_hdmi: relax mode_valid hook
> drm/rockchip: dw_hdmi: Add support for 4k@30 resolution
>
> drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 34 -
> 1 file changed, 27 insertions(+), 7 deletions(-)
Thanks for the v2! On a RK3568 EVB1 with
Hi,
On 9/12/22 20:02, Chris Morgan wrote:
> From: Chris Morgan
Cc: Sascha -> any thoughts on this one?
Best regards,
Michael
> If I use more than one VP to output on an RK3566 based device I
> receive the following error (and then everything freezes):
>
> [0.838375] Unable to handle kerne
t doesn't work for me, so let's add
> 4k@30 as a first step.
>
> Sascha
>
> Sascha Hauer (2):
> drm/rockchip: dw_hdmi: relax mode_valid hook
> drm/rockchip: dw_hdmi: Add support for 4k@30 resolution
Great stuff, thanks!
On a Radxa ROCK3 Model A with a HP 2
hout this fix in my setup (Radxa
ROCK3 Model A + HP 27f 4k monitor). Hence I can only say that this patch
does not break anything in my setup :-)
Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver") ?
> Signed-off-by: Sascha Hauer
Tested-by: Michael Riesch
Thanks and
; window.
Oh yes that'd be awesome :-)
On a RK3568 EVB1 and a Radxa Rock 3 Model A connected to a HP 27f 4K
monitor, using
$ modetest -M rockchip -s 69:{1920x1080,3840x2160}-{30,60}
as well as using weston and glmark2-es2-wayland:
Tested-by: Michael Riesch
Thanks and best regards,
Michael
e upstreamed) panfrost driver support.
>
> Signed-off-by: Sascha Hauer
On a RK3568 EVB1 connected to a HP 27f 4K monitor, using
$ modetest -M rockchip -s 69:{1920x1080,3840x2160}-{30,60}
Tested-by: Michael Riesch
Thanks and best regards,
Michael
> ---
>
> Notes:
> Changes
From: Alex Bee
RK356x SoCs have a second thermal sensor for the GPU. This adds the
cooling map and trip points for it to make use of its contribution as
a cooling device.
Signed-off-by: Alex Bee
Signed-off-by: Michael Riesch
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 27
Enable the GPU core on the Rockchip RK3568 EVB1.
Signed-off-by: Michael Riesch
---
arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10
From: Ezequiel Garcia
Enable the GPU core on the Pine64 Quartz64 Model A.
Signed-off-by: Ezequiel Garcia
Signed-off-by: Alex Bee
Signed-off-by: Michael Riesch
---
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts
add gpu node to rk356x
arm64: dts: rockchip: enable the gpu on quartz64-a
Michael Riesch (1):
arm64: dts: rockchip: enable the gpu on rk3568-evb1-v10
.../bindings/gpu/arm,mali-bifrost.yaml| 15
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 5 ++
.../boot/dts/rockchip/rk3568-ev
when 800MHz clock frequency
Signed-off-by: Ezequiel Garcia
Signed-off-by: Alex Bee
Signed-off-by: Michael Riesch
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 49
1 file changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
b/arch/arm64/boot
From: Alex Bee
The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock.
Reflect this in the SoC specific part of the binding.
Signed-off-by: Alex Bee
[move the changes to the SoC section]
Signed-off-by: Michael Riesch
---
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15
Hi Rob,
On 2/9/22 16:35, Rob Herring wrote:
> On Wed, 09 Feb 2022 09:51:06 +0100, Michael Riesch wrote:
>> From: Alex Bee
>>
>> The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock.
>> Reflect this in the SoC specific part of the binding.
>>
>>
From: Ezequiel Garcia
Enable the GPU core on the Pine64 Quartz64 Model A.
Signed-off-by: Ezequiel Garcia
Signed-off-by: Alex Bee
Signed-off-by: Michael Riesch
---
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts
Enable the GPU core on the Rockchip RK3568 EVB1.
Signed-off-by: Michael Riesch
---
arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10
when 800MHz clock frequency
Signed-off-by: Ezequiel Garcia
Signed-off-by: Alex Bee
Signed-off-by: Michael Riesch
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 49
1 file changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
b/arch/arm64/boot
From: Alex Bee
The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock.
Reflect this in the SoC specific part of the binding.
Signed-off-by: Alex Bee
[move the changes to the SoC section]
Signed-off-by: Michael Riesch
---
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15
From: Alex Bee
RK356x SoCs have a second thermal sensor for the GPU. This adds the
cooling map and trip points for it to make use of its contribution as
a cooling device.
Signed-off-by: Alex Bee
Signed-off-by: Michael Riesch
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 27
enable the gpu on quartz64-a
Michael Riesch (1):
arm64: dts: rockchip: enable the gpu on rk3568-evb1-v10
.../bindings/gpu/arm,mali-bifrost.yaml| 15
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 5 ++
.../boot/dts/rockchip/rk3568-evb1-v10.dts | 11 +++
arch/arm64/bo
hope this is due to my low quality cable.
The cable might be the issue indeed, at least in my tests 4k@60Hz worked
just fine. On a RK3568 EVB1, using
$ modetest -M rockchip -s 69:{1920x1080,3840x2160}-{30,60}
and a HP 27f 4K monitor:
Tested-by: Michael Riesch
Thanks for your work and best regar
Hello Kever,
On 11/18/21 11:50 AM, Kever Yang wrote:
On 2021/11/18 下午5:53, Daniel Stone wrote:
Hi,
On Thu, 18 Nov 2021 at 09:26, Heiko Stübner wrote:
Am Donnerstag, 18. November 2021, 02:27:10 CET schrieb Kever Yang:
I don't agree with this, we do believe you have do some clean up to
meet
Enable the RK356x Video Output Processor (VOP) 2 on the Pine64
Quartz64 Model A.
Signed-off-by: Michael Riesch
---
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 24 +++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
b/arch
Hi Sascha,
On 11/17/21 3:33 PM, Sascha Hauer wrote:
This enabled the VOP2 display controller along with hdmi and the
required port routes which is enough to get a picture out of the
hdmi port of the board.
Signed-off-by: Sascha Hauer
---
.../boot/dts/rockchip/rk3568-evb1-v10.dts | 24 +++
Hello Heiko,
On 7/13/21 10:49 AM, Heiko Stübner wrote:
> Hi Michael,
>
> Am Dienstag, 13. Juli 2021, 10:44:00 CEST schrieb Michael Riesch:
>> The HDMI TX block in the RK3568 requires two power supplies, which have
>> to be enabled in some cases (at least on the RK3
Hello Benjamin,
The HDMI TX block in the RK3568 requires two power supplies, which have
to be enabled in some cases (at least on the RK3568 EVB1 the voltages
VDDA0V9_IMAGE and VCCA1V8_IMAGE are disabled by default). It would be
great if this was considered by the driver and the device tree binding
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