[PATCH v6 2/5] arm64: dts: rockchip: add gpu node to rk356x

[Michael Riesch]

From: Ezequiel Garcia <ezequ...@collabora.com>

Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
which is based on the Bifrost architecture. It has
one shader core and two execution engines.

Quoting the datasheet:

Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency

Signed-off-by: Ezequiel Garcia <ezequ...@collabora.com>
Signed-off-by: Alex Bee <knaerz...@gmail.com>
Signed-off-by: Michael Riesch <michael.rie...@wolfvision.net>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 49 ++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi 
b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index ff1689283996..50bbea862a6a 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -144,6 +144,40 @@ scmi_clk: protocol@14 {
                };
        };
 
+       gpu_opp_table: opp-table-1 {
+               compatible = "operating-points-v2";
+
+               opp-200000000 {
+                       opp-hz = /bits/ 64 <200000000>;
+                       opp-microvolt = <825000>;
+               };
+
+               opp-300000000 {
+                       opp-hz = /bits/ 64 <300000000>;
+                       opp-microvolt = <825000>;
+               };
+
+               opp-400000000 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <825000>;
+               };
+
+               opp-600000000 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <825000>;
+               };
+
+               opp-700000000 {
+                       opp-hz = /bits/ 64 <700000000>;
+                       opp-microvolt = <900000>;
+               };
+
+               opp-800000000 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-microvolt = <1000000>;
+               };
+       };
+
        pmu {
                compatible = "arm,cortex-a55-pmu";
                interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
@@ -444,6 +478,21 @@ power-domain@RK3568_PD_RKVENC {
                };
        };
 
+       gpu: gpu@fde60000 {
+               compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+               reg = <0x0 0xfde60000 0x0 0x4000>;
+               interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "job", "mmu", "gpu";
+               clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+               clock-names = "gpu", "bus";
+               #cooling-cells = <2>;
+               operating-points-v2 = <&gpu_opp_table>;
+               power-domains = <&power RK3568_PD_GPU>;
+               status = "disabled";
+       };
+
        sdmmc2: mmc@fe000000 {
                compatible = "rockchip,rk3568-dw-mshc", 
"rockchip,rk3288-dw-mshc";
                reg = <0x0 0xfe000000 0x0 0x4000>;
-- 
2.30.2