On Tue, Sep 23, 2025 at 11:36:35AM +0300, Marius Vlad wrote:
> This patch introduces a new boolean variable used to track connector's
> connect/disconnect status and it is being used on both polling and
> the HPD (Hot Plug Detect) paths.
Please see Documentation/process/submitting-patches.rst, it
On Tue, Sep 23, 2025 at 03:17:20PM +0800, Chaoyi Chen wrote:
> On 9/23/2025 12:51 PM, Dmitry Baryshkov wrote:
>
> > On Tue, Sep 23, 2025 at 11:40:33AM +0800, Chaoyi Chen wrote:
> > > On 9/23/2025 11:17 AM, Dmitry Baryshkov wrote:
> > >
> > > > On Tue
On Tue, Sep 23, 2025 at 05:07:25PM +0800, Chaoyi Chen wrote:
> On 9/23/2025 11:11 AM, Dmitry Baryshkov wrote:
>
> > On Tue, Sep 23, 2025 at 09:34:39AM +0800, Chaoyi Chen wrote:
> > > On 9/23/2025 9:10 AM, Dmitry Baryshkov wrote:
> > >
> > > > On Mon, Sep
On Tue, Sep 23, 2025 at 11:38:17AM +0200, Maxime Ripard wrote:
> On Mon, Sep 15, 2025 at 09:38:44PM +0300, Dmitry Baryshkov wrote:
> > On Mon, Sep 15, 2025 at 10:42:22AM +0200, Maxime Ripard wrote:
> > > Hi Tohmas,
> > >
> > > On Tue, Sep 02, 2025 at 03:44
ions(+), 2 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Tue, Sep 23, 2025 at 11:40:33AM +0800, Chaoyi Chen wrote:
> On 9/23/2025 11:17 AM, Dmitry Baryshkov wrote:
>
> > On Tue, Sep 23, 2025 at 09:53:06AM +0800, Chaoyi Chen wrote:
> > > Hi Dmitry,
> > >
> > > On 9/23/2025 9:12 AM, Dmitry Baryshkov wrote:
>
On Mon, Sep 22, 2025 at 08:13:00AM -0700, Rob Clark wrote:
> On Fri, Sep 19, 2025 at 11:35 AM Dmitry Baryshkov
> wrote:
> >
> > On Fri, Sep 19, 2025 at 10:24:31PM +0800, Xiangxu Yin wrote:
> > > QCS615 platform requires non-default logical-to-physical lane mapping due
&
On Tue, Sep 23, 2025 at 10:09:38AM +0800, Chaoyi Chen wrote:
> On 9/23/2025 9:50 AM, Dmitry Baryshkov wrote:
>
> > On Mon, Sep 22, 2025 at 09:20:37AM +0800, Chaoyi Chen wrote:
> > > From: Chaoyi Chen
> > >
> > > The RK3399 has two USB/DP combo PHY and one
On Tue, Sep 23, 2025 at 09:53:06AM +0800, Chaoyi Chen wrote:
> Hi Dmitry,
>
> On 9/23/2025 9:12 AM, Dmitry Baryshkov wrote:
> > On Mon, Sep 22, 2025 at 09:20:34AM +0800, Chaoyi Chen wrote:
> > > From: Chaoyi Chen
> > >
> > > The RK3399 SoC integ
On Tue, Sep 23, 2025 at 09:34:39AM +0800, Chaoyi Chen wrote:
> On 9/23/2025 9:10 AM, Dmitry Baryshkov wrote:
>
> > On Mon, Sep 22, 2025 at 09:20:33AM +0800, Chaoyi Chen wrote:
> > > From: Chaoyi Chen
> > >
> > > Add default DRM AUX HPD bridge device when r
On Tue, Sep 23, 2025 at 09:30:05AM +0800, Icenowy Zheng wrote:
> 在 2025-09-23星期二的 09:11 +0800，Icenowy Zheng写道：
> > 在 2025-09-23星期二的 04:00 +0300，Dmitry Baryshkov写道：
> > > On Sun, Sep 21, 2025 at 04:34:43PM +0800, Icenowy Zheng wrote:
> > > > T-Head TH1520 SoC conta
On Mon, Sep 22, 2025 at 09:20:34AM +0800, Chaoyi Chen wrote:
> From: Chaoyi Chen
>
> The RK3399 SoC integrates two USB/DP combo PHYs, each of which
> supports software-configurable pin mapping and DisplayPort lane
> assignment. These capabilities enable the PHY itself to handle both
> mode switch
On Sun, Sep 21, 2025 at 04:34:43PM +0800, Icenowy Zheng wrote:
> T-Head TH1520 SoC contains a Synopsys DesignWare HDMI controller (paired
> with DesignWare HDMI TX PHY Gen2) that takes the "DP" output from the
> display controller.
>
> Add a driver for this controller utilizing the common DesignWa
On Sun, Sep 21, 2025 at 04:34:41PM +0800, Icenowy Zheng wrote:
> This is a from-scratch driver targeting Verisilicon DC-series display
> controllers, which feature self-identification functionality like their
> GC-series GPUs.
>
> Only DC8200 is being supported now, and only the main framebuffer i
On Mon, Sep 22, 2025 at 04:32:39PM -0700, Jessica Zhang wrote:
> Since 3D merge allows for higher mode clocks to be supported across
> multiple layer mixers, filter modes based on adjusted mode clocks
> only if 3D merge isn't supported.
>
> Reported-by: Abel Vesa
> Fixes: 62b7d6835288 ("drm/msm/d
On Mon, Sep 22, 2025 at 09:20:36AM +0800, Chaoyi Chen wrote:
> From: Chaoyi Chen
>
> This patch add support for get PHY lane info without help of extcon.
>
> There is no extcon needed if the Type-C controller is present. In this
> case, the lane info can be get from PHY instead of extcon.
>
> T
On Mon, Sep 22, 2025 at 02:58:17PM +0800, Xiangxu Yin wrote:
>
> On 9/20/2025 2:41 AM, Dmitry Baryshkov wrote:
> > On Fri, Sep 19, 2025 at 10:24:29PM +0800, Xiangxu Yin wrote:
> >> Add QCS615-specific configuration for USB/DP PHY, including DP init
> >> routi
On Tue, Sep 16, 2025 at 11:48:39AM +0100, Daniel Stone wrote:
> Typing with one hand (and not the useful one): not good.
>
> On Tue, 16 Sept 2025 at 11:46, Daniel Stone wrote:
> > Again though, it's not something new. I promise you that Weston (for
> > over a year), Mutter (for about a year), KWi
On Mon, Sep 08, 2025 at 11:09:07PM +0200, Christophe JAILLET wrote:
> Le 19/08/2025 à 22:32, Dmitry Baryshkov a écrit :
> > Use drmm_plain_encoder_alloc() to allocate simple encoder and
> > drmm_writeback_connector_init() in order to initialize writeback
> > connector instan
Now as all bridges are updated to list supported HDMI InfoFrames, drop
the default value from drm_bridge_connector_init(). All HDMI bridges now
have to declare all supported InfoFrames.
Reviewed-by: Liu Ying
Acked-by: Daniel Stone
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display
ms consume this driver and tidss (their display
> controller) has this flag set. So this legacy support can be dropped.
>
> Fixes: c932ced6b585 ("drm/tidss: Update encoder/bridge chain connect model")
I'm not sure, why do you have this Fixes tag. Other than that:
Reviewed-b
On Tue, Sep 02, 2025 at 10:32:38AM +0200, Maxime Ripard wrote:
> In order to enable drivers to fill their initial state from the hardware
> state, we need to provide an alternative atomic_reset helper.
>
> This helper relies on each state having its own atomic_state_readout()
> hooks. Each compone
On Tue, Sep 16, 2025 at 07:25:28PM +0800, Xiangxu Yin wrote:
>
> On 9/16/2025 6:22 PM, Dmitry Baryshkov wrote:
> > On Tue, Sep 16, 2025 at 03:31:35PM +0800, Xiangxu Yin wrote:
> >> Add DisplayPort controller binding for Qualcomm SM6150 SoC.
> >> 'qcom,sm6150
On Mon, Sep 15, 2025 at 06:02:19PM +0800, Xiangxu Yin wrote:
>
> On 9/12/2025 8:08 PM, Dmitry Baryshkov wrote:
> > On Fri, Sep 12, 2025 at 08:00:14PM +0800, Xiangxu Yin wrote:
> >> On 9/12/2025 6:19 PM, Dmitry Baryshkov wrote:
> >>> On Thu, Sep 11, 2025 at 10
Declare which infoframes are supported via the .hdmi_write_infoframe()
interface. Return -EOPNOTSUPP if the driver is asked to write or clear
the unsupported InfoFrame.
Acked-by: Daniel Stone
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/lontium-lt9611.c | 11 +++
1 file
On Mon, Sep 08, 2025 at 10:42:10AM +0530, Ekansh Gupta wrote:
>
>
> On 9/2/2025 9:42 AM, Dmitry Baryshkov wrote:
> > On Mon, Sep 01, 2025 at 11:03:35AM +0530, Ekansh Gupta wrote:
> >> Current fastrpc message context uses a 12-bit mask where the upper
> &g
On Tue, Sep 16, 2025 at 12:35:50PM +0100, Daniel Stone wrote:
> Hi,
>
> On Tue, 16 Sept 2025 at 12:15, Dmitry Baryshkov
> wrote:
> > On Tue, 16 Sept 2025 at 14:11, Daniel Stone wrote:
> > > I'm slightly confused as to what you're saying here. Are you saying
On Fri, Sep 12, 2025 at 07:39:16PM +0800, Xiangxu Yin wrote:
> Add DisplayPort controller for Qualcomm SM6150 SoC.
> SM6150 shares the same configuration as SM8350, its hardware capabilities
> differ about HBR3. Explicitly listing it ensures clarity and avoids
> potential issues if SM8350 support e
On Fri, Sep 19, 2025 at 10:24:24PM +0800, Xiangxu Yin wrote:
> Move USB-only register setup from com_init to qmp_usbc_usb_power_on,
> so it runs only for USB mode.
Please rewrite the commit message to start from the problem description.
With that fixed:
Reviewed-by: Dmitry Bar
qualcomm/phy-qcom-qmp-qserdes-com-v2.h | 106
> +
> .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v2.h| 68 +
> drivers/phy/qualcomm/phy-qcom-qmp.h| 3 +
> 4 files changed, 198 insertions(+)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Fri, Sep 19, 2025 at 03:41:56AM +0300, Dmitry Baryshkov wrote:
> On Thu, Sep 18, 2025 at 09:28:52PM +0800, Jun Nie wrote:
> > 2 or more SSPPs and dual-DSI interface are need for super wide panel.
> > And 4 DSC are preferred for power optimal in this case due to width
> > l
On Fri, Sep 19, 2025 at 10:24:29PM +0800, Xiangxu Yin wrote:
> Add QCS615-specific configuration for USB/DP PHY, including DP init
> routines, voltage swing tables, and platform data. Add compatible
> "qcs615-qmp-usb3-dp-phy".
>
> Signed-off-by: Xiangxu Yin
> ---
> drivers/phy/qualcomm/phy-qcom-
gt; 1 file changed, 193 insertions(+), 1 deletion(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
}
> + used[tmp[i]] = true;
> + map[i] = tmp[i];
> + }
> +
> + /* Fill the remaining entries with unused physical lanes (ascending) */
> + for (i = cnt; i < DP_MAX_NUM_DP_LANES && j < DP_MAX_NUM_DP_LANES; j++) {
Nit: i = cnt,
-qcom-qmp-usbc.c | 25 +++--
> 1 file changed, 19 insertions(+), 6 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
e SSPP width constraints and MDP clock rate.
>
> Request 4 mixers and 4 DSCs for high-resolution cases where both DSC
> and dual interfaces are enabled. More use cases can be incorporated
> later if quad-pipe capabilities are required.
>
> Signed-off-by: Jun Nie
> Reviewed-by
On Fri, Sep 19, 2025 at 10:24:23PM +0800, Xiangxu Yin wrote:
> Add USB/DP switchable PHY clock registration and DT parsing for DP offsets.
> Extend qmp_usbc_register_clocks and clock provider logic to support both
> USB and DP instances.
Why?
>
> Signed-off-by: Xiangxu Yin
> ---
> drivers/phy/
On Fri, Sep 19, 2025 at 10:24:22PM +0800, Xiangxu Yin wrote:
> Move resets to qmp_phy_cfg for per-PHY customization. Keep legacy DT
> path on the old hardcoded list; non-legacy path uses cfg->reset_list.
Why? Start your commit messages with the description of the issue that
you are trying to solve
gisters/gen_header.py | 7 +++
> 1 file changed, 7 insertions(+)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Wed, Sep 10, 2025 at 09:30:19AM +0200, Maxime Ripard wrote:
> On Wed, Sep 03, 2025 at 03:03:43AM +0300, Dmitry Baryshkov wrote:
> > On Tue, Sep 02, 2025 at 08:06:54PM +0200, Maxime Ripard wrote:
> > > On Tue, Sep 02, 2025 at 06:45:44AM +0300, Dmitry Baryshkov wrote:
> >
On Thu, Sep 18, 2025 at 09:28:52PM +0800, Jun Nie wrote:
> 2 or more SSPPs and dual-DSI interface are need for super wide panel.
> And 4 DSC are preferred for power optimal in this case due to width
> limitation of SSPP and MDP clock rate constrain. This patch set
> extends number of pipes to 4 and
uce the dpu_encoder_phys_* for
> writeback")
> Signed-off-by: Qianfeng Rong
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Thu, Sep 11, 2025 at 05:32:40PM +0800, Yongbang Shi wrote:
>
> > On Thu, Aug 14, 2025 at 08:19:41PM +0800, Yongbang Shi wrote:
> > > > On Wed, Aug 13, 2025 at 05:42:29PM +0800, Yongbang Shi wrote:
> > > > > From: Baihan Li
> > > > >
> > > > > The debouncing when HPD pulled out still remains s
On Thu, Sep 18, 2025 at 07:46:32AM -0700, Rob Clark wrote:
> On Wed, Sep 17, 2025 at 8:51 PM Dmitry Baryshkov
> wrote:
> >
> > In preparation to disabling GPU functionality split VM_BIND-related
> > functions (which are used only for the GPU) from the rest of the GE
gt; drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 +-
> drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 18 +++---
> 3 files changed, 17 insertions(+), 21 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Thu, Sep 11, 2025 at 04:07:34PM +0300, Marius Vlad wrote:
> From: Andri Yngvason
>
> Adds a new general DRM property named "color format" which can be used by
> userspace to force the display driver output a particular color format.
>
> Possible options are:
> - auto (setup by default, dr
uot;drm: bridge: Add waveshare DSI2DPI unit driver")
> Signed-off-by: Liu Ying
> ---
> drivers/gpu/drm/bridge/waveshare-dsi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
The IOCTL interface is only used for interfacing the GPU parts of the
driver. In preparation to disabling GPU functionality split MSM IOCTLs
to a separate source file.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Makefile| 1 +
drivers/gpu/drm/msm/msm_drv.c | 489
In preparation to disabling GPU functionality split VM_BIND-related
functions (which are used only for the GPU) from the rest of the GEM VMA
implementation.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Makefile |1 +
drivers/gpu/drm/msm/msm_gem_vm_bind.c | 1116
In preparation for making the GPU supporting code optional split the
debugfs code into three main pieces: GEM (always enabled), KMS (only
enabled if KMS driver parts are enabled) and GPU (currently always
enabled, will become optional later).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm
IOMMU setup.
Rework the driver:
- Make it possible to disable KMS parts (if MDP4, MDP5 and DPU drivers
are disabled).
- Register GPU-only devices without an interim platform device.
- Add module param that makes msm driver register GPU and KMS devices
separately.
Signed-off-by: Dmitry Baryshkov
Some of the platforms don't have onboard GPU or don't provide support
for the GPU in the drm/msm driver. Make it possible to disable the GPU
part of the driver and build the KMS-only part.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Kconfig | 27 +--
drive
to use current name for the module param.
Fixes: 217ed15bd399 ("drm/msm: enable separate binding of GPU and display
devices")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_dr
On Mon, Sep 15, 2025 at 07:29:08PM +0800, Xiangxu Yin wrote:
>
> On 9/12/2025 6:12 PM, Dmitry Baryshkov wrote:
> > On Thu, Sep 11, 2025 at 10:55:04PM +0800, Xiangxu Yin wrote:
> >> Introduce DisplayPort PHY configuration routines for QCS615, including
> >> aux channe
Declare which infoframes are supported via the .hdmi_write_infoframe()
interface. Return -EOPNOTSUPP if the driver is asked to write or clear
the unsupported InfoFrame.
Reviewed-by: Daniel Stone
Acked-by: Daniel Stone
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi
Sending Audio InfoFrames is mandatory for getting audio to work over the
HDMI link. Warn if the driver requests HDMI audio support for the HDMI
connector, but there is no support for Audio InfoFrames.
Suggested-by: Maxime Ripard
Acked-by: Daniel Stone
Signed-off-by: Dmitry Baryshkov
gt; 1. New patch
> ---
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
> drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 53 +++
> 2 files changed, 54 insertions(+)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Thu, Sep 11, 2025 at 02:49:59PM +0200, Miguel Gazquez wrote:
>
>
> Le 11/09/2025 à 11:50, Maxime Ripard a écrit :
> > On Thu, Sep 11, 2025 at 10:51:06AM +0200, Miguel Gazquez wrote:
> > >
> > >
> > > Le 10/09/2025 à 04:28, Dmitry Baryshkov a écr
On Thu, Sep 11, 2025 at 10:55:06PM +0800, Xiangxu Yin wrote:
> Parse TCSR registers to support DP mode signaling via dp_phy_mode_reg.
> Move USB PHY-only register configuration from com_init to
> qmp_usbc_usb_power_on.
Two sets of changes. Two commits.
>
> Signed-off-by: Xiangxu Yin
> ---
> dr
subset of infoframes,
creating a more consistent interface. Make the affected drivers return
-EOPNOTSUPP if they are asked to program (or clear) InfoFrames which are
not supported.
Acked-by: Liu Ying
Acked-by: Daniel Stone
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display
On Tue, Sep 09, 2025 at 01:21:19PM +0200, Konrad Dybcio wrote:
> On 9/9/25 1:16 PM, Dmitry Baryshkov wrote:
> > On Tue, Sep 09, 2025 at 09:14:49AM +0200, Neil Armstrong wrote:
> >> On 08/09/2025 23:14, Dmitry Baryshkov wrote:
> >>> On Mon, Sep 08, 2025 at 03:04:20
rg
> ---
> drivers/gpu/drm/panel/Kconfig | 6 +++---
> drivers/gpu/drm/panel/panel-samsung-sofef00.c | 2 +-
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Wed, Sep 17, 2025 at 08:37:10AM +, hermes...@ite.com.tw wrote:
>
> >-Original Message-
> >From: Dmitry Baryshkov
> >Sent: Tuesday, September 16, 2025 6:49 PM
> >To: Hermes Wu (吳佳宏)
> >Cc: Andrzej Hajda ; Neil Armstrong
> >; Robert Foss
ptors.xml | 40 -
> .../drm/msm/registers/adreno/a6xx_enums.xml | 50 +-
> .../drm/msm/registers/adreno/adreno_pm4.xml | 179 ++---
> 6 files changed, 508 insertions(+), 475 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Sun, Aug 03, 2025 at 02:53:50PM +0300, Dmitry Baryshkov wrote:
> Use DRM HDMI audio helpers in order to implement HDMI audio support for
> Lontium LT9611UXC bridge.
It's been waiting a while, it got posted as a part of another series,
but I think I'd like to apply this by the
On Thu, 21 Aug 2025 14:25:06 +0300, Dmitry Baryshkov wrote:
> Default config for UML (x86_64) doesn't include any driver which
> supports DRM_CLIENT_SELECTION, which makes drm_client_modeset disabled
> (and correspondingly tests for that module are not executed too).
>
>
On Tue, 16 Sept 2025 at 14:11, Daniel Stone wrote:
>
> On Tue, 16 Sept 2025 at 11:57, Dmitry Baryshkov
> wrote:
> > On Tue, Sep 16, 2025 at 11:48:39AM +0100, Daniel Stone wrote:
> > > So yeah, I see it as the same as the input situation: you _can_ do the
> > >
On Tue, Sep 16, 2025 at 08:11:03PM +0800, Xiangxu Yin wrote:
> Add DisplayPort controller binding for Qualcomm SM6150 SoC.
> SM6150 uses the same controller IP as SM8150.
> Declare 'qcom,sm6150-dp' as a fallback compatible to
> 'qcom,sm8150-dp' and 'qcom,sm8350-dp' for consistency with existing
> b
On Tue, Sep 16, 2025 at 07:34:52PM +0800, Xiangxu Yin wrote:
>
> On 9/16/2025 7:25 PM, Xiangxu Yin wrote:
> > On 9/16/2025 6:22 PM, Dmitry Baryshkov wrote:
> >> On Tue, Sep 16, 2025 at 03:31:35PM +0800, Xiangxu Yin wrote:
> >>> Add DisplayPort controlle
d all register area,
> and is not necessary.
Nit: please fix your editor to wrap commit messages on a more typical
boundary (72-75-77 chars).
Otherwise:
Reviewed-by: Dmitry Baryshkov
>
> Signed-off-by: Hermes Wu
> ---
> drivers/gpu/drm/bridge/ite-it6505.c | 40
> ++
| 13 +
> drivers/gpu/drm/panel/Makefile | 1 +
> drivers/gpu/drm/panel/panel-lg-sw49410.c | 502
> +++
> 3 files changed, 516 insertions(+)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Tue, Sep 16, 2025 at 12:47:43PM +0800, Hermes Wu via B4 Relay wrote:
> From: Hermes Wu
>
> IT6505 supports HW link training which will write DPCD and check
> training status automatically.
>
> In the case that driver set link rate at 2.7G and HW fail to training,
> it will change link configu
On Tue, Sep 16, 2025 at 12:47:45PM +0800, Hermes Wu via B4 Relay wrote:
> From: Hermes Wu
>
> When connect to device which can only training done by
> step training,
> skip auto training when link training restart,
> usually happen when display resolution is changed.
Please expand your commit m
m interrupt and no longer used.
>
> Signed-off-by: Hermes Wu
> ---
> drivers/gpu/drm/bridge/ite-it6505.c | 26 +++---
> 1 file changed, 15 insertions(+), 11 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
TRL1 must be set
> at the same time to reset HW state.
>
> Signed-off-by: Hermes Wu
> ---
> drivers/gpu/drm/bridge/ite-it6505.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Tue, Sep 16, 2025 at 03:31:35PM +0800, Xiangxu Yin wrote:
> Add DisplayPort controller binding for Qualcomm SM6150 SoC.
> 'qcom,sm6150-dp' uses the same controller IP as 'qcom,sm8150-dp'.
> Declare 'qcom,sm6150-dp' as a fallback compatible to 'qcom-sm8350-dp'
> for consistency with existing bind
uring parsing of DT data. There is no need to store it
inside the struct.
With that fixed:
Reviewed-by: Dmitry Baryshkov
>
> mutex_init(&link->psm_mutex);
> msm_dp_link = &link->msm_dp_link;
>
> + ret = msm_dp_link_parse_dt(msm_dp_link);
> +
On Mon, Sep 15, 2025 at 12:33:08PM +0200, Daniel Stone wrote:
> Hi Dmitry,
>
> On Mon, 15 Sept 2025 at 02:57, Dmitry Baryshkov
> wrote:
> > On Thu, Sep 11, 2025 at 08:15:48PM +0300, Marius Vlad wrote:
> > > On Thu, Sep 11, 2025 at 04:50:59PM +0300, Dmitry Baryshkov
On Sat, 05 Jul 2025 13:05:13 +0300, Dmitry Baryshkov wrote:
> Switch VC4 driver to using CEC helpers code, simplifying hotplug and
> registration / cleanup. The existing vc4_hdmi_cec_release() is kept for
> now.
>
>
Applied to drm-misc-next, thanks!
[1/1] drm/vc4: hdmi: switch
On Mon, Sep 15, 2025 at 11:51:23AM -0400, Frank Li wrote:
> Add innolux,n133hse-ea1 13.3" TFT LCD panel and nlt,nl12880bc20-spwg-24
> 12.1" WXGA (1280 x 800) LVDS TFT LCD panel.
>
> Fix below CHECK_DTBS warnings:
> arch/arm/boot/dts/nxp/imx/imx6q-novena.dtb: /panel: failed to match any
> schema w
On Mon, Sep 15, 2025 at 02:06:58PM +0300, Dmitry Baryshkov wrote:
> On Mon, Sep 15, 2025 at 04:00:41PM +0530, Harikrishna Shenoy wrote:
> > From: Swapnil Jakhade
> >
> > Enable support for Display Stream Compression (DSC) in independent
> > mode with a single strea
On Tue, Sep 02, 2025 at 03:18:17PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 02.09.25 um 10:32 schrieb Maxime Ripard:
> > Bridges implement their state using a drm_private_obj and an
> > hand-crafted reset implementation.
> >
> > Since drm_private_obj doesn't have a set of reset helper like the
On Wed, 09 Jul 2025 10:54:38 +0200, Loic Poulain wrote:
> If the interrupt occurs before resource initialization is complete, the
> interrupt handler/worker may access uninitialized data such as the I2C
> tcpc_client device, potentially leading to NULL pointer dereference.
>
>
Applied to drm-mis
On Mon, Sep 15, 2025 at 10:42:22AM +0200, Maxime Ripard wrote:
> Hi Tohmas,
>
> On Tue, Sep 02, 2025 at 03:44:54PM +0200, Thomas Zimmermann wrote:
> > > +/**
> > > + * drm_atomic_build_readout_state - Creates an initial state from the
> > > hardware
> > > + * @dev: DRM device to build the state f
On Mon, Sep 15, 2025 at 05:06:51PM +0200, David Heidelberg wrote:
>
> On 15/09/2025 13:11, Dmitry Baryshkov wrote:
> > On Mon, Sep 15, 2025 at 12:11:49PM +0200, David Heidelberg wrote:
> > > On 15/09/2025 03:29, Dmitry Baryshkov wrote:
> > > > On Sat, Sep 13
On Mon, Sep 15, 2025 at 10:24:20AM -0400, Frank Li wrote:
> On Mon, Sep 15, 2025 at 04:00:22AM +0300, Dmitry Baryshkov wrote:
> > On Fri, Sep 12, 2025 at 02:51:59PM -0400, Frank Li wrote:
> > > Add innolux,n133hse-ea1 13.3" TFT LCD panel and nlt,nl12880bc20-spwg-24
>
On Mon, Sep 15, 2025 at 01:28:46PM +0200, Maxime Ripard wrote:
> On Tue, Sep 02, 2025 at 10:22:12PM +0200, Laurent Pinchart wrote:
> > > > + struct drm_bridge *bridge = drm_priv_to_bridge(s->obj);
> > > > +
> > > > + drm_printf(p, "bridge: %s",
> > > > drm_get_connector_type_name(bridg
gt; drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 8 ++--
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Mon, Sep 15, 2025 at 04:00:41PM +0530, Harikrishna Shenoy wrote:
> From: Swapnil Jakhade
>
> Enable support for Display Stream Compression (DSC) in independent
> mode with a single stream, along with Forward Error Correction (FEC)
> in the Cadence MHDP8546 DisplayPort controller driver.
>
> F
On Mon, Sep 15, 2025 at 12:11:49PM +0200, David Heidelberg wrote:
> On 15/09/2025 03:29, Dmitry Baryshkov wrote:
> > On Sat, Sep 13, 2025 at 09:19:48PM +0200, David Heidelberg via B4 Relay
> > wrote:
> > > From: Molly Sophia
> > >
> > > Novatek NT3559
On Mon, Sep 15, 2025 at 02:26:12PM +0800, Xiangxu Yin wrote:
>
> On 9/12/2025 8:10 PM, Dmitry Baryshkov wrote:
> > On Fri, Sep 12, 2025 at 07:54:31PM +0800, Xiangxu Yin wrote:
> >> On 9/12/2025 7:46 PM, Dmitry Baryshkov wrote:
> >>> On Fri, Sep 12, 2025 at 07
> ---
> .../drm/bridge/analogix/analogix_dp_core.c| 49 ---
> 1 file changed, 9 insertions(+), 40 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
-by: Marek Szyprowski
> ---
> .../drm/bridge/analogix/analogix_dp_core.c| 49 ++-
> 1 file changed, 4 insertions(+), 45 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
gix_dp_core.c| 20 +++
> 1 file changed, 3 insertions(+), 17 deletions(-)
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
changed, 6 insertions(+), 7 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Sat, Sep 13, 2025 at 09:19:48PM +0200, David Heidelberg via B4 Relay wrote:
> From: Molly Sophia
>
> Novatek NT35596s is a generic DSI IC that drives command and video mode
> panels.
> Currently add support for the LCD panel from JDI connected with this IC,
> as found on Xiaomi Mi Mix 2S phone
off-by: David Heidelberg
> ---
> drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 27
> ++
> 1 file changed, 15 insertions(+), 12 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Thu, Sep 11, 2025 at 08:25:27PM +0530, Nilesh Laad wrote:
> From: Yi Zhang
>
> LT9211c is a Single/Dual-Link DSI/LVDS or Single DPI input to
> Single-link/Dual-Link DSI/LVDS or Single DPI output bridge chip.
> Add support for DSI to LVDS bridge configuration.
>
> Signed-off-by: Yi Zhang
> Si
On Fri, Sep 12, 2025 at 02:51:59PM -0400, Frank Li wrote:
> Add innolux,n133hse-ea1 13.3" TFT LCD panel and nlt,nl12880bc20-spwg-24
> 12.1" WXGA (1280 x 800) LVDS TFT LCD panel.
>
And no driver bits?
> Signed-off-by: Frank Li
> ---
> .../devicetree/bindings/display/panel/panel-simple.yaml
On Fri, Sep 12, 2025 at 10:09:54PM +0300, Marius Vlad wrote:
> On Fri, Sep 12, 2025 at 05:33:42PM +0200, Maxime Ripard wrote:
> > On Thu, Sep 11, 2025 at 04:07:36PM +0300, Marius Vlad wrote:
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > inde
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