On Sun, May 11, 2025 at 6:42 PM Ryan Walklin wrote:
>
> The Allwinner H616 and variants have a new display engine revision
> (DE33).
>
> Add a display engine bus binding for the DE33.
>
> Signed-off-by: Ryan Walklin
> Acked-by: Conor Dooley
> Reviewed-by: Chen-Yu T
[06/11] dt-bindings: allwinner: add H616 DE33 clock binding
commit: ab1a94b504b6f19c294786b5920574fb374fb5cc
[08/11] clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support
commit: be0e9a3727872783bad0752dc82e0857f4776049
Best regards,
--
Chen-Yu Tsai
0i-h616-ccu: Add LVDS reset
commit: 20fb4ac9cda06527cf60c5ec7dda7c463c9c81be
[02/24] clk: sunxi-ng: h616: Add LVDS reset for LCD TCON
commit: 390e4cfe87cb99c80614235cbc4651c3b315a9c9
Best regards,
--
Chen-Yu Tsai
On Fri, May 9, 2025 at 11:14 PM Andre Przywara wrote:
>
> On Wed, 7 May 2025 15:19:21 -0500
> Chris Morgan wrote:
>
> Hi,
>
> despite the slightly ill fate of this series, I was wondering if we could
> get the non-controversial clock parts for instance already merged, to
> reduce the number of p
On Thu, Apr 3, 2025 at 7:09 PM AngeloGioacchino Del Regno
wrote:
>
> During probe, this driver is registering two platform devices: one
> for the HDMI Codec driver and one for the DisplayPort PHY driver.
>
> In the probe function, none of the error cases are unregistering
> any of the two platform
The anx7625 driver is open coding what devm_pm_runtime_enable() does.
Switch to the common helper instead.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix
omponent masters that succeeded binding all subdevices when any
> of the other masters errors out.
>
> Fixes: 1ef7ed48356c ("drm/mediatek: Modify mediatek-drm for mt8195 multi
> mmsys support")
> Signed-off-by: AngeloGioacchino Del Regno
>
Makes sense.
Reviewed-by:
On Wed, Apr 2, 2025 at 4:36 PM AngeloGioacchino Del Regno
wrote:
>
> The RDMA driver is installing an ISR in the probe function but, if
> the component is not bound yet, the interrupt handler may call the
> vblank_cb ahead of time (while probing other drivers) or too late
> (while removing other d
that by adding a call to put_device() for all of the mmsys
> devices in a loop, in error cases of mtk_drm_bind() and in the
> mtk_drm_unbind() callback.
>
> Fixes: 1ef7ed48356c ("drm/mediatek: Modify mediatek-drm for mt8195 multi
> mmsys support")
> Signed-off-by: Angel
in mtk_drm_bind()
> to fix the refcount_t overflow.
>
> Fixes: 1ef7ed48356c ("drm/mediatek: Modify mediatek-drm for mt8195 multi
> mmsys support")
> Signed-off-by: AngeloGioacchino Del Regno
>
Reviewed-by: Chen-Yu Tsai
> ---
> drivers/gpu/drm/mediatek/mtk_drm_drv
On Wed, Apr 2, 2025 at 4:36 PM AngeloGioacchino Del Regno
wrote:
>
> The OVL driver is installing an ISR in the probe function but, if
> the component is not bound yet, the interrupt handler may call the
> vblank_cb ahead of time (while probing other drivers) or too late
> (while removing other dr
On Tue, Feb 11, 2025 at 2:34 AM Maxime Ripard wrote:
>
> On Thu, Feb 06, 2025 at 07:14:23PM +0100, Luca Ceresoli wrote:
> > Adding a panel does currently not add a panel_bridge wrapping it. Usually
> > the panel_bridge creation happens when some other driver (e.g. the previous
> > bridge or the en
On Fri, Jan 24, 2025 at 12:14 AM Paul-pl Chen (陳柏霖)
wrote:
>
> On Thu, 2025-01-23 at 08:21 +0100, Krzysztof Kozlowski wrote:
> >
> > External email : Please do not click links or open attachments until
> > you have verified the sender or the content.
> >
> >
> > On 23/01/2025 07:11, Paul-pl Chen (
On Thu, Jan 23, 2025 at 2:11 PM Paul-pl Chen (陳柏霖)
wrote:
>
> On Sat, 2025-01-18 at 10:22 +0100, Krzysztof Kozlowski wrote:
> >
> > External email : Please do not click links or open attachments until
> > you have verified the sender or the content.
> >
> >
> > On 14/01/2025 06:49, Paul-pl Chen (陳
On Fri, Jan 10, 2025 at 8:54 PM paul-pl.chen wrote:
>
> From: "Nancy.Lin"
>
> EXDMA is a DMA engine for reading data from DRAM with
> various DRAM footprints and data formats. For input
> sources in certain color formats and color domains,
> EXDMA also includes a color transfer function to
> proc
On Fri, Jan 10, 2025 at 8:46 PM paul-pl.chen wrote:
>
> From: "Nancy.Lin"
>
> Add mutex support the main and external display for MT8196.
>
> Signed-off-by: Nancy.Lin
> Signed-off-by: Paul-pl.Chen
> ---
> drivers/soc/mediatek/mtk-mutex.c | 233 +++--
> include/linux/s
On Sun, Jan 19, 2025 at 5:24 AM Jassi Brar wrote:
>
> On Thu, Dec 19, 2024 at 11:08 AM Jason-JH.Lin
> wrote:
> >
> > 1. Add compatible name and iommus property to mediatek,gce-mailbox.yaml
> >for MT8196.
> >
> >- The compatible name "mediatek,mt8196-gce-mailbox" is added to
> > ensu
On Thu, Dec 12, 2024 at 1:51 PM Xin Ji wrote:
>
> When user enabled HDCP feature, userspace will set HDCP content
> to DRM_MODE_CONTENT_PROTECTION_DESIRED. Next, anx7625 will update
> HDCP content to DRM_MODE_CONTENT_PROTECTION_ENABLED if down stream
> support HDCP feature.
>
> However once HDCP c
drm_panel_init() was made to initialize the fields in |struct drm_panel|.
There is no need to separately initialize them again.
Drop the separate assignments that are redundant. Also fix up any uses
of `ctx->panel.dev` to use `dev` directly.
Signed-off-by: Chen-Yu Tsai
---
Changes since
On Mon, Dec 2, 2024 at 8:50 PM Dmitry Baryshkov
wrote:
>
> On Mon, Dec 02, 2024 at 02:24:48PM +0800, Chen-Yu Tsai wrote:
> > drm_panel_init() was made to initialize the fields in |struct drm_panel|.
> > There is no need to separately initialize them again.
> >
> >
drm_panel_init() was made to initialize the fields in |struct drm_panel|.
There is no need to separately initialize them again.
Drop the separate assignments that are redundant.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/panel/panel-visionox-rm69299.c | 3 ---
1 file changed, 3 deletions
On Fri, Nov 29, 2024 at 10:55 PM Maxime Ripard wrote:
>
> On Fri, Nov 29, 2024 at 10:12:02PM +0800, Sui Jingfeng wrote:
> > Hi,
> >
> > On 2024/11/29 18:51, Maxime Ripard wrote:
> > > On Wed, Nov 27, 2024 at 05:58:31PM +0800, Chen-Yu Tsai wrote:
> > > >
On Thu, Nov 28, 2024 at 2:46 AM Sui Jingfeng wrote:
>
> Hi,
>
> On 2024/11/27 17:58, Chen-Yu Tsai wrote:
> > Revisiting this thread since I just stepped on the same problem on a
> > different device.
> >
> > On Thu, Nov 14, 2024 at 9:12 PM Maxime Ripard wrote
Revisiting this thread since I just stepped on the same problem on a
different device.
On Thu, Nov 14, 2024 at 9:12 PM Maxime Ripard wrote:
>
> On Tue, Oct 29, 2024 at 10:53:49PM +0800, Fei Shao wrote:
> > On Thu, Oct 24, 2024 at 8:36 PM Maxime Ripard wrote:
> > >
> > > On Wed, Oct 09, 2024 at 0
On Mon, Nov 25, 2024 at 9:50 PM Sean Nyekjaer wrote:
>
> Use new helper function for HDMI mode validation
This is a bit misleading since this is actually the DPI or parallel
output encoder, not HDMI. HDMI is in drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
and drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
Chen
On Tue, 29 Oct 2024 17:54:10 +0800, Chen-Yu Tsai wrote:
> The IT6505 bridge chip has a active low reset line. Since it is a
> "reset" and not an "enable" line, the GPIO should be asserted to
> put it in reset and deasserted to bring it out of reset during
>
On Tue, 29 Oct 2024 19:13:07 +0800, Chen-Yu Tsai wrote:
> The recent attempt to make the MediaTek DRM driver build for non-ARM
> compile tests made the driver unbuildable for arm64 platforms. Since
> this is used on both ARM and arm64 platforms, just drop the dependency
> on ARM.
&g
On Thu, Oct 31, 2024 at 5:30 PM mrip...@kernel.org wrote:
>
> On Wed, Oct 30, 2024 at 04:52:17PM +0800, Chen-Yu Tsai wrote:
> > On Wed, Oct 30, 2024 at 4:48 PM CK Hu (胡俊光) wrote:
> > >
> > > On Wed, 2024-10-30 at 09:25 +0100, mrip...@kernel.org wrote:
> > &g
On Wed, Oct 30, 2024 at 4:48 PM CK Hu (胡俊光) wrote:
>
> On Wed, 2024-10-30 at 09:25 +0100, mrip...@kernel.org wrote:
> > On Wed, Oct 30, 2024 at 03:30:34AM +, CK Hu (胡俊光) wrote:
> > > Hi, Chen-yu:
> > >
> > > On Tue, 2024-10-29 at 19:13 +0800, Che
Signed-off-by: Chen-Yu Tsai
---
It looks like the culprit commit was merged through the drm-misc tree.
So please merge this on top ASAP.
drivers/gpu/drm/mediatek/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediat
. The other known user is
the MT8183 Kukui / Jacuzzi family; their device trees currently do not
have the IT6505 included.
Fix the polarity in the driver while there are no actual users.
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
Cc:
Signed-off-by: Chen-Yu Tsai
---
driv
; in the future.
>
> Signed-off-by: Javier Carrasco
Reviewed-by: Chen-Yu Tsai
break.
>
> Cc: sta...@vger.kernel.org
> Fixes: d761b9450e31 ("drm/mediatek: Add cnt checking for coverity issue")
>
> Signed-off-by: Javier Carrasco
Reviewed-by: Chen-Yu Tsai
rm
> this check manually. In case of DRM_BRIDGE_OP_HDMI bridges the check can
> be dropped in favour of performing it in drm_bridge_connector.
>
> Signed-off-by: Dmitry Baryshkov
Makes sense, code looks like a correct substitution, and AFAICT covers
all current in tree drivers.
Whole seri
On Wed, Oct 9, 2024 at 1:24 PM Fei Shao wrote:
>
> In the mtk_dsi driver, its DSI host attach callback calls
> devm_drm_of_get_bridge() to get the next bridge. If that next bridge is
> a panel bridge, a panel_bridge object is allocated and managed by the
> panel device.
>
> Later, if the attach ca
On Tue, Oct 8, 2024 at 3:07 PM Jason-JH Lin (林睿祥)
wrote:
>
> On Tue, 2024-10-08 at 14:52 +0800, Chen-Yu Tsai wrote:
> >
> > External email : Please do not click links or open attachments until
> > you have verified the sender or the content.
> > On Tue, Oct 8
73.
>
> Fix the SoC degradation problem by this sreies.
Tested-by: Chen-Yu Tsai
> ---
>
> Change in v10:
> 1. Fix the commit message and comment for OVL_CON_AEN
Please carry tested-by tags from people for cosmetic changes such as this.
> Change in v9:
> 1. Add the fix pa
73.
>
> Fix the SoC degradation problem by this sreies.
The series fixes the display color issue on MT8173. Tested on Hana
Chromebook (Telesu).
Tested-by: Chen-Yu Tsai
> ---
> Change in v9:
> 1. Add the fix patch for the XRGB downgrade issue of MT8173
> 2. Add the refine patch
On Tue, Sep 10, 2024 at 5:01 PM AngeloGioacchino Del Regno
wrote:
>
> Changes in v9:
> - Rebased on next-20240910
> - Removed redundant assignment and changed a print to dev_err()
> - Dropped if branch to switch conversion as requested; this will
>be sent as a separate commit out of this se
On Tue, Aug 20, 2024 at 8:59 PM Rong Qianfeng wrote:
>
> Replace devm_clk_get() and clk_prepare_enable() with
> devm_clk_get_enabled() that also disables and unprepares it on
> driver detach.
>
> Signed-off-by: Rong Qianfeng
> ---
> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 13 +++--
>
On Sun, Aug 18, 2024 at 7:08 AM Ryan Walklin wrote:
>
> The Allwinner H616 and variants have a new display engine revision
> (DE33).
>
> Add a clock binding for the DE33.
>
> Signed-off-by: Ryan Walklin
Reviewed-by: Chen-Yu Tsai
cks,
> therefore a fallback for the mixer compatible is not provided.
>
> Add a display engine mixer binding for the DE33.
>
> Signed-off-by: Ryan Walklin
> Acked-by: Conor Dooley
Reviewed-by: Chen-Yu Tsai
On Sun, Aug 18, 2024 at 7:08 AM Ryan Walklin wrote:
>
> The Allwinner H616 and variants have a new display engine revision
> (DE33).
>
> Add a display engine bus binding for the DE33.
>
> Signed-off-by: Ryan Walklin
> Acked-by: Conor Dooley
Reviewed-by: Chen-Yu Tsai
&
by: Jernej Skrabec
> Co-developed-by: Ryan Walklin
> Signed-off-by: Ryan Walklin
Reviewed-by: Chen-Yu Tsai
On Sun, Aug 18, 2024 at 7:08 AM Ryan Walklin wrote:
>
> From: Jernej Skrabec
>
> The DE33 is a newer version of the Allwinner Display Engine IP block,
> found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already
> supported by the mainline driver.
>
> The DE33 in the H616 has mixer0 and
On Tue, Jul 30, 2024 at 7:24 AM Dmitry Baryshkov
wrote:
>
> On Sat, Jul 27, 2024 at 08:33:10PM GMT, Alper Nebi Yasak wrote:
> > Hi,
> >
> > I have a MT8186 "Magneton" Chromebook that I'm trying to boot a kernel
> > based on Collabora's for-kernelci branch [1], using a config from
> > postmarketOS
(CC-ed Fei Shao)
On Thu, Jul 18, 2024 at 4:24 PM AngeloGioacchino Del Regno
wrote:
>
> Hardware-speaking, there is no feature-reduced cursor specific
> plane, so this driver reserves the last all Overlay plane as a
> Cursor plane, but sets the maximum cursor width/height to the
> maximum value th
On Fri, Jun 28, 2024 at 6:31 PM Luca Ceresoli wrote:
>
> Hello Chen-Yu,
>
> +Rob
>
> On Thu, 27 Jun 2024 15:19:03 +0800
> Chen-Yu Tsai wrote:
>
> > Add OF notifier handler needed for creating/destroying MIPI DSI devices
> > according to dynamic runtime chang
Add OF notifier handler needed for creating/destroying MIPI DSI devices
according to dynamic runtime changes in the DT live tree. This code is
enabled when CONFIG_OF_DYNAMIC is selected.
This is based on existing code for I2C and SPI subsystems.
Signed-off-by: Chen-Yu Tsai
---
Changes since v1
On Thu, Jun 27, 2024 at 9:23 AM Pafford, Robert J.
wrote:
>
> Frank Oltmanns writes:
>
> > Hi Robert,
> >
> > 26.06.2024 18:03:24 Pafford, Robert J. :
> >
> >> Hi Frank,
> >>
> >> Moving to a new for loop makes sense. Let me know when you have a patch
> >
> > The patch is here, strange you didn't
Hi Thomas,
On Thu, Jun 20, 2024 at 10:20 PM Chun-Kuang Hu wrote:
>
> Hi, Chen-Yu:
>
> Chen-Yu Tsai 於 2024年6月20日 週四 下午1:47寫道：
> >
> > With the recent switch from fbdev-generic to fbdev-dma, the driver now
> > requires the DRM GEM DMA helpers. This dependency is miss
Add OF notifier handler needed for creating/destroying MIPI DSI devices
according to dynamic runtime changes in the DT live tree. This code is
enabled when CONFIG_OF_DYNAMIC is selected.
This is based on existing code for I2C and SPI subsystems.
Signed-off-by: Chen-Yu Tsai
---
This is a patch I
On Thu, Jun 20, 2024 at 2:37 PM Thomas Zimmermann wrote:
>
> Hi
>
> Am 20.06.24 um 07:47 schrieb Chen-Yu Tsai:
> > With the recent switch from fbdev-generic to fbdev-dma, the driver now
> > requires the DRM GEM DMA helpers. This dependency is missing, and will
> >
With the recent switch from fbdev-generic to fbdev-dma, the driver now
requires the DRM GEM DMA helpers. This dependency is missing, and will
cause a link failure if fbdev emulation is enabled.
Add the missing dependency.
Fixes: 0992284b4fe4 ("drm/mediatek: Use fbdev-dma")
Signed-off-b
On Tue, Jun 4, 2024 at 12:18 PM Chen-Yu Tsai wrote:
>
> On Fri, May 31, 2024 at 9:37 PM Frank Binns wrote:
> >
> > Hi ChenYu,
> >
> > On Thu, 2024-05-30 at 16:35 +0800, Chen-Yu Tsai wrote:
> > > The MediaTek MT8173 comes with a PowerVR Rogue GX6250, w
On Wed, Jun 5, 2024 at 7:15 PM AngeloGioacchino Del Regno
wrote:
>
> Il 05/06/24 03:38, CK Hu (胡俊光) ha scritto:
> > Hi, Angelo:
> >
> > On Tue, 2024-05-21 at 09:57 +0200, AngeloGioacchino Del Regno wrote:
> >> Document OF graph on MMSYS/VDOSYS: this supports up to three DDP paths
> >> per HW insta
On Wed, Jun 5, 2024 at 7:25 PM AngeloGioacchino Del Regno
wrote:
>
> Il 05/06/24 10:25, Chen-Yu Tsai ha scritto:
> > On Thu, May 30, 2024 at 6:03 PM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> Il 30/05/24 10:35, Chen-Yu Tsai ha scritto:
> >>>
On Thu, May 30, 2024 at 6:16 PM Chen-Yu Tsai wrote:
>
> On Thu, May 30, 2024 at 5:59 PM AngeloGioacchino Del Regno
> wrote:
> >
> > Il 30/05/24 10:35, Chen-Yu Tsai ha scritto:
> > > The MFG (GPU) block on the MT8173 has a small glue layer, named MFG_TOP
> &g
On Thu, May 30, 2024 at 6:03 PM AngeloGioacchino Del Regno
wrote:
>
> Il 30/05/24 10:35, Chen-Yu Tsai ha scritto:
> > The MFG_ASYNC domain, which is likely associated to the whole MFG block,
> > currently specifies clk26m as its domain clock. This is bogus, since the
> &
t;
> Signed-off-by: AngeloGioacchino Del Regno
>
Reviewed-by: Chen-Yu Tsai
> ---
> drivers/gpu/drm/panfrost/panfrost_drv.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c
> b/drivers/gpu/drm/panfrost/panfrost_drv.c
> in
On Tue, Jun 4, 2024 at 8:39 PM AngeloGioacchino Del Regno
wrote:
>
> Add a compatible for the MediaTek MT8188 SoC, with an integrated
> ARM Mali G57 MC3 (Valhall-JM) GPU.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
Reviewed-by: Chen-Yu Tsai
> ---
> Documentation
On Fri, May 31, 2024 at 10:25 PM Adam Ford wrote:
>
> On Fri, May 31, 2024 at 8:37 AM Frank Binns wrote:
> >
> > Hi ChenYu,
> >
> > On Thu, 2024-05-30 at 16:35 +0800, Chen-Yu Tsai wrote:
> > > The MediaTek MT8173 comes with a PowerVR Rogue GX6250, w
On Fri, May 31, 2024 at 9:37 PM Frank Binns wrote:
>
> Hi ChenYu,
>
> On Thu, 2024-05-30 at 16:35 +0800, Chen-Yu Tsai wrote:
> > The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is one
> > of the Series6XT GPUs, another sub-family of the Rogue family.
>
>
On Fri, May 31, 2024 at 7:18 PM Frank Binns wrote:
>
> On Thu, 2024-05-30 at 16:35 +0800, Chen-Yu Tsai wrote:
> > The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is part
> > of the Series6XT, another variation of the Rogue family of GPUs.
> >
> &g
On Thu, May 30, 2024 at 11:43 PM Conor Dooley wrote:
>
> On Thu, May 30, 2024 at 04:35:00PM +0800, Chen-Yu Tsai wrote:
> > The MFG (GPU) block on the MT8173 has a small glue layer, named MFG_TOP
> > in the datasheet, that contains clock gates, some power sequence signal
>
On Thu, May 30, 2024 at 4:35 PM Chen-Yu Tsai wrote:
>
> Hi everyone,
>
> This series enables the PowerVR GPU found in the MT8173 SoC, found in
> some Chromebooks.
>
> This version is different from the initial powervr driver submission [1]
> in that it splits out the GPU g
On Thu, May 30, 2024 at 5:59 PM AngeloGioacchino Del Regno
wrote:
>
> Il 30/05/24 10:35, Chen-Yu Tsai ha scritto:
> > The MFG (GPU) block on the MT8173 has a small glue layer, named MFG_TOP
> > in the datasheet, that contains clock gates, some power sequence signal
> > d
t;)
Signed-off-by: Chen-Yu Tsai
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 3458be7f7f61..136b28f80cc2 100644
--- a/arch/arm64/boot/dt
/
Signed-off-by: Chen-Yu Tsai
---
.../bindings/gpu/img,powervr-rogue.yaml | 24 +++
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
index
The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is part
of the Series6XT, another variation of the Rogue family of GPUs.
On top of the GPU is a glue layer that handles some clock and power
signals.
Add device nodes for both.
Signed-off-by: Chen-Yu Tsai
---
arch/arm64/boot/dts
,
while the power sequencing bits are exposed as one singular power domain.
Signed-off-by: Chen-Yu Tsai
---
.../clock/mediatek,mt8173-mfgtop.yaml | 71 +++
include/dt-bindings/clock/mt8173-clk.h| 7 ++
2 files changed, 78 insertions(+)
create mode 100644
The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is part
of the Series6XT, another variation of the Rogue family of GPUs.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/imagination/pvr_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/imagination/pvr_drv.c
,
while the power sequencing bits are exposed as one singular power domain.
Signed-off-by: Chen-Yu Tsai
---
drivers/clk/mediatek/Kconfig | 9 +
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8173-mfgtop.c | 240 +++
3 files changed, 250
@imgtec.com/
[2] https://gitlab.freedesktop.org/imagination/linux-firmware/-/tree/powervr
[3] https://github.com/SaschaWillems/Vulkan
[4]
https://lore.kernel.org/dri-devel/f2b2671e-5acc-4dec-9c2e-3c9cd2e1f...@imgtec.com/
Chen-Yu Tsai (6):
dt-bindings: clock: mediatek: Add mt8173 mfgtop
clk: media
On Mon, May 27, 2024 at 1:58 PM Chen-Yu Tsai wrote:
>
> On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
> >
> > Need secure buffer size to convert secure handle to secure
> > pa in optee-os, re-construct the vsi struct to store each
> > secure buffer size.
> &
On Mon, May 27, 2024 at 5:25 PM AngeloGioacchino Del Regno
wrote:
>
> Add a compatible for the MediaTek MT8188 SoC, with an integrated
> ARM Mali G57 MC3 (Valhall-JM) GPU.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
>
Hi,
On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
>
> Open tee context to initialize the environment in order to communication
> with optee-os, then open tee session as the communication pipeline for
> lat and core to send data for hardware decode.
>
> Signed-off-by: Yunfei Dong
> ---
> ..
On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
>
> From: Yilong Zhou
>
> Change vp9 driver to support secure video playback(svp) for
> mt8188. Need to map shared memory with optee interface and
> wait interrupt in optee-os.
>
> Signed-off-by: Yilong Zhou
> Signed-off-by: Yunfei Dong
> ---
>
Hi,
On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
>
> Define one uncompressed capture format V4L2_PIX_FMT_MS21 in order to
> support one plane memory. The buffer size is luma + chroma, luma is
> stored at the start and chrome is stored at the end.
>
> Signed-off-by: Yunfei Dong
> ---
> Doc
On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
>
> Need secure buffer size to convert secure handle to secure
> pa in optee-os, re-construct the vsi struct to store each
> secure buffer size.
>
> Separate svp and normal wait interrupt condition for svp mode
> waiting hardware interrupt in opte
On Mon, May 27, 2024 at 12:54 PM Fei Shao wrote:
>
> On Mon, May 27, 2024 at 12:38 PM Chen-Yu Tsai wrote:
> >
> > On Mon, May 27, 2024 at 12:34 PM Fei Shao wrote:
> > >
> > > Hi Shawn,
> > >
> > > On Thu, May 2, 2024 at 6:39 PM Sha
On Mon, May 27, 2024 at 12:34 PM Fei Shao wrote:
>
> Hi Shawn,
>
> On Thu, May 2, 2024 at 6:39 PM Shawn Sung wrote:
> >
> > From: Hsiao Chien Sung
> >
> > Set DRM mode configs limitation according to the hardware capabilities
> > and pass the IGT checks as below:
> >
> > - The test "graphics.Igt
On Wed, May 22, 2024 at 8:32 PM Sui Jingfeng wrote:
>
> Hi,
>
>
> On 5/21/24 15:57, AngeloGioacchino Del Regno wrote:
> > +static int mtk_drm_of_ddp_path_build(struct device *dev, struct
> > device_node *node,
> > + struct mtk_mmsys_driver_data *data)
> > +{
> > +
On Thu, May 23, 2024 at 6:14 PM Andrzej Pietrasiewicz
wrote:
>
> Hi,
>
> I'm having second thoughts, please see inline,
>
> W dniu 22.05.2024 o 14:26, Andrzej Pietrasiewicz pisze:
> > Hi Yunfei,
> >
> > W dniu 16.05.2024 o 14:20, Yunfei Dong pisze:
> >> Define one uncompressed capture format V4L2_
On Tue, May 14, 2024 at 5:19 PM Chen-Yu Tsai wrote:
>
> On Tue, May 14, 2024 at 4:54 PM Matt Coster wrote:
> >
> > On 10/05/2024 09:43, Chen-Yu Tsai wrote:
> > > Hi,
> > >
> > > I got the following lockdep warnings while trying to make the powervr
&
On Tue, May 14, 2024 at 4:54 PM Matt Coster wrote:
>
> On 10/05/2024 09:43, Chen-Yu Tsai wrote:
> > Hi,
> >
> > I got the following lockdep warnings while trying to make the powervr
> > driver work on MT8173. This was observed while trying to run vkmark.
> >
Hi,
I got the following lockdep warnings while trying to make the powervr
driver work on MT8173. This was observed while trying to run vkmark.
This was on the next-20240506 kernel running Debian Sid with the
Mesa 24.0.6 package rebuilt to include the powervr driver.
[73602.438144] [
On Thu, May 2, 2024 at 5:03 PM Hsin-Te Yuan wrote:
>
> The anx7625 supports two different TDM settings, which determine whether
> or not the first audio data bit should be shifted. This series adds the
> support for configuring TDM setting through a property in the device
> tree.
As mentioned off
On Mon, Apr 8, 2024 at 6:16 PM AngeloGioacchino Del Regno
wrote:
>
> Il 08/04/24 05:20, Chen-Yu Tsai ha scritto:
> > On Thu, Apr 4, 2024 at 4:16 PM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> Document OF graph on MMSYS/VDOSYS: this supports up to thre
On Thu, Apr 4, 2024 at 4:16 PM AngeloGioacchino Del Regno
wrote:
>
> Document OF graph on MMSYS/VDOSYS: this supports up to three DDP paths
> per HW instance (so potentially up to six displays for multi-vdo SoCs).
>
> The MMSYS or VDOSYS is always the first component in the DDP pipeline,
> so it o
The ITE IT6505 display bridge can take one I2S input and transmit it
over the DisplayPort link.
Add #sound-dai-cells (= 0) to the binding for it.
Signed-off-by: Chen-Yu Tsai
---
Changes since v1 [1]:
- Reference /schemas/sound/dai-common.yaml
- Change "additionalProperties: fals
On Thu, Mar 21, 2024 at 1:59 AM Nícolas F. R. A. Prado
wrote:
>
> On Wed, Mar 20, 2024 at 04:19:51PM +0100, Maxime Ripard wrote:
> > Hi,
> >
> > On Wed, Mar 20, 2024 at 11:07:34AM -0400, Nícolas F. R. A. Prado wrote:
> > > I noticed that there are some commits from drm-misc-next [1] that haven't
On Wed, Mar 20, 2024 at 11:07 PM Nícolas F. R. A. Prado
wrote:
>
> Hi,
>
> I noticed that there are some commits from drm-misc-next [1] that haven't been
> added to the for-linux-next [2] branch, and consequently haven't made their
> way
> into linux-next.
>
> Namely, commit bf0390e2c95b ("drm/pa
rm/bridge: anx7625: add HDMI audio function")
> Signed-off-by: Hsin-Te Yuan
Reviewed-by: Chen-Yu Tsai
> ---
> Changes in v3:
> - Add Fixes tag.
> - Link to v2:
> https://lore.kernel.org/r/20240306-anx7625-v2-1-7138e00b2...@chromium.org
>
> Changes in v2:
> - Add
Hi,
Please add a space after the colons in the subject line.
On Tue, Mar 5, 2024 at 8:32 PM Hsin-Te Yuan wrote:
>
> Previously, the audio status was not updated during detection, leading
> to a persistent audio despite hot plugging events. To resolve this
^ it feels like
On Fri, Jan 26, 2024 at 6:17 PM Krzysztof Kozlowski
wrote:
>
> On 26/01/2024 08:35, Chen-Yu Tsai wrote:
> > The ITE IT6505 display bridge can take one I2S input and transmit it
> > over the DisplayPort link.
> >
> > Add #sound-dai-cells (= 0) to the binding for it.
The ITE IT6505 display bridge can take one I2S input and transmit it
over the DisplayPort link.
Add #sound-dai-cells (= 0) to the binding for it.
Signed-off-by: Chen-Yu Tsai
---
The driver side changes [1] are still being worked on, but given the
hardware is very simple, it would be nice if we
On Tue, Nov 21, 2023 at 8:54 PM AngeloGioacchino Del Regno
wrote:
>
> Il 30/07/23 20:08, Jiaxin Yu ha scritto:
> > Add audio support for it6505
> >
> > 1. Bridge to hdmi-codec to support audio feature. At the same time,
> > the function of automatically detecting audio is removed.
> > 2. It is
On Wed, Nov 8, 2023 at 3:27 PM CK Hu (胡俊光) wrote:
>
> Hi, Jason:
>
> On Wed, 2023-09-20 at 17:06 +0800, Jason-JH.Lin wrote:
> > Add spinlock protection to avoid race condition on vblank event
> > between mtk_drm_crtc_atomic_begin() and mtk_drm_finish_page_flip().
>
> Reviewed-by: CK Hu
Please al
On Thu, Nov 23, 2023 at 9:38 PM Michael Walle wrote:
>
> Add the two DSI controller node and the associated DPHY nodes.
> Individual boards have to enable them in the board device tree.
>
> Signed-off-by: Michael Walle
Reviewed-by: Chen-Yu Tsai
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