On Fri, May 9, 2025 at 11:14 PM Andre Przywara <andre.przyw...@arm.com> wrote:
>
> On Wed, 7 May 2025 15:19:21 -0500
> Chris Morgan <macroalph...@gmail.com> wrote:
>
> Hi,
>
> despite the slightly ill fate of this series, I was wondering if we could
> get the non-controversial clock parts for instance already merged, to
> reduce the number of patches and mitigate the churn with dependencies?
Sure. Are we expecting any of the DT bits to go in this cycle?
If not I won't have to split the DT header patch on a separate
branch.
ChenYu
> > From: Chris Morgan <macromor...@hotmail.com>
> >
> > Add the required LVDS reset for the LCD TCON. Note that while this
> > reset is exposed for the T507, H616, and H700 only the H700 has
> > an LCD controller.
> >
> > Signed-off-by: Chris Morgan <macromor...@hotmail.com>
> > Signed-off-by: Ryan Walklin <r...@testtoast.com>
>
> Matches the T507 manual:
>
> Reviewed-by: Andre Przywara <andre.przyw...@arm.com>
>
> Cheers,
> Andre
>
> > ---
> > drivers/clk/sunxi-ng/ccu-sun50i-h616.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> > b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> > index daa462c7d477..955c614830fa 100644
> > --- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> > +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> > @@ -1094,6 +1094,7 @@ static const struct ccu_reset_map
> > sun50i_h616_ccu_resets[] = {
> > [RST_BUS_TCON_LCD1] = { 0xb7c, BIT(17) },
> > [RST_BUS_TCON_TV0] = { 0xb9c, BIT(16) },
> > [RST_BUS_TCON_TV1] = { 0xb9c, BIT(17) },
> > + [RST_BUS_LVDS] = { 0xbac, BIT(16) },
> > [RST_BUS_TVE_TOP] = { 0xbbc, BIT(16) },
> > [RST_BUS_TVE0] = { 0xbbc, BIT(17) },
> > [RST_BUS_HDCP] = { 0xc4c, BIT(16) },
>
>
