Hi Amirreza,
On Wed, Apr 9, 2025 at 2:28 AM Amirreza Zarrabi
wrote:
>
> Hi jens,
>
> On 4/8/2025 10:19 PM, Jens Wiklander wrote:
>
> Hi Amirreza,
>
> On Fri, Mar 28, 2025 at 3:48 AM Amirreza Zarrabi
> wrote:
>
> For drivers that can transfer data to the TEE without using shared
> memory from cli
Hello Javier,
On Wed, Apr 09, 2025 at 08:11:23AM +0200, Javier Martinez Canillas wrote:
[...]
> >> > +static int st7571_set_pixel_format(struct st7571_device *st7571,
> >> > + u32 pixel_format)
> >> > +{
> >> > +switch (pixel_format) {
> >> > +cas
From: Chris Wilson
commit 78a033433a5ae4fee85511ee075bc9a48312c79e upstream.
If we abort driver initialisation in the middle of gt/engine discovery,
some engines will be fully setup and some not. Those incompletely setup
engines only have 'engine->release == NULL' and so will leak any of the
com
From: Chris Wilson
commit 78a033433a5ae4fee85511ee075bc9a48312c79e upstream.
If we abort driver initialisation in the middle of gt/engine discovery,
some engines will be fully setup and some not. Those incompletely setup
engines only have 'engine->release == NULL' and so will leak any of the
com
Add jobs to run KUnit tests using tools/testing/kunit/kunit.py tool.
Signed-off-by: Vignesh Raman
---
v2:
- Run KUnit tests with LLVM.
---
drivers/gpu/drm/ci/gitlab-ci.yml | 1 +
drivers/gpu/drm/ci/kunit.sh | 11 +++
drivers/gpu/drm/ci/kunit.yml | 32 +++
Add jobs to validate devicetrees and run KUnit tests.
Pipeline link,
https://gitlab.freedesktop.org/vigneshraman/linux/-/pipelines/1400550
Link to v1,
https://lore.kernel.org/all/20250327160117.945165-1-vignesh.ra...@collabora.com/
Vignesh Raman (2):
drm/ci: Add jobs to validate devicetrees
Add jobs to run dt_binding_check and dtbs_check. If warnings are seen,
exit with a non-zero error code while configuring them as warning in
the GitLab CI pipeline.
Signed-off-by: Vignesh Raman
---
v2:
- Use LLVM to build.
---
drivers/gpu/drm/ci/check-devicetrees.yml | 43
On 08/04/2025 22:26, Dmitry Baryshkov wrote:
>>> + - const: qcom,sa8775p-dsi-ctrl
>>> + - const: qcom,mdss-dsi-ctrl
>>
>> Drop fallback
>>
>
> Hi Krzysztof,
>
> I couldn't understand the meaning of "Drop fallback", could please
> elabora
Hi Wentao,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-exynos/exynos-drm-next]
[also build test ERROR on linus/master v6.15-rc1 next-20250408]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to
Hi Wentao,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-exynos/exynos-drm-next]
[also build test ERROR on linus/master v6.15-rc1 next-20250408]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to
Em 08/04/2025 22:46, jiangf...@kylinos.cn escreveu:
From: Feng Jiang
When calling scnprintf() to append recovery method to event_string,
the second argument should be `sizeof(event_string) - len`, otherwise
there is a potential overflow problem.
Fixes: b7cf9f4ac1b8 ("drm: Introduce device wedg
On 4/2/2025 6:26 PM, Nemesa Garg wrote:
To enable or disable the sharpness check the
casf_enable flag. While enabling the sharpness
write the programmable coefficients, sharpness
register bits and also enable the scaler.
Load the filter lut value which needs to be done
one time while enabling t
This patch series is aimed at providing UM with detailed memory profiling
information in debug builds. It is achieved through a device-wide list of
DRM GEM objects, and also implementing the ability to label BO's from UM
through a new IOCTL.
The new debugfs file shows a list of driver DRM GEM obje
On Tue, 8 Apr 2025 at 09:07, Fedor Pchelkin wrote:
>
> > Linus comment is about kvmalloc(), but the code here is using
> > kvmalloc_array() which as far as I know is explicitly made to safely
> > allocate arrays with parameters provided by userspace.
No.
ABSOLUTELY NOTHING CAN ALLOCATE ARRAYS WI
From: Feng Jiang
When calling scnprintf() to append recovery method to event_string,
the second argument should be `sizeof(event_string) - len`, otherwise
there is a potential overflow problem.
Fixes: b7cf9f4ac1b8 ("drm: Introduce device wedged event")
Signed-off-by: Feng Jiang
---
v3:
- update
On Tue, 08 Apr 2025, "Borah, Chaitanya Kumar"
wrote:
>> > We will need more changes than fixing the variable names.
>> >
>> > I get this error
>> >
>> > ERROR: modpost: "__devm_drm_panel_alloc"
>> [drivers/gpu/drm/panel/panel-auo-a030jtn01.ko] undefined!
>> > make[2]: *** [scripts/Makefile.modpos
Hi Jens,
On 4/8/2025 10:47 PM, Jens Wiklander wrote:
> Hi Amirreza,
>
> On Fri, Mar 28, 2025 at 3:48 AM Amirreza Zarrabi
> wrote:
>>
>> Introduce qcomtee_object, which represents an object in both QTEE and
>> the kernel. QTEE clients can invoke an instance of qcomtee_object to
>> access QTEE ser
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
include/drm/drm_kunit_helpers.h
between commit:
13c1d5f3a7fa ("drm/tests: helpers: Create kunit helper to destroy a
drm_display_mode")
from the drm-misc-fixes tree and commit:
e4e3de631d14 ("drm/tests: helpers: Cr
On 2025-04-08 12:40, Daniel Stone wrote:
> Hi there,
>
> On Tue, 1 Apr 2025 at 20:53, Simon Ser wrote:
>> On Tuesday, April 1st, 2025 at 17:14, Daniel Stone
>> wrote:
>>> 'plane' seems really incongruous here. The colorop can be created for
>>> any number of planes, but we're setting it to a
Hi jens,
On 4/8/2025 10:19 PM, Jens Wiklander wrote:
> Hi Amirreza,
>
> On Fri, Mar 28, 2025 at 3:48 AM Amirreza Zarrabi
> wrote:
>> For drivers that can transfer data to the TEE without using shared
>> memory from client, it is necessary to receive the user address
>> directly, bypassing any pro
Hi Jens,
On 4/8/2025 12:55 AM, Jens Wiklander wrote:
> Hi Amir,
>
> On Fri, Mar 28, 2025 at 3:48 AM Amirreza Zarrabi
> wrote:
>> The tee_context can be used to manage TEE user resources, including
>> those allocated by the driver for the TEE on behalf of the user.
>> The release() callback is inv
From: Lad Prabhakar
Add DSI support for Renesas RZ/V2H(P) SoC.
Co-developed-by: Fabrizio Castro
Signed-off-by: Fabrizio Castro
Signed-off-by: Lad Prabhakar
---
v1->v2:
- Dropped unused macros
- Added missing LPCLK flag to rzvv2h info
---
.../gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c| 451 ++
From: Lad Prabhakar
Introduce the `RZ_MIPI_DSI_FEATURE_LPCLK` feature flag in
`rzg2l_mipi_dsi_hw_info` to indicate the need for LPCLK configuration.
On the RZ/V2H(P) SoC, the LPCLK clock rate influences the required
DPHY register configuration, whereas on the RZ/G2L SoC, this clock
is not presen
On Mon, Apr 07, 2025 at 05:35:47PM -0600, Gustavo A. R. Silva wrote:
> [..]
>
> > > > > - struct {
> > > > > - struct nvif_chan_v0 chan;
> > > > > - char name[TASK_COMM_LEN+16];
> > > > > - } args;
> > > > > + DEFINE_RAW_FLEX(struct nvif_chan_v0, args, name, TAS
> -Original Message-
> From: Maxime Ripard
> Sent: Tuesday, April 8, 2025 6:20 PM
> To: Borah, Chaitanya Kumar
> Cc: Dixit, Ashutosh ; Anusha Srivatsa
> ; Deak, Imre ; Neil Armstrong
> ; Jessica Zhang ;
> Maarten Lankhorst ; Thomas
> Zimmermann ; David Airlie ;
> Simona Vetter ; Linus Wal
On Tue, 8 Apr 2025 14:38:44 +0100
Adrián Larumbe wrote:
> > > diff --git a/drivers/gpu/drm/panthor/panthor_gem.c
> > > b/drivers/gpu/drm/panthor/panthor_gem.c
> > > index 44d027e6d664..2fc87be9b700 100644
> > > --- a/drivers/gpu/drm/panthor/panthor_gem.c
> > > +++ b/drivers/gpu/drm/panthor/panth
On Tue, 2025-04-08 at 16:46 +, Timur Tabi wrote:
> On Tue, 2025-04-08 at 17:42 +0100, David Woodhouse wrote:
> > ISTR you said that if the proprietary driver does manage to use that
> > port, then we could at least look at why nouveau doesn't?
>
> Yes, but that is beyond my knowledge of Nouvea
Kernel BO's aren't exposed to UM, so labelling them is the responsibility
of the driver itself. This kind of tagging will prove useful in further
commits when want to expose these objects through DebugFS.
Expand panthor_kernel_bo_create() interface to take a NULL-terminated
string. No bounds check
Add a new character string Panthor BO field, and a function that allows
setting it from within the driver.
Driver takes care of freeing the string when it's replaced or no longer
needed at object destruction time, but allocating it is the responsibility
of callers.
Signed-off-by: Adrián Larumbe
On 3/26/25 8:54 AM, Danilo Krummrich wrote:
> This is the series for the initial DRM Rust abstractions, including DRM
> device /
> driver, IOCTL, File and GEM object abstractions.
>
> This series has been posted previously, however this is a long time ago and I
> reworked a lot of things quite
On 08/04/2025 21:42, Krzysztof Kozlowski wrote:
On 08/04/2025 13:44, Dmitry Baryshkov wrote:
On Tue, Apr 08, 2025 at 01:03:53PM +0200, Krzysztof Kozlowski wrote:
On 08/04/2025 12:38, Ayushi Makhija wrote:
+properties:
+ compatible:
+items:
contains
+ - const: qcom
On 4/9/25 2:04 AM, Danilo Krummrich wrote:
> On Wed, Apr 09, 2025 at 01:29:35AM +0900, Asahi Lina wrote:
>> On 3/26/25 8:54 AM, Danilo Krummrich wrote:
>>> This is the series for the initial DRM Rust abstractions, including DRM
>>> device /
>>> driver, IOCTL, File and GEM object abstractions.
>
On Tue, 1 Apr 2025 at 02:55, Dmitry Baryshkov
wrote:
>
> On Wed, Mar 12, 2025 at 12:38:04AM +0100, Aleksandrs Vinarskis wrote:
> > DisplayPort requires per-segment link training when LTTPR are switched
> > to non-transparent mode, starting with LTTPR closest to the source.
> > Only when each segme
Add a device DebugFS file that displays a complete list of all the DRM
GEM objects that are exposed to UM through a DRM handle.
Since leaking object identifiers that might belong to a different NS is
inadmissible, this functionality is only made available in debug builds
with DEBUGFS support enabl
Allow UM to label a BO for which it possesses a DRM handle.
Signed-off-by: Adrián Larumbe
Reviewed-by: Liviu Dudau
---
drivers/gpu/drm/panthor/panthor_drv.c | 42 ++-
drivers/gpu/drm/panthor/panthor_gem.h | 2 ++
include/uapi/drm/panthor_drm.h| 19
On Tue, Apr 08, 2025 at 12:18:32PM +0530, Aditya Garg wrote:
> From: Aditya Garg
>
> This patch adds support for kunit tests of generic 32-bit FourCCs added to
> vsprintf.
>
> Acked-by: Tamir Duberstein
> Reviewed-by: Andy Shevchenko
> Reviewed-by: Petr Mladek
> Tested-by: Petr Mladek
> Sign
On Tue, Apr 08, 2025 at 12:17:57PM +0530, Aditya Garg wrote:
> From: Hector Martin
>
> %p4cc is designed for DRM/V4L2 FourCCs with their specific quirks, but
> it's useful to be able to print generic 4-character codes formatted as
> an integer. Extend it to add format specifiers for printing gene
On Tue, Apr 08, 2025 at 09:42:36PM +0300, Jani Nikula wrote:
> On Tue, 08 Apr 2025, Jason Gunthorpe wrote:
> > On Tue, Apr 08, 2025 at 11:27:58AM +0300, Jani Nikula wrote:
> >> On Mon, 07 Apr 2025, Jason Gunthorpe wrote:
> >> > On Mon, Apr 07, 2025 at 10:17:40AM +0300, Jani Nikula wrote:
> >> >
>
On Tue, 08 Apr 2025 16:54:14 -0400, Alyssa Rosenzweig wrote:
> This adds the UAPI for the Asahi driver targeting the GPU in the Apple
> M1 and M2 series systems on chip. The UAPI design is based on other
> modern Vulkan-capable drivers, including Xe and Panthor. Memory
> management is based on ex
On Tue, 08 Apr 2025 15:54:14 -0500 Alyssa Rosenzweig wrote ---
> This adds the UAPI for the Asahi driver targeting the GPU in the Apple
> M1 and M2 series systems on chip. The UAPI design is based on other
> modern Vulkan-capable drivers, including Xe and Panthor. Memory
> management
From: Lad Prabhakar
Add clock and reset entries for the DSI and LCDC peripherals.
Co-developed-by: Fabrizio Castro
Signed-off-by: Fabrizio Castro
Signed-off-by: Lad Prabhakar
---
v1->v2:
- No changes
---
drivers/clk/renesas/r9a09g057-cpg.c | 63 +
drivers/clk/rene
From: Lad Prabhakar
Pass the HSFREQ in milli-Hz to the `dphy_init()` callback to improve
precision, especially for the RZ/V2H(P) SoC, where PLL dividers require
high accuracy.
These changes prepare the driver for upcoming RZ/V2H(P) SoC support.
Co-developed-by: Fabrizio Castro
Signed-off-by: F
From: Lad Prabhakar
Hi All,
This patch series adds support for the Display Unit (DU) and MIPI DSI
interface on the Renesas RZ/V2H(P) SoC. The initial patches add PLLDSI
clocks and reset entries for the DSI and LCDC and the later patches add
support for the DU and DSI drivers. The DU block is sim
From: Lad Prabhakar
Introduce the `RZ_MIPI_DSI_FEATURE_16BPP` flag in `rzg2l_mipi_dsi_hw_info`
to indicate support for 16BPP pixel formats. The RZ/V2H(P) SoC supports
16BPP, whereas this feature is missing on the RZ/G2L SoC.
Update the `mipi_dsi_host_attach()` function to check this flag before
On 4/8/2025 7:07 AM, Janusz Krzysztofik wrote:
Hi Daniele,
On Thursday, 3 April 2025 11:12:12 CEST Daniele Ceraolo Spurio wrote:
On 4/2/2025 10:20 AM, Janusz Krzysztofik wrote:
HuC delayed loading fence, introduced with commit 27536e03271da
("drm/i915/huc: track delayed HuC load with a fenc
On 4/4/2025 10:12 PM, Kevin Paul Reddy Janagari wrote:
warning: Incorrect use of kernel-doc format:
* @DC_HDCP_LC_ENABLE_SW_FALLBACK If set, upon HDCP Locality Check FW
Signed-off-by: Kevin Paul Reddy Janagari
---
drivers/gpu/drm/amd/include/amd_shared.h | 2 +-
1 file changed, 1 insertion(+
On Thu, 27 Mar 2025 10:00:07 -0500 Alyssa Rosenzweig wrote ---
> This adds the UAPI for the Asahi driver targeting the GPU in the Apple
> M1 and M2 series systems on chip. The UAPI design is based on other
> modern Vulkan-capable drivers, including Xe and Panthor. Memory
> management
From: Lad Prabhakar
Introduce the `dphy_late_init` callback in `rzg2l_mipi_dsi_hw_info` to
allow additional D-PHY register configurations after enabling data and
clock lanes. This is required for the RZ/V2H(P) SoC but not for the
RZ/G2L SoC.
Modify `rzg2l_mipi_dsi_startup()` to invoke `dphy_late
From: Lad Prabhakar
In preparation for adding support for the Renesas RZ/V2H(P) SoC, this patch
introduces a mechanism to pass SoC-specific information via OF data in the
DSI driver. This enables the driver to adapt dynamically to various
SoC-specific requirements without hardcoding configuration
From: Lad Prabhakar
Simplify the high-speed clock frequency (HSFREQ) calculation by removing
the redundant multiplication and division by 8. The updated equation:
hsfreq = (mode->clock * bpp) / (dsi->lanes);
produces the same result while improving readability and clarity.
Additionally, up
From: Lad Prabhakar
The VCLK range for Renesas RZ/G2L SoC is 148.5 MHz to 5.803 MHz. Add a
minimum clock check in the mode_valid callback to ensure that the clock
value does not fall below the valid range.
Co-developed-by: Fabrizio Castro
Signed-off-by: Fabrizio Castro
Signed-off-by: Lad Prabh
From: Lad Prabhakar
The DU block on the RZ/V2H(P) SoC is identical to the one found on the
RZ/G2L SoC. However, it only supports the DSI interface, whereas the
RZ/G2L supports both DSI and DPI interfaces.
Due to this difference, a SoC-specific compatible string
'renesas,r9a09g057-du' is added fo
From: Lad Prabhakar
The MIPI DSI interface on the RZ/V2H(P) SoC is nearly identical to that of
the RZ/G2L SoC. While the LINK registers are the same for both SoCs, the
D-PHY registers differ. Additionally, the number of resets for DSI on
RZ/V2H(P) is two compared to three on the RZ/G2L.
To accom
From: Lad Prabhakar
Add support for PLLDSI and PLLDSI divider clocks.
The `renesas-rzv2h-dsi.h` header file is added to share the PLL divider
algorithm between the CPG and DSI drivers.
Co-developed-by: Fabrizio Castro
Signed-off-by: Fabrizio Castro
Signed-off-by: Lad Prabhakar
---
v1->v2:
-
With this callback implemented, a terminating application will wait for
the sched entity to be flushed out to the hardware and cancel all other
pending jobs before destroying its context.
This prevents applications with multiple contexts from running into a
race condition between running tasks and
On Tue, 8 Apr 2025 at 01:28, Jani Nikula wrote:
>
> Your goal may be to make everything self-contained, but AFAICS there is
> no agreement on that goal.
Yeah, absolutely not.
I'm not interested in making some general rule that all headers should
be self-contained.
We already have some fairly ob
On 4/8/2025 6:02 AM, Dmitry Baryshkov wrote:
The commit 5a9d50150c2c ("drm/msm/dpu: shift IRQ indices by 1") shifted
IRQ indices by 1, making 'NO_IRQ' to be 0 rather than -1 (and allowing
to skip the definition if the IRQ is not present).
Several platform files were sketched before that commit
From: Mario Limonciello
Currently userspace software systemd treats `brightness` and
`actual_brightness` identically due to a bug found in an out of tree
driver.
This however causes problems for in-tree drivers that use brightness
to report user requested `brightness` and `actual_brightness` to
On Wed, Apr 09, 2025 at 03:06:38AM +0900, Asahi Lina wrote:
> On 4/9/25 2:04 AM, Danilo Krummrich wrote:
> > On Wed, Apr 09, 2025 at 01:29:35AM +0900, Asahi Lina wrote:
> >> On 3/26/25 8:54 AM, Danilo Krummrich wrote:
> >
> > You said "use it/submit it in any way".
>
> I thought keeping authorshi
On 3/3/2025 7:14 AM, Jun Nie wrote:
The capability stored in sblk and pipe_hw_caps is checked only for
SSPP of the first pipe in the pair with current implementation. That
of the 2nd pipe, r_pipe, is not checked and may violate hardware
capability. Move requirement check to dpu_plane_atomic_ch
From: Michael Kelley
Framebuffer memory allocated using alloc_pages() was added to hyperv_fb in
commit 3a6fb6c4255c ("video: hyperv: hyperv_fb: Use physical memory for fb
on HyperV Gen 1 VMs.") in kernel version 5.6. But mmap'ing such
framebuffers into user space has never worked due to limitatio
From: Michael Kelley
Current defio code works only for framebuffer memory that is allocated
with vmalloc(). The code assumes that the underlying page refcount can
be used by the mm subsystem to manage each framebuffer page's lifecycle,
including freeing the page if the refcount goes to 0. This ap
On 08/04/2025 13:44, Dmitry Baryshkov wrote:
> On Tue, Apr 08, 2025 at 01:03:53PM +0200, Krzysztof Kozlowski wrote:
>> On 08/04/2025 12:38, Ayushi Makhija wrote:
> +properties:
> + compatible:
> +items:
contains
> + - const: qcom,sa8775p-dsi-
On Tue, 08 Apr 2025, Jason Gunthorpe wrote:
> On Tue, Apr 08, 2025 at 11:27:58AM +0300, Jani Nikula wrote:
>> On Mon, 07 Apr 2025, Jason Gunthorpe wrote:
>> > On Mon, Apr 07, 2025 at 10:17:40AM +0300, Jani Nikula wrote:
>> >
>> >> Even with Jason's idea [1], you *still* have to start small and op
From: Michael Kelley
Export vmf_insert_mixed_mkwrite() for use by fbdev deferred I/O code,
which can be built as a module. For consistency with the related function
vmf_insert_mixed(), export without the GPL qualifier.
Commit cd1e0dac3a3e ("mm: unexport vmf_insert_mixed_mkwrite") is
effectively
From: Michael Kelley
Current deferred I/O code works only for framebuffer memory that is
allocated with vmalloc(). The code assumes that the underlying page
refcount can be used by the mm subsystem to manage each framebuffer
page's lifecycle, which is consistent with vmalloc'ed memory, but not
wi
Hi Harry,
On Tue, 8 Apr 2025 at 18:30, Harry Wentland wrote:
> On 2025-04-08 12:40, Daniel Stone wrote:
> > OK, Harry's reply cleared that up perfectly - the flexibility that's
> > there at the moment is about being able to reuse colorops for CRTCs in
> > post-blend ops (great!), not shared betwe
On 4/8/2025 10:22 AM, Qasim Ijaz wrote:
_dpu_encoder_trigger_start dereferences "struct dpu_encoder_phys *phys"
before the sanity checks which can lead to a NULL pointer dereference if
phys is NULL.
Fix this by reordering the dereference after the sanity checks.
Fixes: 8144d17a81d9 ("drm
On 08.04.2025 15:47, Boris Brezillon wrote:
On Tue, 8 Apr 2025 14:38:44 +0100
Adrián Larumbe wrote:
> > > > diff --git a/drivers/gpu/drm/panthor/panthor_gem.c
> > > > b/drivers/gpu/drm/panthor/panthor_gem.c
> > > > index 44d027e6d664..2fc87be9b700 100644
> > > > --- a/drivers/gpu/drm/panthor/pan
On 3/13/2025 6:10 PM, Chenyuan Yang wrote:
The function dpu_plane_virtual_atomic_check was dereferencing pointers
returned by drm_atomic_get_plane_state without checking for errors. This
could lead to undefined behavior if the function returns an error pointer.
This commit adds checks using I
On Mon, Apr 07, 2025 at 04:23:21PM +0200, Luca Ceresoli wrote:
> This is the new API for allocating DRM bridges.
>
> Signed-off-by: Luca Ceresoli
> ---
> drivers/gpu/drm/bridge/display-connector.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
Reviewed-by: Dmitry Baryshkov
From: Arnd Bergmann
clang-16 and earlier complain about what it thinks might be an out of
range number:
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c:348:8: error: call to
__compiletime_assert_579 declared with 'error' attribute: FIELD_PREP: value too
large for the field
Am 08.04.25 um 17:46 schrieb Erico Nunes:
> With this callback implemented, a terminating application will wait for
> the sched entity to be flushed out to the hardware and cancel all other
> pending jobs before destroying its context.
> This prevents applications with multiple contexts from runnin
On Tue, Apr 8, 2025 at 11:20 AM Sumit Garg wrote:
>
> On Tue, Apr 01, 2025 at 02:26:59PM +0200, Jens Wiklander wrote:
> > On Tue, Apr 1, 2025 at 12:13 PM Sumit Garg wrote:
> > >
> > > + MM folks to seek guidance here.
> > >
> > > On Thu, Mar 27, 2025 at 09:07:34AM +0100, Jens Wiklander wrote:
> >
_dpu_encoder_trigger_start dereferences "struct dpu_encoder_phys *phys"
before the sanity checks which can lead to a NULL pointer dereference if
phys is NULL.
Fix this by reordering the dereference after the sanity checks.
Fixes: 8144d17a81d9 ("drm/msm/dpu: Skip trigger flush and start for CWB"
On 4/8/2025 10:22 AM, Qasim Ijaz wrote:
_dpu_encoder_trigger_start dereferences "struct dpu_encoder_phys *phys"
before the sanity checks which can lead to a NULL pointer dereference if
phys is NULL.
Fix this by reordering the dereference after the sanity checks.
Fixes: 8144d17a81d9 ("drm/
On Tue, Apr 08, 2025 at 07:27:28PM +0800, jiangf...@kylinos.cn wrote:
> From: Feng Jiang
>
> When calling scnprintf() to append recovery method to event_string,
> the second argument should be `sizeof(event_string) - len`, otherwise
> there is a potential overflow problem.
Thanks. Perhaps change
On Wed, Apr 09, 2025 at 01:29:35AM +0900, Asahi Lina wrote:
> On 3/26/25 8:54 AM, Danilo Krummrich wrote:
> > This is the series for the initial DRM Rust abstractions, including DRM
> > device /
> > driver, IOCTL, File and GEM object abstractions.
> >
> > This series has been posted previously, h
On Tue, 2025-04-08 at 17:42 +0100, David Woodhouse wrote:
> ISTR you said that if the proprietary driver does manage to use that
> port, then we could at least look at why nouveau doesn't?
Yes, but that is beyond my knowledge of Nouveau and GPU drivers.
> Could it even already be fixed in the r57
Hi there,
On Tue, 1 Apr 2025 at 20:53, Simon Ser wrote:
> On Tuesday, April 1st, 2025 at 17:14, Daniel Stone
> wrote:
> > 'plane' seems really incongruous here. The colorop can be created for
> > any number of planes, but we're setting it to always be bound to a
> > single plane at init, and th
On Tue, 2025-04-08 at 15:59 +, Timur Tabi wrote:
> On Mon, 2025-04-07 at 21:09 +0100, David Woodhouse wrote:
> > It *was* working, as long as I could tolerate it being scaled to 200% like
> > the internal display. It *did* light up the external display just fine.
>
> Ok, the only thing I can t
Hi,
On Tue, Apr 08, 2025 at 03:57:22PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 08.04.25 um 15:20 schrieb Marcus Folkesson:
> [...]
> > >
> > > > +static int st7571_set_pixel_format(struct st7571_device *st7571,
> > > > + u32 pixel_format)
> > > > +{
> > > > +
On Tue, Apr 08, 2025 at 09:04:28AM +0200, Marcus Folkesson wrote:
> Sitronix ST7571 is a 4bit gray scale dot matrix LCD controller.
>
> Signed-off-by: Marcus Folkesson
Reviewed-by: Conor Dooley
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On Tue, 08. Apr 14:22, Christian König wrote:
> Am 08.04.25 um 13:54 schrieb Fedor Pchelkin:
> > If user can request an arbitrary size value then we should use __GFP_NOWARN
> > and back on the allocator to return NULL in case it doesn't even try to
> > satisfy an enormous memory allocation request
On Tue, Apr 08, 2025 at 11:27:58AM +0300, Jani Nikula wrote:
> On Mon, 07 Apr 2025, Jason Gunthorpe wrote:
> > On Mon, Apr 07, 2025 at 10:17:40AM +0300, Jani Nikula wrote:
> >
> >> Even with Jason's idea [1], you *still* have to start small and opt-in
> >> (i.e. the patch series at hand). You can'
Hi Tomi,
On 08/04/25 12:39, Tomi Valkeinen wrote:
> Hi,
>
> On 08/04/2025 09:09, Tomi Valkeinen wrote:
>> Hi,
>>
>> On 07/04/2025 20:59, Aradhya Bhatia wrote:
>>> Hi Tomi,
>>>
>>> On 02/04/25 19:00, Tomi Valkeinen wrote:
The docs say about mode_valid():
"it is not allowed to look a
On Mon, 2025-04-07 at 21:09 +0100, David Woodhouse wrote:
> It *was* working, as long as I could tolerate it being scaled to 200% like
> the internal display. It *did* light up the external display just fine.
Ok, the only thing I can think of is to do a bisect between 6.13.4 and
6.13.6 to determin
On Mon, 2025-04-07 at 18:47 +, Timur Tabi wrote:
> On Mon, 2025-04-07 at 19:39 +0100, David Woodhouse wrote:
> > I'd already upgraded to 6.14, and have just rebooted into 6.14.1 with
> > that option enabled. I now have the four files in debugfs of which you
> > spoke, but I'm assuming you don't
Hi,
On Mon, Apr 07, 2025 at 05:27:39PM +0200, Luca Ceresoli wrote:
> This is the new API for allocating DRM bridges.
>
> The devm lifetime management of this driver is peculiar. The underlying
> device for the panel_bridge is the panel, and the devm lifetime is tied the
> panel device (panel->dev
Document the compatible value for Saef SFTO340XC panels.
Signed-off-by: Kory Maincent
---
Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml
b/Documentatio
Add the dsi-lanes property to specify the number of DSI lanes used by the
panel. This allows configuring the panel for either two, three or four
lanes.
Signed-off-by: Kory Maincent
---
Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml | 5 +
1 file changed, 5 insertions(+)
Enable support for two-lane configuration which is done by setting the
LANSEL_SW_EN and LANSEL_SW bits in the Pad Control register.
Use the dsi-lanes device tree parameter to configure the number of lanes.
The default configuration remains set to four lanes.
Signed-off-by: Kory Maincent
---
dri
This prevents a user bug in lima reported in [1].
I'm not sure this is the entire bug fix, but Christian had also
suggested we implement this callback in a previous review [2].
I took the amdgpu implementation as a base for this.
I noticed that most other drivers don't implement this though, in
pa
Add support for Saef Technology Limited SFTO340XC LCD panel.
Signed-off-by: Kory Maincent
---
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 232 ++
1 file changed, 232 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
b/drivers/gpu/drm/panel/pan
hi,
On Tue, Apr 08, 2025 at 05:27:00PM +0200, Kory Maincent wrote:
> Add the dsi-lanes property to specify the number of DSI lanes used by the
> panel. This allows configuring the panel for either two, three or four
> lanes.
>
> Signed-off-by: Kory Maincent
> ---
> Documentation/devicetree/bind
On Tue, Apr 08, 2025 at 04:57:44PM +0200, Maxime Ripard wrote:
Hi Lucas,
On Tue, Apr 08, 2025 at 09:34:22AM -0500, Lucas De Marchi wrote:
On Tue, Apr 08, 2025 at 02:20:06PM +0200, Maxime Ripard wrote:
> Commit 9d7d7c3c9a19 ("panel/auo-a030jtn01: Use refcounted allocation in
> place of devm_kzal
On Tue, 08 Apr 2025 09:34:06 +0200, Maxime Ripard wrote:
> Here's a series that fixes some memory leaks in our kunit tests that
> eventually show up in kmemleak.
>
> Let me know what you think,
> Maxime
>
>
> [...]
Applied to misc/kernel.git (drm-misc-fixes).
Thanks!
Maxime
On 4/4/2025 5:13 PM, Jeff Hugo wrote:
On 4/1/2025 9:59 AM, Maciej Falkowski wrote:
From: Andrzej Kacprowski
Add sysfs files that show maximum and current
frequency of the NPU's data processing unit.
New sysfs entries:
- npu_max_frequency_mhz
Don't you have an ioctl to get this, which is fix
On Wed, 2 Apr 2025 12:54:29 +0100
Adrián Larumbe wrote:
> +static void panthor_gem_debugfs_bo_print(struct panthor_gem_object *bo,
> + struct seq_file *m,
> + struct gem_size_totals *totals)
> +{
> + unsigned int refco
On 4/3/2025 10:38 PM, Lizhi Hou wrote:
On 4/1/25 08:58, Maciej Falkowski wrote:
From: Karol Wachowski
This commit bumps FW Boot API to 3.28.3.
Bump FW Boot API ...
Please see:
https://www.kernel.org/doc/html/v6.14/process/submitting-patches.html
Thank you for pointing this. Jeff also poi
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