The SUBMIT_ERROR() macro turns the error code negative. This extra '-'
operation turns it back to positive EINVAL again. The error code is
passed to ERR_PTR() and since positive values are not an IS_ERR() it
eventually will lead to an oops. Delete the '-'.
Fixes: 866e43b945bf ("drm/msm: UAPI er
If "rpc" is an error pointer then return directly. Otherwise it leads
to an error pointer dereference.
Fixes: 50f290053d79 ("drm/nouveau: support handling the return of large GSP
message")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c | 1 +
1 file changed, 1
Dmitry Osipenko writes:
> On 2/14/25 18:16, Sergio Lopez wrote:
>> diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
>> b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
>> index
>> c33c057365f85a2ace536f91655c903036827312..4b49635b4fe1d4256f219823341cef8e5fa8f029
>> 100644
>> --- a/drivers/gpu/drm/v
> -Original Message-
> From: Murthy, Arun R
> Sent: Tuesday, January 28, 2025 9:21 PM
> To: intel...@lists.freedesktop.org; intel-...@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: Kandpal, Suraj ; dmitry.barysh...@linaro.org;
> Murthy, Arun R
> Subject: [PATCH v8 14/14
Hi Cristian,
On Sat, 15 Feb 2025 02:55:39 +0200, Cristian Ciocaltea wrote:
>The HDMI1 PHY PLL clock source cannot be added directly to vop node in
>rk3588-base.dtsi, along with the HDMI0 related one, because HDMI1 is an
>optional feature and its PHY node belongs to a separate (extra) DT file.
>
>T
Most kernel configs enable multiple Tegra SoC generations, causing this
typo to go unnoticed. But in the case where a kernel config is strictly
for Tegra186, this is a problem.
Fixes: 989863d7cbe5 ("drm/nouveau/pmu: select implementation based on available
firmware")
Signed-off-by: Aaron Kling
-
On Sun, Feb 16, 2025 at 12:24 PM Jonathan Corbet wrote:
>
> Andres Urian Florez writes:
>
> > Fixed spelling mistake identified by codespell in the drm-uapi
> > documentation
> >
> > Signed-off-by: Andres Urian Florez
> > ---
> > Documentation/gpu/drm-uapi.rst | 2 +-
> > 1 file changed, 1 inse
Hi,
I have tested revision 4 of the patch series on my DG2 setup with drm_info &
Mutter MR https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/4063. The
patches apply cleanly, and the new uapi IN_FORMATS_ASYNC works fine. Though I
had some observation whether the unsupported Async modifiers
> -Original Message-
> From: Murthy, Arun R
> Sent: Tuesday, January 28, 2025 9:21 PM
> To: intel...@lists.freedesktop.org; intel-...@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: Kandpal, Suraj ; dmitry.barysh...@linaro.org;
> Murthy, Arun R
> Subject: [PATCH v8 13/14
On Fri, 14 Feb 2025 at 21:19, Boris Brezillon
wrote:
>
> On Fri, 14 Feb 2025 18:37:14 +0530
> Sumit Garg wrote:
>
> > On Fri, 14 Feb 2025 at 15:37, Jens Wiklander
> > wrote:
> > >
> > > Hi,
> > >
> > > On Thu, Feb 13, 2025 at 6:39 PM Daniel Stone wrote:
> > > >
> > > > Hi,
> > > >
> > > > On T
> -Original Message-
> From: Kandpal, Suraj
> Sent: Friday, February 14, 2025 3:54 PM
> To: Kandpal, Suraj ; Murthy, Arun R
> ; intel...@lists.freedesktop.org; intel-
> g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: dmitry.barysh...@linaro.org
> Subject: RE: [PATCH v8 0
We have enabled PROVE_LOCKING (which enables LOCKDEP) in drm-ci.
This will output warnings when kernel locking errors are encountered
and will continue executing tests. To detect if lockdep has been
triggered, check the debug_locks value in /proc/lockdep_stats after
the tests have run. When debug_l
Enable CONFIG_DEBUG_WW_MUTEX_SLOWPATH for mutex
slowpath debugging.
Signed-off-by: Vignesh Raman
---
v2:
- New patch in the series.
v3:
- No changes.
---
drivers/gpu/drm/ci/build.yml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/ci/build.yml b/d
Move common job configuration for software-driver
stage jobs to separate job.
Signed-off-by: Vignesh Raman
---
v2:
- New patch in the series.
v3:
- No changes.
---
drivers/gpu/drm/ci/test.yml | 59 +++--
1 file changed, 24 insertions(+), 35 deletions(-)
di
This patch series enables lockdep detection in drm-ci. Any lockdep
failures will be shown as warnings in the pipeline. This series
also enables CONFIG_DEBUG_WW_MUTEX_SLOWPATH for mutex slowpath
debugging and refactors software-driver stage jobs.
Test run with this series,
https://gitlab.freedeskto
> -Original Message-
> From: Murthy, Arun R
> Sent: Wednesday, February 12, 2025 9:48 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Syrjala,
> Ville ; Murthy, Arun R
> Subject: [PATCH v5 3/3]
Hi Andi,
> -Original Message-
> From: Andi Shyti
> Sent: Friday, February 14, 2025 6:05 AM
> To: intel-gfx ; dri-devel de...@lists.freedesktop.org>
> Cc: Andi Shyti ; Karas, Krzysztof
> ; Gote, Nitin R
> Subject: [PATCH v2] drm/i915/gt: Replace kmap with its safer kmap_local_page
> cou
> -Original Message-
> From: Murthy, Arun R
> Sent: Tuesday, January 28, 2025 9:21 PM
> To: intel...@lists.freedesktop.org; intel-...@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: Kandpal, Suraj ; dmitry.barysh...@linaro.org;
> Murthy, Arun R
> Subject: [PATCH v8 10/14
Hi all,
Today's linux-next merge of the drm-xe tree got a conflict in:
drivers/gpu/drm/xe/display/xe_display.c
between commit:
1b242ceec536 ("drm/i915/audio: convert to struct intel_display")
from the drm-intel tree and commit:
8b3f09fb44a3 ("drm/xe: Fix xe_display_fini() calls")
from
On Mon, 17 Feb 2025 at 01:06, Marijn Suijten
wrote:
>
> On 2025-02-13 04:13:06, Dmitry Baryshkov wrote:
> > On Wed, Feb 12, 2025 at 05:13:08PM -0800, Abhinav Kumar wrote:
> > > Hi Marijn
> > >
> > > On 2/10/2025 2:17 PM, Abhinav Kumar wrote:
> > > >
> > > >
> > > > On 2/10/2025 6:24 AM, Dmitry Bar
On Tue, Feb 11, 2025 at 09:33:54AM +0100, David Hildenbrand wrote:
> On 11.02.25 06:00, Andrew Morton wrote:
> > On Mon, 10 Feb 2025 20:37:45 +0100 David Hildenbrand
> > wrote:
> >
> > > The single "real" user in the tree of make_device_exclusive_range() always
> > > requests making only a singl
On 2025-02-13 04:13:06, Dmitry Baryshkov wrote:
> On Wed, Feb 12, 2025 at 05:13:08PM -0800, Abhinav Kumar wrote:
> > Hi Marijn
> >
> > On 2/10/2025 2:17 PM, Abhinav Kumar wrote:
> > >
> > >
> > > On 2/10/2025 6:24 AM, Dmitry Baryshkov wrote:
> > > > On Mon, Feb 10, 2025 at 01:54:29PM +0100, Mari
Hello dri maintainers/developers,
This is a 31-day syzbot report for the dri subsystem.
All related reports/information can be found at:
https://syzkaller.appspot.com/upstream/s/dri
During the period, 0 new issues were detected and 0 were fixed.
In total, 21 issues are still open and 32 have alre
Similar issue in panthor_fdinfo_gather_group_samples()
drivers/gpu/drm/panthor/panthor_sched.c:2883
panthor_fdinfo_gather_group_samples() warn: sleeping in atomic context
regards,
dan carpenter
Hello Adrián Larumbe,
Commit 434e5ca5b5d7 ("drm/panthor: Expose size of driver internal
BO's over fdinfo") from Jan 30, 2025 (linux-next), leads to the
following Smatch static checker warning:
drivers/gpu/drm/panthor/panthor_mmu.c:1968 panthor_vm_heaps_sizes()
warn: sleeping in at
Like earlier DE versions, the DE33 has a CSC (Color Space Correction)
module. which provides color space conversion between BT2020/BT709, and
dynamic range conversion between SDR/ST2084/HLG.
Add support for the DE33.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
Tested-by: Philippe
From: Jernej Skrabec
Like the DE3, the DE33 has a FMT (formatter) module, which
provides YUV444 to YUV422/YUV420 conversion, format re-mapping and color
depth conversion, although the DE33 module appears significantly more
capable, including up to 4K video support.
Add support for the DE33.
Sig
From: Jernej Skrabec
The vi_scaler appears to be used in preference to the ui_scaler module
for hardware video scaling in the DE33.
Enable support for this scaler.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 19 +++
The DE33 is a newer version of the Allwinner Display Engine IP block,
found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already
supported by the mainline driver.
The DE33 in the H616 has mixer0 and writeback units. The clocks
and resets required are identical to the H3 and H5 respective
From: Jernej Skrabec
The DE33 is a newer version of the Allwinner Display Engine IP block,
found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already
supported by the mainline driver.
Notable features (from the H616 datasheet and implemented):
- 4096 x 2048 (4K) output support
- AFBC A
The Allwinner H616 and variants have a new display engine revision
(DE33).
The mixer configuration registers are significantly different to the DE3
and DE2 revisions, being split into separate top and display blocks,
therefore a fallback for the mixer compatible is not provided.
Add a display eng
The Allwinner H616 and variants have a new display engine revision
(DE33).
Add a clock binding for the DE33.
Signed-off-by: Ryan Walklin
Acked-by: Conor Dooley
Reviewed-by: Chen-Yu Tsai
---
Changelog v2..v3:
- Separate content into three patches for three separate subsystems
---
.../devicetr
From: Jernej Skrabec
Buffers, compressed with AFBC, are supported by the DE3 and above, and
are generally more efficient for memory transfers. Add support for them.
Currently it's implemented only for VI layers, but vendor code and
documentation suggest UI layers can have them too. However, I ha
The Allwinner H616 and variants have a new display engine revision
(DE33).
Add a display engine bus binding for the DE33 and increase reg maxItems
to 3 to accommodate additional register blocks.
Signed-off-by: Ryan Walklin
Acked-by: Conor Dooley
Reviewed-by: Chen-Yu Tsai
---
Changelog v1..v2:
From: Jernej Skrabec
Use the new blender register lookup function where required in the layer
commit and update code.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
Changelog v2..v3:
- Refactor for 6.11 layer init/modesetting changes
---
drivers/gpu/drm/sun4i/sun8i_mixer.c
From: Jernej Skrabec
The DE2 and DE3 engines have a blender register range within the
mixer engine register map, whereas the DE33 separates this out into
a separate display group.
Prepare for this by adding a function to look the blender reference up,
with a subsequent patch to add a conditional
From: Jernej Skrabec
If the video scaler is required, then it is obligatory to set the
relevant register to enable it, so move this to the
sun8i_vi_scaler_setup() function.
This simplifies the alternate case (scaler not required) so replace the
vi_scaler_enable() function with a vi_scaler_disabl
From: Jernej Skrabec
Now that YUV formats are available, enable support in the VI scaler.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
Changelog v4..v5:
- Add commit description
---
drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 85 +
1 file changed, 58 insert
From: Jernej Skrabec
Now that the DE variant can be selected by enum, take the oppportunity
to factor out some common initialisation code to a separate function.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
Reviewed-by: Andre Przywara
---
Changelog v1..v2:
- Combine base registe
From: Jernej Skrabec
The Allwinner DE2 and DE3 display engine mixers are currently identified
by a simple boolean flag. This will not scale to support additional DE
variants.
Convert the boolean flag to an enum.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
Reviewed-by: Andre Przy
From: Jernej Skrabec
Account for U/V channel subsampling by reducing the dot clock and
resolution with a divider in the DE3 timing controller if a YUV format
is selected.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
--
Changelog v5..v6:
- Update to obtain color format from mixer
From: Jernej Skrabec
Add coefficients and support for YUV formats to the display engine
colorspace and dynamic range correction submodule.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
--
Changelog v6..v7:
- Restore sun8i_csc_get_de3_yuv_table() helper omitted from previous versio
From: Jernej Skrabec
Configuration of the DE3 colorspace and dynamic range correction module
requires knowledge of the current video format and encoding.
Pass the display mixer by reference to the csc setup function, rather
than the register map alone, to allow access to this information.
Signe
Because the format is stored in the mixer configuration, the formatter
module setup function no longer requires the color format to be passed
separately.
Remove this from the setup function declaration and access the format
via the mixer object.
Signed-off-by: Ryan Walklin
--
Changelog v5..v6:
From: Jernej Skrabec
The mixer in the DE3 display engine supports YUV 8 and 10 bit
formats in addition to 8-bit RGB. Add the required register
configuration and format enumeration callback functions to the mixer,
and store the in-use output format (defaulting to RGB) and color
encoding in the mix
From: Jernej Skrabec
Only the DE3 (and newer) display engines have a formatter module. This
could be inferred from the is_de3 flag alone, however this will not
scale with addition of future DE versions in subsequent patches.
Add a separate flag to signal this in the mixer configuration.
Signed-
From: Jernej Skrabec
The DE3 display engine supports YUV formats in addition to RGB.
Add an optional format enumeration function to the engine.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
drivers/gpu/drm/sun4i/sunxi_engine.h | 29
1 file changed
From: Jernej Skrabec
The display engine formatter (FMT) module is present in the DE3 engine
and provides YUV444 to YUV422/YUV420 conversion, format re-mapping and
color depth conversion.
Add support for this module.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
drivers/gpu/dr
From: Jernej Skrabec
drm_universal_plane_init() can already call some callbacks, like
format_mod_supported, during initialization. Because of that, fields
should be initialized beforehand.
Signed-off-by: Jernej Skrabec
Co-developed-by: Ryan Walklin
Signed-off-by: Ryan Walklin
Reviewed-by: Che
From: Jernej Skrabec
At the moment the colour space conversion is handled by two functions:
one to setup the conversion parameters, and another one to enable the
conversion. Merging both into one gives more flexibility for upcoming
extensions to support whole YUV pipelines, in the DE33.
Signed-o
From: Jernej Skrabec
Currently, only VI layer calls CSC setup function. This comes from DE2
limitation, which doesn't have CSC unit for UI layers. However, DE3 has
separate CSC units for each layer. This allows display pipeline to make
output signal in different color spaces. To support both use
From: Jernej Skrabec
Currently, CSC module takes care only for converting YUV to RGB.
However, DE3 is more suited to work in YUV color space. Change CSC mode
argument to format type to be more neutral. New argument only tells
layer format type and doesn't imply output type.
This commit doesn't m
Hi All,
v7 of this patch adding support for the Allwinner DE33 display engine, used in
the H616 family of SoCs. Apologies for the short interval between versions but
a compile error due to a missed helper function in patch 11 snuck by me. v7
only differs from v6 in adding this back.
v6 include
On Sun, 16 Feb 2025, at 9:50 PM, Ryan Walklin wrote:
> From: Jernej Skrabec
>
> Add coefficients and support for YUV formats to the display engine
> colorspace and dynamic range correction submodule.
>
> Signed-off-by: Jernej Skrabec
> Signed-off-by: Ryan Walklin
> ---
Apologies this patch inad
On Wed, 12 Feb 2025 09:58:42 +0200
Svyatoslav Ryhel wrote:
> Add ability to fill pdata from device tree. Common stuff is
> filled from core driver and then pdata is filled per-device
> since all cells are optional.
>
> Signed-off-by: Svyatoslav Ryhel
Focusing on just the IIO bit. (backlog of r
Hi Arun,
On 1/28/2025 9:21 PM, Arun R Murthy wrote:
Statistics is generated from the image frame that is coming to display
and an event is sent to user after reading this histogram data.
v2: forward declaration in header file along with error handling (Jani)
v3: Replaced i915 with intel_display
On 14/02/2025 16:08, Krzysztof Kozlowski wrote:
> Add bitfields for PHY_CMN_CLK_CFG0 and PHY_CMN_CLK_CFG1 registers to
> avoid hard-coding bit masks and shifts and make the code a bit more
> readable. While touching the lines in dsi_7nm_pll_save_state()
> resulting cached->pix_clk_div assignment w
From: Jernej Skrabec
The DE2 and DE3 engines have a blender register range within the
mixer engine register map, whereas the DE33 separates this out into
a separate display group.
Prepare for this by adding a function to look the blender reference up,
with a subsequent patch to add a conditional
The Allwinner H616 and variants have a new display engine revision
(DE33).
Add a clock binding for the DE33.
Signed-off-by: Ryan Walklin
Acked-by: Conor Dooley
Reviewed-by: Chen-Yu Tsai
---
Changelog v2..v3:
- Separate content into three patches for three separate subsystems
---
.../devicetr
From: Jernej Skrabec
If the video scaler is required, then it is obligatory to set the
relevant register to enable it, so move this to the
sun8i_vi_scaler_setup() function.
This simplifies the alternate case (scaler not required) so replace the
vi_scaler_enable() function with a vi_scaler_disabl
The DE33 is a newer version of the Allwinner Display Engine IP block,
found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already
supported by the mainline driver.
The DE33 in the H616 has mixer0 and writeback units. The clocks
and resets required are identical to the H3 and H5 respective
From: Jernej Skrabec
Buffers, compressed with AFBC, are supported by the DE3 and above, and
are generally more efficient for memory transfers. Add support for them.
Currently it's implemented only for VI layers, but vendor code and
documentation suggest UI layers can have them too. However, I ha
From: Jernej Skrabec
Use the new blender register lookup function where required in the layer
commit and update code.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
Changelog v2..v3:
- Refactor for 6.11 layer init/modesetting changes
---
drivers/gpu/drm/sun4i/sun8i_mixer.c
The Allwinner H616 and variants have a new display engine revision
(DE33).
Add a display engine bus binding for the DE33 and increase reg maxItems
to 3 to accommodate additional register blocks.
Signed-off-by: Ryan Walklin
Acked-by: Conor Dooley
Reviewed-by: Chen-Yu Tsai
---
Changelog v1..v2:
From: Jernej Skrabec
The DE33 is a newer version of the Allwinner Display Engine IP block,
found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already
supported by the mainline driver.
Notable features (from the H616 datasheet and implemented):
- 4096 x 2048 (4K) output support
- AFBC A
Hi Doug,
On 2025/1/24 11:13, Doug Anderson wrote:
Hi,
On Thu, Jan 23, 2025 at 3:25 AM Dmitry Baryshkov
wrote:
On Thu, Jan 23, 2025 at 06:07:40PM +0800, Damon Ding wrote:
The main modification is moving the DP AUX initialization from function
analogix_dp_bind() to analogix_dp_probe(). In ord
From: Jernej Skrabec
Now that the DE variant can be selected by enum, take the oppportunity
to factor out some common initialisation code to a separate function.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
Reviewed-by: Andre Przywara
---
Changelog v1..v2:
- Combine base registe
From: Jernej Skrabec
At the moment the colour space conversion is handled by two functions:
one to setup the conversion parameters, and another one to enable the
conversion. Merging both into one gives more flexibility for upcoming
extensions to support whole YUV pipelines, in the DE33.
Signed-o
From: Jernej Skrabec
The mixer in the DE3 display engine supports YUV 8 and 10 bit
formats in addition to 8-bit RGB. Add the required register
configuration and format enumeration callback functions to the mixer,
and store the in-use output format (defaulting to RGB) and color
encoding in the mix
From: Jernej Skrabec
Currently, only VI layer calls CSC setup function. This comes from DE2
limitation, which doesn't have CSC unit for UI layers. However, DE3 has
separate CSC units for each layer. This allows display pipeline to make
output signal in different color spaces. To support both use
From: Jernej Skrabec
Add coefficients and support for YUV formats to the display engine
colorspace and dynamic range correction submodule.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 151 +-
1 file changed, 149
From: Jernej Skrabec
Configuration of the DE3 colorspace and dynamic range correction module
requires knowledge of the current video format and encoding.
Pass the display mixer by reference to the csc setup function, rather
than the register map alone, to allow access to this information.
Signe
Because the format is stored in the mixer configuration, the formatter
module setup function no longer requires the color format to be passed
separately.
Remove this from the setup function declaration and access the format
via the mixer object.
Signed-off-by: Ryan Walklin
--
Changelog v5..v6:
From: Jernej Skrabec
Account for U/V channel subsampling by reducing the dot clock and
resolution with a divider in the DE3 timing controller if a YUV format
is selected.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
--
Changelog v5..v6:
- Update to obtain color format from mixer
From: Jernej Skrabec
Only the DE3 (and newer) display engines have a formatter module. This
could be inferred from the is_de3 flag alone, however this will not
scale with addition of future DE versions in subsequent patches.
Add a separate flag to signal this in the mixer configuration.
Signed-
From: Jernej Skrabec
Currently, CSC module takes care only for converting YUV to RGB.
However, DE3 is more suited to work in YUV color space. Change CSC mode
argument to format type to be more neutral. New argument only tells
layer format type and doesn't imply output type.
This commit doesn't m
Subject: [PATCH v6 00/27] drm: sun4i: add Display Engine 3.3 (DE33) support
Hi All,
v6 of this patch adding support for the Allwinner DE33 display engine, used in
the H616 family of SoCs. v6 includes some small fixes to the device tree
documentation, improves naming of an enum type, moves color
Like earlier DE versions, the DE33 has a CSC (Color Space Correction)
module. which provides color space conversion between BT2020/BT709, and
dynamic range conversion between SDR/ST2084/HLG.
Add support for the DE33.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
Tested-by: Philippe
From: Jernej Skrabec
Like the DE3, the DE33 has a FMT (formatter) module, which
provides YUV444 to YUV422/YUV420 conversion, format re-mapping and color
depth conversion, although the DE33 module appears significantly more
capable, including up to 4K video support.
Add support for the DE33.
Sig
From: Jernej Skrabec
The vi_scaler appears to be used in preference to the ui_scaler module
for hardware video scaling in the DE33.
Enable support for this scaler.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 19 +++
The Allwinner H616 and variants have a new display engine revision
(DE33).
The mixer configuration registers are significantly different to the DE3
and DE2 revisions, being split into separate top and display blocks,
therefore a fallback for the mixer compatible is not provided.
Add a display eng
From: Jernej Skrabec
The Allwinner DE2 and DE3 display engine mixers are currently identified
by a simple boolean flag. This will not scale to support additional DE
variants.
Convert the boolean flag to an enum.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
Reviewed-by: Andre Przy
From: Jernej Skrabec
Now that YUV formats are available, enable support in the VI scaler.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
Changelog v4..v5:
- Add commit description
---
drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 85 +
1 file changed, 58 insert
From: Jernej Skrabec
The DE3 display engine supports YUV formats in addition to RGB.
Add an optional format enumeration function to the engine.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
drivers/gpu/drm/sun4i/sunxi_engine.h | 29
1 file changed
From: Jernej Skrabec
The display engine formatter (FMT) module is present in the DE3 engine
and provides YUV444 to YUV422/YUV420 conversion, format re-mapping and
color depth conversion.
Add support for this module.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
drivers/gpu/dr
From: Jernej Skrabec
drm_universal_plane_init() can already call some callbacks, like
format_mod_supported, during initialization. Because of that, fields
should be initialized beforehand.
Signed-off-by: Jernej Skrabec
Co-developed-by: Ryan Walklin
Signed-off-by: Ryan Walklin
Reviewed-by: Che
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