From: Jernej Skrabec <jernej.skra...@gmail.com>

Configuration of the DE3 colorspace and dynamic range correction module
requires knowledge of the current video format and encoding.

Pass the display mixer by reference to the csc setup function, rather
than the register map alone, to allow access to this information.

Signed-off-by: Jernej Skrabec <jernej.skra...@gmail.com>
Signed-off-by: Ryan Walklin <r...@testtoast.com>

Changelog v5..v6:
- Pass mixer instead of engine now that mixer holds color information.
---
 drivers/gpu/drm/sun4i/sun8i_csc.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c 
b/drivers/gpu/drm/sun4i/sun8i_csc.c
index 558f7a4c1354e..7f3dc6a7b550d 100644
--- a/drivers/gpu/drm/sun4i/sun8i_csc.c
+++ b/drivers/gpu/drm/sun4i/sun8i_csc.c
@@ -148,17 +148,19 @@ static void sun8i_csc_setup(struct regmap *map, u32 base,
        regmap_write(map, SUN8I_CSC_CTRL(base), val);
 }
 
-static void sun8i_de3_ccsc_setup(struct regmap *map, int layer,
+static void sun8i_de3_ccsc_setup(struct sun8i_mixer *mixer, int layer,
                                 enum sun8i_format_type fmt_type,
                                 enum drm_color_encoding encoding,
                                 enum drm_color_range range)
 {
        u32 addr, val, mask;
+       struct regmap *map;
        const u32 *table;
        int i;
 
        mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer);
        table = yuv2rgb_de3[range][encoding];
+       map = mixer->engine.regs;
 
        switch (fmt_type) {
        case FORMAT_TYPE_RGB:
@@ -204,7 +206,7 @@ void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int 
layer,
        u32 base;
 
        if (mixer->cfg->is_de3) {
-               sun8i_de3_ccsc_setup(mixer->engine.regs, layer,
+               sun8i_de3_ccsc_setup(mixer, layer,
                                     fmt_type, encoding, range);
                return;
        }
-- 
2.48.1

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