On 08/01/2025 17:15, Alexandre Mergnat wrote:
>
> +&i2c1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-div = <2>;
> + clock-frequency = <10>;
> + pinctrl-0 = <&i2c1_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + it66121_hdmi:
On 08/01/2025 17:15, Alexandre Mergnat wrote:
> Build Startek KD070FHFID015 panel driver. This MIPI-DSI display
> can be used for the mt8365-evk board for example.
>
Squash the patches. It's one logical change to bring config optiosn for
display on your boards. Not each change per one symbol.
Be
On 08/01/2025 21:39, Akhil P Oommen wrote:
ACD a.k.a Adaptive Clock Distribution is a feature which helps to reduce
the power consumption. In some chipsets, it is also a requirement to
support higher GPU frequencies. This patch adds support for GPU ACD by
sending necessary data to GMU and AOSS. T
On 08/01/2025 17:15, Alexandre Mergnat wrote:
> Enable this feature for the i350-evk HDMI connector support.
git grep -i i350-evk - zero results. Please use some recognizable names.
I have no clue where to even look for it - which vendor.
>
> Signed-off-by: Alexandre Mergnat
> ---
> arch/arm64
On Wed, Jan 8, 2025 at 5:54 PM Simona Vetter wrote:
>
> On Tue, Dec 17, 2024 at 11:07:37AM +0100, Jens Wiklander wrote:
> > Add restricted memory allocation to the TEE subsystem.
> >
> > Restricted memory refers to memory buffers behind a hardware enforced
> > firewall. It is not accessible to the
On Wed, Jan 08, 2025 at 07:44:54PM +0100, Simona Vetter wrote:
> On Wed, Jan 08, 2025 at 12:22:27PM -0400, Jason Gunthorpe wrote:
> > On Wed, Jan 08, 2025 at 04:25:54PM +0100, Christian König wrote:
> > > Am 08.01.25 um 15:58 schrieb Jason Gunthorpe:
> > > > I have imagined a staged approach were D
he check of statment "i" out of V value check loop
- Link to v1:
https://lore.kernel.org/r/20250108-fix-hdcp-v-comp-v1-1-940481182...@ite.com.tw
---
drivers/gpu/drm/bridge/ite-it6505.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/i
Hi Damon,
At 2025-01-09 11:27:10, "Damon Ding" wrote:
>According to the comments in include/drm/drm_print.h, the DRM_...()
>functions are deprecated in favor of drm_...() or dev_...() functions.
>
>Use drm_err()/drm_dbg_core()/drm_dbg_kms() instead of
>DRM_DEV_ERROR()/DRM_ERROR()/DRM_DEV_DEBUG()
On Wed, 8 Jan 2025 at 22:27, Simona Vetter wrote:
>
> On Tue, Dec 24, 2024 at 12:05:19PM +0530, Sumit Garg wrote:
> > Hi Simona,
> >
> > On Wed, 18 Dec 2024 at 16:36, Simona Vetter wrote:
> > >
> > > On Tue, Dec 17, 2024 at 11:07:36AM +0100, Jens Wiklander wrote:
> > > > Hi,
> > > >
> > > > This
> > > 5) iommufd and kvm are both using CPU addresses without DMA. No
> > > exporter mapping is possible
> >
> > We have customers using both KVM and XEN with DMA-buf, so I can clearly
> > confirm that this isn't true.
>
> Today they are mmaping the dma-buf into a VMA and then using KVM's
> follo
Hi all,
On Mon, 16 Dec 2024 18:38:01 +1100 Stephen Rothwell
wrote:
>
> On Mon, 25 Nov 2024 12:09:21 +1100 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the drm-xe tree got a conflict in:
> >
> > include/drm/intel/xe_pciids.h
> >
> > between commit:
> >
> > 493454445c95 (
On 12/18/2024 4:42 PM, Dmitry Baryshkov wrote:
> On Wed, Dec 18, 2024 at 03:54:28PM +0530, Ekansh Gupta wrote:
>> For registered buffers, fastrpc driver sends the buffer information
>> to remote subsystem. There is a problem with current implementation
>> where the page address is being sent w
On 1/8/2025 8:22 PM, Dmitry Baryshkov wrote:
On Wed, Jan 08, 2025 at 05:19:40PM -0800, Abhinav Kumar wrote:
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The driver isn't supposed to consult crtc_state->active/active_check for
resource allocation. Instead all resources should be allocated
Jessica Zhang 于2025年1月9日周四 09:29写道：
>
>
>
> On 12/18/2024 11:49 PM, Jun Nie wrote:
> > Add the case to reserve multiple pairs mixers for high resolution.
> > Current code only supports one pair of mixer usage case. To support
> > quad-pipe usage case, two pairs of mixers are needed.
> >
> > Curren
When compiling allmodconfig (CONFIG_WERROR=y) with clang-19, see the
following errors:
.../display/dc/dml2/display_mode_core.c:6268:13: warning: stack frame size
(3128) exceeds limit (3072) in 'dml_prefetch_check' [-Wframe-larger-than]
.../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The drm_atomic_helper_check() calls drm_atomic_helper_check_modeset()
insternally. Document that corresponding restrictions also apply to the
insternally ---> internally
drivers that call the former function (as it's easy to miss the
document
On 1/8/2025 8:26 PM, Dmitry Baryshkov wrote:
On Wed, Jan 08, 2025 at 08:11:27PM -0800, Abhinav Kumar wrote:
On 1/8/2025 6:27 PM, Abhinav Kumar wrote:
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The MSM driver uses drm_atomic_helper_check() which mandates that none
of the atomic_check
On Wed, Jan 08, 2025 at 09:30:26AM -0400, Jason Gunthorpe wrote:
> On Tue, Jan 07, 2025 at 10:27:15PM +0800, Xu Yilun wrote:
> > Add a flag for ioctl(VFIO_DEVICE_BIND_IOMMUFD) to mark a device as
> > for private assignment. For these private assigned devices, disallow
> > host accessing their MMIO
by: Dmitry Baryshkov
Signed-off-by: Hermes Wu
---
Changes in v2:
- pull the check of statment "i" out of V value check loop
- Link to v1:
https://lore.kernel.org/r/20250108-fix-hdcp-v-comp-v1-1-940481182...@ite.com.tw
---
drivers/gpu/drm/bridge/ite-it6505.c | 5 +++--
1 file changed
Jessica Zhang 于2025年1月9日周四 07:41写道：
>
>
>
> On 12/19/2024 2:09 PM, Dmitry Baryshkov wrote:
> > On Thu, Dec 19, 2024 at 03:49:22PM +0800, Jun Nie wrote:
> >> decide right side of a pair per last bit, in case of multiple
> >> mixer pairs.
> >
> > Proper English sentences, please. Also describe why,
On Wed, Jan 08, 2025 at 06:27:13PM -0800, Abhinav Kumar wrote:
>
>
> On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
> > The MSM driver uses drm_atomic_helper_check() which mandates that none
> > of the atomic_check() callbacks toggles crtc_state->mode_changed.
> > Perform corresponding check befo
On 9/1/25 13:42, Ben Skeggs wrote:
On 9/1/25 10:55, Dave Airlie wrote:
From: Dave Airlie
This is the 3rd iteration of this after talking to Ben and
Danilo, I think this makes sense now.
The fence sync logic doesn't handle a fence sync across devices
as it tries to write to a channel offset
On Wed, Jan 08, 2025 at 08:11:27PM -0800, Abhinav Kumar wrote:
>
>
> On 1/8/2025 6:27 PM, Abhinav Kumar wrote:
> >
> >
> > On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
> > > The MSM driver uses drm_atomic_helper_check() which mandates that none
> > > of the atomic_check() callbacks toggles cr
On Wed, Jan 08, 2025 at 05:19:40PM -0800, Abhinav Kumar wrote:
>
>
> On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
> > The driver isn't supposed to consult crtc_state->active/active_check for
> > resource allocation. Instead all resources should be allocated if
> > crtc_state->enabled is set. St
Hi Hermes,
On Thu, Jan 9, 2025 at 10:36 AM wrote:
>
> hi
> >
> >-Original Message-
> >From: Dmitry Baryshkov
> >Sent: Wednesday, January 8, 2025 6:43 PM
> >To: Hermes Wu (吳佳宏)
> >Cc: Andrzej Hajda ; Neil Armstrong
> >; Robert Foss ; Laurent
> >Pinchart ; Jonas Karlman
> >; Jernej Skr
On 1/8/2025 6:27 PM, Abhinav Kumar wrote:
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The MSM driver uses drm_atomic_helper_check() which mandates that none
of the atomic_check() callbacks toggles crtc_state->mode_changed.
Perform corresponding check before calling the drm_atomic_helper_
On 9/1/25 10:55, Dave Airlie wrote:
From: Dave Airlie
This is the 3rd iteration of this after talking to Ben and
Danilo, I think this makes sense now.
The fence sync logic doesn't handle a fence sync across devices
as it tries to write to a channel offset from one device into
the fence bo fro
According to the datasheet, setting the dig_clk_sel bit of CMN_REG(0097)
to 1'b1 selects LCPLL as the reference clock, while setting it to 1'b0
selects the ROPLL.
Signed-off-by: Damon Ding
Reviewed-by: Dmitry Baryshkov
---
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 4 ++--
1 file chang
The hdptxphy is a combo transmit-PHY for HDMI2.1 TMDS Link, FRL Link, DP
and eDP Link. Therefore, it is better to name it hdptxphy0 other than
hdptxphy_hdmi0, which will be referenced by both hdmi0 and edp0 nodes.
Acked-by: Rob Herring (Arm)
Signed-off-by: Damon Ding
---
.../bindings/display/ro
Add two new functions: one to find &analogix_dp_device.plat_data via
&drm_dp_aux, and the other to get &analogix_dp_device.aux. Both of them
serve for the function of getting panel from DP AUX bus, which is why
they are included in a single commit.
Signed-off-by: Damon Ding
---
drivers/gpu/drm/b
The hdptxphy is a combo transmit-PHY for HDMI2.1 TMDS Link, FRL Link, DP
and eDP Link. Therefore, it is better to name it hdptxphy0 other than
hdptxphy_hdmi0, which will be referenced by both hdmi0 and edp0 nodes.
Signed-off-by: Damon Ding
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
Add the necessary DT changes to enable eDP0 on RK3588S EVB1 board:
- Set pinctrl of pwm12 for backlight
- Enable edp0/hdptxphy0/vp2
- Add aux-bus/panel nodes
Signed-off-by: Damon Ding
---
Changes in v2:
- Remove brightness-levels and default-brightness-level properties in
backlight node.
- Ad
Add support for the eDP0 output on RK3588 SoC.
Signed-off-by: Damon Ding
---
Changes in v3:
- Remove currently unsupported property '#sound-dai-cells'
Changes in v4:
- Remove currently unsupported clock 'spdif'
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 28 +++
1 file
Expand enum analogix_dp_devtype with RK3588_EDP, and add max_link_rate
and max_lane_count configs for it.
Signed-off-by: Damon Ding
---
Changes in v5:
- Add the RK3588_EDP related modification in analogix_dp.h
- Move this commit above related commit on the Rockchip side
---
drivers/gpu/drm/bri
The raw edid for LP079QX1-SP0V panel model is:
00 ff ff ff ff ff ff 00 16 83 00 00 00 00 00 00
04 17 01 00 a5 10 0c 78 06 ef 05 a3 54 4c 99 26
0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 ea 4e 00 4c 60 00 14 80 0c 10
84 00 78 a0 00 00 00 18 00 00 00 10 00 00 00 00
00 00 00 00
RK3588 integrates the Analogix eDP 1.3 TX controller IP and the HDMI/eDP
TX Combo PHY based on a Samsung IP block. There are also two independent
eDP display interface with different address on RK3588 Soc.
The patch currently adds only the basic support, specifically RGB output
up to 4K@60Hz, with
Compared with RK3288/RK3399, the HBR2 link rate support is the main
improvement of RK3588 eDP TX controller, and there are also two
independent eDP display interfaces on RK3588 Soc.
The newly added 'apb' reset is to ensure the APB bus of eDP controller
works well on the RK3588 SoC.
Signed-off-by:
Move drm_of_find_panel_or_bridge() a little later and combine it with
component_add() into a new function rockchip_dp_link_panel(). The function
will serve as done_probing() callback of devm_of_dp_aux_populate_bus(),
aiding to support for obtaining the eDP panel via the DP AUX bus.
If failed to ge
The main modification is moving the DP AUX initialization from function
analogix_dp_bind() to analogix_dp_probe(). In order to get the EDID of
eDP panel during probing, it is also needed to advance PM operaions to
ensure that eDP controller and phy are prepared for AUX transmission.
Signed-off-by:
According to Documentation/devicetree/bindings/display/dp-aux-bus.yaml,
it is a good way to get panel through the DP AUX bus.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Damon Ding
---
Changes in v4:
- Move the dt-bindings commit before related driver commits
Changes in v5:
- Remove the unex
Adding the '_MASK' suffix to all registers in order to ensures consistency
in the naming convention for register macros throughout the file.
Signed-off-by: Damon Ding
Reviewed-by: Dmitry Baryshkov
---
Changes in v4:
- Split the older patch related to the renaming of registers into three
diff
There are two main modifications: one is expanding struct
rockchip_dp_chip_data to an array, and the other is adding
&rockchip_dp_chip_data.reg to separate different edp devices.
Signed-off-by: Damon Ding
---
.../gpu/drm/rockchip/analogix_dp-rockchip.c | 41 +++
1 file changed,
Add support to configurate link rate, lane count, voltage swing and
pre-emphasis with phy_configure(). It is helpful in application scenarios
where analogix controller is mixed with the phy of other vendors.
Signed-off-by: Damon Ding
---
Changes in v2:
- remove needless assignments for phy_conf
The formalized struct definition will makes grf field operations more
concise and easier to extend.
Signed-off-by: Damon Ding
---
Changes in v2:
- Initialize struct rockchip_dp_chip_data rk3399_edp/rk3288_dp in order
of its members
---
.../gpu/drm/rockchip/analogix_dp-rockchip.c | 77 +
According to the comments in include/drm/drm_print.h, the DRM_...()
functions are deprecated in favor of drm_...() or dev_...() functions.
Use drm_err()/drm_dbg_core()/drm_dbg_kms() instead of
DRM_DEV_ERROR()/DRM_ERROR()/DRM_DEV_DEBUG()/DRM_DEBUG_KMS() after
rockchip_dp_bind() is called, and repla
The PHY is based on a Samsung IP block that supports HDMI 2.1, and eDP
1.4b. RK3588 integrates the Analogix eDP 1.3 TX controller IP and the
HDMI/eDP TX Combo PHY to support eDP display.
Add basic support for RBR/HBR/HBR2 link rates, and the voltage swing and
pre-emphasis configurations of each li
Complete the register names of CMN_REG(0081) and CMN_REG(0087) to their
full version, and it can help to better match the datasheet.
Signed-off-by: Damon Ding
Reviewed-by: Dmitry Baryshkov
---
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 6 +++---
1 file changed, 3 insertions(+), 3 delet
These patchs have been tested with a 1536x2048p60 eDP panel on
RK3588S EVB1 board, and HDMI 1080P/4K display also has been verified
on RK3588 EVB1 board. Furthermore, the eDP display has been rechecked
on RK3399 sapphire excavator board.
Patch 1~4 are the eDP mode support of samsung hdptx phy dr
g to try to do the same thing a
blocking commit does which is to wait for hw to finish scanout and then
cleanup planes. Hence this was preferred and is better IMO.
BR,
-R
+ }
+
return true;
}
---
base-commit: 866e43b945bf98f8e807dfa45eca92f931f3a032
change-id: 20250108-async-disable-fix-cc1b9a1d5b19
Best regards,
--
Jessica Zhang
reed+unmapped leading to the same problem.
idk if this more conservative approach would cause fps issues..
holding an extra ref would avoid potential issues, but offhand I'm not
sure if it would be a perf problem in practice. Maybe with animated
cursors?
BR,
-R
> We can try that out.
>
> holding extra ref gets tricky IMO. In this way, the calls are balanced
> in places we know.
>
> > I think a more correct approach would be to run a worker, waiting for
> > the commit to happen and then freeing the FBs.
> >
>
> Hi Dmitry
>
> This option was tried . It gets very messy to handle it this way. Then
> we realized that, the worker is going to try to do the same thing a
> blocking commit does which is to wait for hw to finish scanout and then
> cleanup planes. Hence this was preferred and is better IMO.
>
> >>
> >> BR,
> >> -R
> >>
> >>> + }
> >>> +
> >>> return true;
> >>> }
> >>>
> >>>
> >>> ---
> >>> base-commit: 866e43b945bf98f8e807dfa45eca92f931f3a032
> >>> change-id: 20250108-async-disable-fix-cc1b9a1d5b19
> >>>
> >>> Best regards,
> >>> --
> >>> Jessica Zhang
> >>>
> >
> >
> >
hi
>
>-Original Message-
>From: Dmitry Baryshkov
>Sent: Wednesday, January 8, 2025 6:43 PM
>To: Hermes Wu (吳佳宏)
>Cc: Andrzej Hajda ; Neil Armstrong
>; Robert Foss ; Laurent Pinchart
>; Jonas Karlman ; Jernej
>Skrabec ; Maarten Lankhorst
>; Maxime Ripard ;
>Thomas Zimmermann ; David
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The MSM driver uses drm_atomic_helper_check() which mandates that none
of the atomic_check() callbacks toggles crtc_state->mode_changed.
Perform corresponding check before calling the drm_atomic_helper_check()
function.
Fixes: 8b45a26f2ba9 ("drm/
ocking commit does which is to wait for hw to finish scanout and then
cleanup planes. Hence this was preferred and is better IMO.
BR,
-R
+ }
+
return true;
}
---
base-commit: 866e43b945bf98f8e807dfa45eca92f931f3a032
change-id: 20250108-async-disable-fix-cc1b9a1d5b19
Best regards,
--
Jessica Zhang
> + if (plane_state && !plane_state->fb)
> > + return false;
>
> hmm, I suppose we want the same even if the fb changes? Or
> alternatively somewhere hold an extra ref to the backing obj until hw
> has finished scanout?
I think
&& !plane_state->fb)
> + return false;
hmm, I suppose we want the same even if the fb changes? Or
alternatively somewhere hold an extra ref to the backing obj until hw
has finished scanout?
BR,
-R
> + }
> +
> return true;
> }
>
>
> ---
> base-commit: 866e43b945bf98f8e807dfa45eca92f931f3a032
> change-id: 20250108-async-disable-fix-cc1b9a1d5b19
>
> Best regards,
> --
> Jessica Zhang
>
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
As a preparation for calling dpu_encoder_get_topology() from different
code paths, simplify its calling interface, obtaining some data pointers
internally instead passing them via arguments.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/
On 12/18/2024 11:49 PM, Jun Nie wrote:
Add the case to reserve multiple pairs mixers for high resolution.
Current code only supports one pair of mixer usage case. To support
quad-pipe usage case, two pairs of mixers are needed.
Current code resets number of mixer on failure of pair's peer tes
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
As a preparation for calling dpu_encoder_get_topology() from different
places, move the code setting topology->needs_cdm to that function
(instead of patching topology separately).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/d
Hi Thomas,
Thanks for the feedback. Let me consider how to achieve your suggestion.
Regards,
Jammy Huang
>
> Hi Jamie
>
>
> Am 25.12.24 um 01:32 schrieb Jammy Huang:
> > In this patch, 3 new timings are added into support list.
> >
> > If you want to have new timings, 1280x720 and 1280x960 on
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The driver isn't supposed to consult crtc_state->active/active_check for
resource allocation. Instead all resources should be allocated if
crtc_state->enabled is set. Stop consulting active / active_changed in
order to determine whether the hardwa
On Wed, Jan 08, 2025 at 02:40:47PM -0800, Jessica Zhang wrote:
> Initialize the return value so that the dpu_crtc_atomic_check() doesn't
> fail if the virtual planes command line parameter is enabled and no planes
> are visible.
>
> Fixes: 774bcfb73176 ("drm/msm/dpu: add support for virtual planes
From: Dave Airlie
This is the 3rd iteration of this after talking to Ben and
Danilo, I think this makes sense now.
The fence sync logic doesn't handle a fence sync across devices
as it tries to write to a channel offset from one device into
the fence bo from a different device, which won't work
On Wed, Jan 08, 2025 at 02:40:48PM -0800, Jessica Zhang wrote:
> Drop extra return at the end of dpu_crtc_reassign_planes()
>
> Fixes: 774bcfb73176 ("drm/msm/dpu: add support for virtual planes")
> Signed-off-by: Jessica Zhang
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
> 1 file cha
Due to miss returning error when setting clock, the smatch static
checker reports warning:
drivers/accel/amdxdna/aie2_smu.c:68 npu1_set_dpm()
error: uninitialized symbol 'freq'.
Fixes: f4d7b8a6bc8c ("accel/amdxdna: Enhance power management settings")
Reported-by: Dan Carpenter
Closes:
https:
On 12/19/2024 2:09 PM, Dmitry Baryshkov wrote:
On Thu, Dec 19, 2024 at 03:49:22PM +0800, Jun Nie wrote:
decide right side of a pair per last bit, in case of multiple
mixer pairs.
Proper English sentences, please. Also describe why, not what.
Hi Jun,
Can we also add a note in the commit m
On Wed, Jan 08, 2025 at 07:52:27PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> Add vop found on rk3576, the main difference between rk3576 and the
> previous vop is that each VP has its own interrupt line.
>
> Signed-off-by: Andy Yan
>
> ---
>
> Changes in v9:
> - Drop 'vop-' prefix of interr
On 1/3/25 04:26, oushixiong1...@163.com wrote:
From: Shixiong Ou
efifb_setup() doesn't need to return a value.
Signed-off-by: Shixiong Ou
applied.
Thanks!
Helge
amp;& !plane_state->fb)
+ return false;
+ }
+
return true;
}
---
base-commit: 866e43b945bf98f8e807dfa45eca92f931f3a032
change-id: 20250108-async-disable-fix-cc1b9a1d5b19
Best regards,
--
Jessica Zhang
On 1/8/2025 6:31 AM, Abel Vesa wrote:
Link Training Tunable PHY Repeaters (LTTPRs) are defined in DisplayPort
1.4a specification. As the name suggests, these PHY repeaters are
capable of adjusting their output for link training purposes.
According to the DisplayPort standard, LTTPRs have two
From: Dave Airlie
The fence sync logic doesn't properly account for cases where
the syncing is between two different client spaces, whether
this be on a single device or multi-device.
In the pre-nv84 case this code might work, but post nv84
the fence context vma is used to work out the addr, whi
On 1/9/2025 4:03 AM, Bjorn Andersson wrote:
> On Fri, Dec 13, 2024 at 05:01:05PM +0530, Akhil P Oommen wrote:
>> From: Jie Zhang
>>
>> Add gpu and gmu nodes for qcs615 chipset.
>>
>
> Please resubmit this in a series together with the gpucc patch.
Sure. I will send a new revision.
-Akhil.
>
>
Update GPU OPP table with new levels along with the speedbin
configurations.
Signed-off-by: Akhil P Oommen
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 47 ++
1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
b/arch/arm64/boot/
On 1/8/2025 6:31 AM, Abel Vesa wrote:
According to the DisplayPort standard, LTTPRs have two operating
modes:
- non-transparent - it replies to DPCD LTTPR field specific AUX
requests, while passes through all other AUX requests
- transparent - it passes through all AUX requests.
Switc
This series adds gpu speedbin support for Adreno X1-85 GPU along with
additional OPP levels. Because the higher OPPs require GPU ACD feature,
this series has dependency on the GPU ACD support series [1]. Also,
there is dependency on dimtry's series which fixes dword alignment in
nvmem driver [2]. W
Update the RPMH level definitions to include TURBO_L5 corner.
Signed-off-by: Akhil P Oommen
---
include/dt-bindings/power/qcom-rpmpd.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/power/qcom-rpmpd.h
b/include/dt-bindings/power/qcom-rpmpd.h
index
df599bf462207267a412e
Document compatible string for the QFPROM on X1E80100 platform.
Signed-off-by: Akhil P Oommen
---
Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
b/Documentation/devicetree/bind
Adreno X1-85 has an additional bit which is at a non-contiguous
location in qfprom. Add support for this new "hi" bit along with
the speedbin mappings.
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 5 +
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 15 ++-
2 files changed, 19 inse
Initialize the return value so that the dpu_crtc_atomic_check() doesn't
fail if the virtual planes command line parameter is enabled and no planes
are visible.
Fixes: 774bcfb73176 ("drm/msm/dpu: add support for virtual planes")
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_p
Drop extra return at the end of dpu_crtc_reassign_planes()
Fixes: 774bcfb73176 ("drm/msm/dpu: add support for virtual planes")
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
drm/msm/dpu: Drop extraneous return in dpu_crtc_reassign_planes()
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +-
2 files changed, 1 insertion(+), 3 deletions(-)
---
base-commit: 866e43b945bf98f8e807dfa45eca92f931f3a032
change-id: 20250108-vi
On 1/7/25 5:16 PM, Maxime Ripard wrote:
> On Tue, Jan 07, 2025 at 02:00:35AM +0200, Cristian Ciocaltea wrote:
>> drm_atomic_helper_connector_hdmi_check() helper makes use of
>> connector_state_get_mode() to obtain a drm_display_mode pointer, but it
>> doesn't validate it, which may lead to a NULL p
On Wed, 08 Jan 2025 17:15:42 +0100, amerg...@baylibre.com wrote:
> The purpose of this series is to add the display support for the mt8365-evk.
>
> This is the list of HWs / IPs support added:
> - Connectors (HW):
> - HDMI
> - MIPI DSI (Mobile Industry Processor Interface Display Serial Inte
On Fri, Dec 13, 2024 at 05:01:05PM +0530, Akhil P Oommen wrote:
> From: Jie Zhang
>
> Add gpu and gmu nodes for qcs615 chipset.
>
Please resubmit this in a series together with the gpucc patch.
Regards,
Bjorn
> Signed-off-by: Jie Zhang
> Signed-off-by: Akhil P Oommen
> Reviewed-by: Dmitry B
Hi Maxime,
On 12/18/24 3:36 AM, Andy Yan wrote:
>
> Hi,
>
> 在 2024-12-18 00:59:57，"Cristian Ciocaltea"
> 写道：
>> On 12/17/24 6:53 PM, Maxime Ripard wrote:
>>> On Tue, Dec 17, 2024 at 06:36:41PM +0200, Cristian Ciocaltea wrote:
On 12/17/24 5:00 PM, Maxime Ripard wrote:
> On Wed, Dec 11,
On Wed, Jan 08, 2025 at 04:31:46PM +0200, Abel Vesa wrote:
> Link Training Tunable PHY Repeaters (LTTPRs) are defined in DisplayPort
> 1.4a specification. As the name suggests, these PHY repeaters are
> capable of adjusting their output for link training purposes.
>
> According to the DisplayPort
On Wed, Jan 08, 2025 at 04:31:43PM +0200, Abel Vesa wrote:
> According to the DisplayPort standard, LTTPRs have two operating
> modes:
> - non-transparent - it replies to DPCD LTTPR field specific AUX
>requests, while passes through all other AUX requests
> - transparent - it passes through a
Unused since commit a78a8da51b36
("drm/ttm: replace busy placement with flags v6")
Signed-off-by: Ian Forbes
---
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 1 -
drivers/gpu/drm/vmwgfx/vmwgfx_bo.h | 1 -
2 files changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
b/drivers/gpu/drm
On 08.01.25 22:55, Matthew Wilcox wrote:
On Wed, Jan 08, 2025 at 10:12:36PM +0100, David Hildenbrand wrote:
On 08.01.25 21:54, Matthew Wilcox wrote:
Not necessarily! We already do that (since 2022) for DAX (see
6a8e0596f004). rmap lets you find every place that a given range
of a file is mapp
Fix a NULL pointer dereference discovered while unloading a DRM module
and provide a couple of tests to make sure the helper works as expected
in case the connector's CRTC is shut down.
Signed-off-by: Cristian Ciocaltea
---
Changes in v2:
- Collected R-b tags from Dmitry and Angelo
- Add a 2nd pa
Following up a fixed bug in drm_atomic_helper_connector_hdmi_check(),
discovered while unloading a DRM module, add a couple of tests to make
sure the helper will not exhibit any abnormal behaviour for use cases
that involve shutting down the connector's CRTC.
Signed-off-by: Cristian Ciocaltea
---
drm_atomic_helper_connector_hdmi_check() helper makes use of
connector_state_get_mode() to obtain a drm_display_mode pointer, but it
doesn't validate it, which may lead to a NULL pointer dereference in
some cases, i.e. unloading a DRM module:
[ 1002.910414] Unable to handle kernel NULL pointer der
On Wed, Jan 08, 2025 at 10:12:36PM +0100, David Hildenbrand wrote:
> On 08.01.25 21:54, Matthew Wilcox wrote:
> > Not necessarily! We already do that (since 2022) for DAX (see
> > 6a8e0596f004). rmap lets you find every place that a given range
> > of a file is mapped into user address spaces; bu
On Wed, Jan 08, 2025 at 12:16:50PM +1100, Stephen Rothwell wrote:
> Hi All,
>
> On Mon, 6 Jan 2025 13:03:48 +1100 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the drm-intel tree got a conflict in:
> >
> > drivers/gpu/drm/i915/display/intel_display_driver.c
> >
> > between co
On Thu, 09 Jan 2025 02:10:01 +0530, Akhil P Oommen wrote:
> Add a new schema which extends opp-v2 to support a new vendor specific
> property required for Adreno GPUs found in Qualcomm's SoCs. The new
> property called "qcom,opp-acd-level" carries a u32 value recommended
> for each opp needs to b
Thanks,
Tested-by: Maya Matuszczyk
śr., 8 sty 2025 o 21:40 Akhil P Oommen napisał(a):
>
> This series adds support for ACD feature for Adreno GPU which helps to
> lower the power consumption on GX rail and also sometimes is a requirement
> to enable higher GPU frequencies. At high level, follow
On 08.01.25 21:54, Matthew Wilcox wrote:
On Wed, Jan 08, 2025 at 09:14:53PM +0100, David Hildenbrand wrote:
On 08.01.25 18:32, Matthew Wilcox wrote:
On Wed, Jan 08, 2025 at 04:18:42PM +, Lorenzo Stoakes wrote:
@@ -280,7 +269,10 @@ static void fb_deferred_io_work(struct work_struct *work)
On Wed, Jan 08, 2025 at 12:27:42PM +0100, AngeloGioacchino Del Regno wrote:
> Add support for the newer HDMI-TX (Encoder) v2 and DDC v2 IPs
> found in MediaTek's MT8195, MT8188 SoC and their variants, and
> including support for display modes up to 4k60 and for HDMI
> Audio, as per the HDMI 2.0 spe
This is motivated by the desire of some dirvers (eg. Panthor) to print the
size of internal memory regions with a prefix that reflects the driver
name, as suggested in the previous documentation commit.
That means a minor refactoring of print_size() was needed so as to make it
more generic in the
A previous commit enabled display of driver-internal kernel BO sizes
through the device file's fdinfo interface.
Expand the description of the relevant driver-specific key:value pairs
with the definitions of the new panthor-*-memory ones.
Reviewed-by: Mihail Atanassov
Reviewed-by: Liviu Dudau
R
This patch series enables display of the size of driver-owned shmem BO's that
aren't
exposed to userspace through a DRM handle.
Discussion of previous revision can be found here [1].
Changelog:
v7:
- Added new commit: mentions the formation rules for driver-specific fdinfo
keys
- Added new co
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