On 08/01/2025 17:15, Alexandre Mergnat wrote:
>
> +&i2c1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-div = <2>;
> + clock-frequency = <100000>;
> + pinctrl-0 = <&i2c1_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + it66121_hdmi: hdmi@4c {
> + #sound-dai-cells = <0>;
compatible is always, ALWAYS first.
> + compatible = "ite,it66121";
reg follows.
> + interrupt-parent = <&pio>;
> + interrupts = <68 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-0 = <&ite_pins>;
> + pinctrl-names = "default";
> + reg = <0x4c>;
> + reset-gpios = <&pio 69 GPIO_ACTIVE_LOW>;
> + vcn18-supply = <&mt6357_vsim2_reg>;
> + vcn33-supply = <&mt6357_vibr_reg>;
> + vrf12-supply = <&mt6357_vrf12_reg>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + it66121_in: endpoint@0 {
> + reg = <0>;
> + bus-width = <12>;
> + remote-endpoint = <&dpi0_out>;
> + };
> + };
> +
> + port@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + hdmi_connector_out: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&hdmi_connector_in>;
> + };
> + };
> + };
> + };
> +};
> +
> &mmc0 {
> assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>;
> assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
> @@ -205,6 +362,11 @@ &mt6357_pmic {
> mediatek,micbias1-microvolt = <1700000>;
> };
>
> +&mt6357_vsim1_reg {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +};
> +
> &pio {
> aud_default_pins: audiodefault-pins {
> clk-dat-pins {
> @@ -267,6 +429,49 @@ clk-dat-pins {
> };
> };
>
> + dpi_default_pins: dpi-default-pins {
> + pins {
> + pinmux = <MT8365_PIN_0_GPIO0__FUNC_DPI_D0>,
> + <MT8365_PIN_1_GPIO1__FUNC_DPI_D1>,
> + <MT8365_PIN_2_GPIO2__FUNC_DPI_D2>,
> + <MT8365_PIN_3_GPIO3__FUNC_DPI_D3>,
> + <MT8365_PIN_4_GPIO4__FUNC_DPI_D4>,
> + <MT8365_PIN_5_GPIO5__FUNC_DPI_D5>,
> + <MT8365_PIN_6_GPIO6__FUNC_DPI_D6>,
> + <MT8365_PIN_7_GPIO7__FUNC_DPI_D7>,
> + <MT8365_PIN_8_GPIO8__FUNC_DPI_D8>,
> + <MT8365_PIN_9_GPIO9__FUNC_DPI_D9>,
> + <MT8365_PIN_10_GPIO10__FUNC_DPI_D10>,
> + <MT8365_PIN_11_GPIO11__FUNC_DPI_D11>,
> + <MT8365_PIN_12_GPIO12__FUNC_DPI_DE>,
> + <MT8365_PIN_13_GPIO13__FUNC_DPI_VSYNC>,
> + <MT8365_PIN_14_GPIO14__FUNC_DPI_CK>,
> + <MT8365_PIN_15_GPIO15__FUNC_DPI_HSYNC>;
> + drive-strength = <4>;
> + };
> + };
> +
> + dpi_idle_pins: dpi-idle-pins {
> + pins {
> + pinmux = <MT8365_PIN_0_GPIO0__FUNC_GPIO0>,
> + <MT8365_PIN_1_GPIO1__FUNC_GPIO1>,
> + <MT8365_PIN_2_GPIO2__FUNC_GPIO2>,
> + <MT8365_PIN_3_GPIO3__FUNC_GPIO3>,
> + <MT8365_PIN_4_GPIO4__FUNC_GPIO4>,
> + <MT8365_PIN_5_GPIO5__FUNC_GPIO5>,
> + <MT8365_PIN_6_GPIO6__FUNC_GPIO6>,
> + <MT8365_PIN_7_GPIO7__FUNC_GPIO7>,
> + <MT8365_PIN_8_GPIO8__FUNC_GPIO8>,
> + <MT8365_PIN_9_GPIO9__FUNC_GPIO9>,
> + <MT8365_PIN_10_GPIO10__FUNC_GPIO10>,
> + <MT8365_PIN_11_GPIO11__FUNC_GPIO11>,
> + <MT8365_PIN_12_GPIO12__FUNC_GPIO12>,
> + <MT8365_PIN_13_GPIO13__FUNC_GPIO13>,
> + <MT8365_PIN_14_GPIO14__FUNC_GPIO14>,
> + <MT8365_PIN_15_GPIO15__FUNC_GPIO15>;
> + };
> + };
> +
> ethernet_pins: ethernet-pins {
> phy_reset_pins {
> pinmux = <MT8365_PIN_133_TDM_TX_DATA1__FUNC_GPIO133>;
> @@ -308,6 +513,33 @@ pins {
> };
> };
>
> + i2c1_pins: i2c1-pins {
> + pins {
> + pinmux = <MT8365_PIN_59_SDA1__FUNC_SDA1_0>,
> + <MT8365_PIN_60_SCL1__FUNC_SCL1_0>;
> + bias-pull-up;
> + };
> + };
> +
> + ite_pins: ite-pins {
> + irq_ite_pins {
That's some downstream copy-paste. Align DTS coding style.
Best regards,
Krzysztof
