On 13/09/2023 04:08, Moudy Ho (何宗原) wrote:
>> This does not make any sense and such mess at v5 is confusing.
>>
>> Best regards,
>> Krzysztof
>>
>
> Hi Krzysztof,
>
>
> Apologize for the confusion caused by the improper separation of
> patches.
> This occurred because I misunderstood the new wa
On 13/09/2023 05:04, Moudy Ho (何宗原) wrote:
> On Tue, 2023-09-12 at 10:16 +0200, Krzysztof Kozlowski wrote:
>>
>> External email : Please do not click links or open attachments until
>> you have verified the sender or the content.
>> On 12/09/2023 09:56, Moudy Ho wrote:
>>> Due to the same h
On 12/9/23 15:49, Thomas Zimmermann wrote:
Fix coding style. No functional changes.
Signed-off-by: Thomas Zimmermann
---
arch/powerpc/include/asm/machdep.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
> Subject: [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp
> prescision
>
> From: Ankit Nautiyal
>
> Add helper to get the DSC bits_per_pixel precision for the DP sink.
>
I think you forgot to add my reviewed by that I gave in the last revision 😝
Anyways,
LGTM.
Reviewed-by: Su
From: Ankit Nautiyal
MTL+ supports fractional compressed bits_per_pixel, with precision of
1/16. This compressed bpp is stored in U6.4 format.
Accommodate the precision during calculation of transfer unit data
for hblank_early calculation.
v2:
-Fixed tu_data calculation while dealing with U6.4 f
From: Swati Sharma
If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
compressed bpp is fractional. Continue if the computed compressed bpp
turns out to be a integer.
v2:
-Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)
-Fix comment (Suraj)
Signed-off-by: S
From: Vandita Kulkarni
Consider the fractional bpp while reading the qp values.
v2: Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)
Signed-off-by: Vandita Kulkarni
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
.../gpu/drm/i915/display/intel_qp_tables.c
From: Swati Sharma
DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show
to depict sink's precision.
Also, new debugfs entry is created to enforce fractional bpp.
If Force_DSC_Fractional_BPP_en is set then while iterating over
output bpp with fractional step size we will continue if
From: Ankit Nautiyal
DSC parameter bits_per_pixel is stored in U6.4 format.
The 4 bits represent the fractional part of the bpp.
Currently we use compressed_bpp member of dsc structure to store
only the integral part of the bits_per_pixel.
To store the full bits_per_pixel along with the fractiona
From: Ankit Nautiyal
This patch adds support to iterate over compressed output bpp as per the
fractional step, supported by DP sink.
v2:
-Avoid ending up with compressed bpp, same as pipe bpp. (Stan)
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/in
From: Ankit Nautiyal
Add helper to get the DSC bits_per_pixel precision for the DP sink.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 27 +
include/drm/display/drm_dp_helper.h | 1 +
2 files changed, 28 insertions(+)
diff --git a/dri
From: Ankit Nautiyal
MTL+ supports fractional compressed bits_per_pixel, with precision of
1/16. This compressed bpp is stored in U6.4 format.
Accommodate this precision while computing m_n values.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel
his patch series adds support for DSC fractional compressed bpp
for MTL+. The series starts with some fixes, followed by patches that
lay groundwork to iterate over valid compressed bpps to select the
'best' compressed bpp with optimal link configuration (taken from
upstream series: https://patchwo
The commit 45b58669e532 ("drm/ssd130x: Allocate buffer in the plane's
.atomic_check() callback") moved the allocation of the intermediate and
HW buffers from the encoder's .atomic_enable callback, to the plane's
.atomic_check callback.
This was suggested by Maxime Ripard, because drivers aren't al
> Subject: [PATCH 2/8] drm/i915/display: Store compressed bpp in U6.4 format
>
> From: Ankit Nautiyal
>
> DSC parameter bits_per_pixel is stored in U6.4 format.
> The 4 bits represent the fractional part of the bpp.
> Currently we use compressed_bpp member of dsc structure to store only the
> in
> Subject: [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp
> prescision
>
> From: Ankit Nautiyal
>
> Add helper to get the DSC bits_per_pixel precision for the DP sink.
>
LGTM.
Reviewed-by: Suraj Kandpal
> Signed-off-by: Ankit Nautiyal
> ---
> drivers/gpu/drm/display/drm_dp
Hi Jani,
On 9/12/23 07:52, Randy Dunlap wrote:
>
>
> On 9/12/23 00:47, Jani Nikula wrote:
>> On Mon, 11 Sep 2023, Randy Dunlap wrote:
>>> On 9/10/23 19:11, Stephen Rothwell wrote:
Hi all,
Please do *not* include material destined for v6.7 in your linux-next
included branches
On Mon, Sep 11, 2023 at 2:15 PM Dmitry Baryshkov
wrote:
>
> On 06/09/2023 16:38, Heikki Krogerus wrote:
> > On Wed, Sep 06, 2023 at 03:48:35PM +0300, Dmitry Baryshkov wrote:
> >> On Wed, 6 Sept 2023 at 15:44, Heikki Krogerus
> >> wrote:
> >>>
> >>> On Tue, Sep 05, 2023 at 01:56:59PM +0300, Dmitry
On Tue, Sep 12, 2023 at 6:46 PM Rob Clark wrote:
>
> On Tue, Sep 12, 2023 at 2:32 AM Boris Brezillon
> wrote:
> >
> > On Tue, 12 Sep 2023 09:37:00 +0100
> > Adrián Larumbe wrote:
> >
> > > The current implementation will try to pick the highest available size
> > > display unit as soon as the BO
On Tue, Sep 12, 2023 at 2:32 AM Boris Brezillon
wrote:
>
> On Tue, 12 Sep 2023 09:37:00 +0100
> Adrián Larumbe wrote:
>
> > The current implementation will try to pick the highest available size
> > display unit as soon as the BO size exceeds that of the previous
> > multiplier. That can lead to
On Wed, Sep 13, 2023 at 11:02:13AM +1000, Angus Gardner wrote:
> ---
> drivers/staging/fbtft/fb_ra8875.c | 11 ---
> 1 file changed, 4 insertions(+), 7 deletions(-)
No patch description and SoB, so Greg can't take this as-is.
> - if ((par->info->var.xres == 320) && (par->info->var.yr
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/mediatek/mtk_dpi.c
between commits:
47d4bb6bbcdb ("drm/mediatek: mtk_dpi: Simplify with devm_drm_bridge_add()")
90c95c3892dd ("drm/mediatek: mtk_dpi: Switch to .remove_new() void callback")
from Linu
On 9/5/23 11:03, Boris Brezillon wrote:
>>* But
>> + * acquiring the obj lock in
>> drm_gem_shmem_release_pages_locked() can
>> + * cause a locking order inversion between
>> reservation_ww_class_mutex
>> + * and fs_reclaim.
>> + *
>
On 9/5/23 09:46, Boris Brezillon wrote:
> On Sun, 3 Sep 2023 20:07:25 +0300
> Dmitry Osipenko wrote:
>
>> Everything that uses the mapped buffer should be agnostic to is_iomem.
>> The only reason for the is_iomem test is that we're setting shmem->vaddr
>> to the returned map->vaddr. Now that the
On Tue, Sep 12, 2023 at 09:23:08PM +0200, Thomas Hellström wrote:
>
> On 9/12/23 18:50, Danilo Krummrich wrote:
> > On Tue, Sep 12, 2023 at 06:20:32PM +0200, Thomas Hellström wrote:
> > > Hi, Danilo,
> > >
> > > On 9/9/23 17:31, Danilo Krummrich wrote:
> > > > So far the DRM GPUVA manager offers
Hi Javier,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[cannot apply to linus/master v6.6-rc1 next-20230912]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use
On Tue, 12 Sept 2023 at 21:30, Janne Grunau via B4 Relay
wrote:
>
> From: Janne Grunau
>
> Multiple power domains need to be handled explicitly in each driver. The
> driver core can not handle it automatically since it is not aware of
> power sequencing requirements the hardware might have. This
From: Janne Grunau
Multiple power domains need to be handled explicitly in each driver. The
driver core can not handle it automatically since it is not aware of
power sequencing requirements the hardware might have. This is not a
problem for simpledrm since everything is expected to be powered on
On 9/12/23 18:50, Danilo Krummrich wrote:
On Tue, Sep 12, 2023 at 06:20:32PM +0200, Thomas Hellström wrote:
Hi, Danilo,
On 9/9/23 17:31, Danilo Krummrich wrote:
So far the DRM GPUVA manager offers common infrastructure to track GPU VA
allocations and mappings, generically connect GPU VA mapp
On Mon, 2023-09-11 at 14:47 +0200, Thomas Hellström wrote:
> Add a motivation for and description of asynchronous VM_BIND operation
>
> v2:
> - Fix typos (Nirmoy Das)
> - Improve the description of a memory fence (Oak Zeng)
> - Add a reference to the document in the Xe RFC.
> - Add pointers to sam
On 12/09/2023 14:05, Heikki Krogerus wrote:
On Tue, Sep 12, 2023 at 12:15:10AM +0300, Dmitry Baryshkov wrote:
On 06/09/2023 16:38, Heikki Krogerus wrote:
On Wed, Sep 06, 2023 at 03:48:35PM +0300, Dmitry Baryshkov wrote:
On Wed, 6 Sept 2023 at 15:44, Heikki Krogerus
wrote:
On Tue, Sep 05, 20
On Tue, 12 Sep 2023, Abhinav Kumar wrote:
> Hi Jani
>
> On 9/12/2023 5:16 AM, Jani Nikula wrote:
>> On Thu, 07 Sep 2023, Stephen Boyd wrote:
>>> Quoting Jani Nikula (2023-09-01 07:20:34)
The DP CTS test for EDID last block checksum expects the checksum for
the last block, invalid or not
On 08/09/2023 12:22, Vignesh Raman wrote:
Instead of modifying files in git to enable/disable
configs, use scripts/config on the .config file which
will be used for building the kernel.
Suggested-by: Jani Nikula
Signed-off-by: Vignesh Raman
Acked-by: Helen Koike
---
v2:
- Added a n
On 08/09/2023 12:22, Vignesh Raman wrote:
Enable the following jobs, as the issues noted in the
TODO comments have been resolved. This will ensure that these jobs
are now included and executed as part of the CI/CD pipeline.
msm:apq8016:
TODO: current issue: it is not fiding the NFS root. Fix
On 9/12/23 17:13, Boris Brezillon wrote:
On Tue, 12 Sep 2023 16:49:09 +0200
Boris Brezillon wrote:
On Tue, 12 Sep 2023 16:33:01 +0200
Danilo Krummrich wrote:
On 9/12/23 16:28, Boris Brezillon wrote:
On Thu, 17 Aug 2023 13:13:31 +0200
Danilo Krummrich wrote:
I think that's a misunde
On 08/09/2023 12:22, Vignesh Raman wrote:
Mediatek mt8173 board fails to boot with DA9211 regulator disabled.
Enabling CONFIG_REGULATOR_DA9211=y in drm-ci fixes the issue.
So enable it in the defconfig since kernel-ci also requires it.
tbh, =m doesn't solve for mesa-ci (since we don't use a
On 08/09/2023 12:22, Vignesh Raman wrote:
Enable CONFIG_REGULATOR_DA9211=y to fix mt8173 boot issue.
Signed-off-by: Vignesh Raman
Acked-by: Helen Koike
---
v2:
- No changes
v3:
- Remove CONFIG_RTC_DRV_MT6397=y as it is already enabled in defconfig
---
drivers/gpu/drm/ci/arm64
On 08/09/2023 12:22, Vignesh Raman wrote:
Update ci variables to fix the below error,
ERROR - Igt error: malloc(): corrupted top size
ERROR - Igt error: Received signal SIGABRT.
ERROR - Igt error: Stack trace:
ERROR - Igt error: #0 [fatal_sig_handler+0x17b]
Signed-off-by: Vignesh Raman
Ac
On 9/12/23 16:49, Boris Brezillon wrote:
On Tue, 12 Sep 2023 16:33:01 +0200
Danilo Krummrich wrote:
On 9/12/23 16:28, Boris Brezillon wrote:
On Thu, 17 Aug 2023 13:13:31 +0200
Danilo Krummrich wrote:
I think that's a misunderstanding. I'm not trying to say that it is
*always* beneficial
On 08/09/2023 12:22, Vignesh Raman wrote:
Force db410c to host mode to fix network issue which results in failure
to mount root fs via NFS.
See
https://gitlab.freedesktop.org/gfx-ci/linux/-/commit/cb72a629b8c15c80a54dda510743cefd1c4b65b8
Compile the base device tree with overlay support and
On 08/09/2023 12:22, Vignesh Raman wrote:
Due to the presence of the fastboot micro cable in the CI farm,
it causes the hardware to remain in gadget mode instead of host mode.
So it doesn't find the network, which results in failure to mount root
fs via NFS.
Add an overlay dtso file that sets
On Tue, Sep 12, 2023 at 06:20:32PM +0200, Thomas Hellström wrote:
> Hi, Danilo,
>
> On 9/9/23 17:31, Danilo Krummrich wrote:
> > So far the DRM GPUVA manager offers common infrastructure to track GPU VA
> > allocations and mappings, generically connect GPU VA mappings to their
> > backing buffers
On 08/09/2023 12:22, Vignesh Raman wrote:
/sys/kernel/debug/dri/*/state exist for every atomic KMS driver.
We do not test non-atomic drivers, so remove the todo.
Signed-off-by: Vignesh Raman
Acked-by: Helen Koike
---
v2:
- No changes
v3:
- No changes
---
drivers/gpu/drm/c
From: Swati Sharma
DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show
to depict sink's precision.
Also, new debugfs entry is created to enforce fractional bpp.
If Force_DSC_Fractional_BPP_en is set then while iterating over
output bpp with fractional step size we will continue if
From: Vandita Kulkarni
Consider the fractional bpp while reading the qp values.
v2: Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)
Signed-off-by: Vandita Kulkarni
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
.../gpu/drm/i915/display/intel_qp_tables.c
From: Swati Sharma
If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
compressed bpp is fractional. Continue if the computed compressed bpp
turns out to be a integer.
v2:
-Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)
-Fix comment (Suraj)
Signed-off-by: S
From: Ankit Nautiyal
This patch adds support to iterate over compressed output bpp as per the
fractional step, supported by DP sink.
v2:
-Avoid ending up with compressed bpp, same as pipe bpp. (Stan)
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/in
From: Ankit Nautiyal
DSC parameter bits_per_pixel is stored in U6.4 format.
The 4 bits represent the fractional part of the bpp.
Currently we use compressed_bpp member of dsc structure to store
only the integral part of the bits_per_pixel.
To store the full bits_per_pixel along with the fractiona
From: Ankit Nautiyal
MTL+ supports fractional compressed bits_per_pixel, with precision of
1/16. This compressed bpp is stored in U6.4 format.
Accommodate the precision during calculation of transfer unit data
for hblank_early calculation.
v2:
-Fixed tu_data calculation while dealing with U6.4 f
From: Ankit Nautiyal
MTL+ supports fractional compressed bits_per_pixel, with precision of
1/16. This compressed bpp is stored in U6.4 format.
Accommodate this precision while computing m_n values.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel
From: Ankit Nautiyal
Add helper to get the DSC bits_per_pixel precision for the DP sink.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 27 +
include/drm/display/drm_dp_helper.h | 1 +
2 files changed, 28 insertions(+)
diff --git a/dri
This patch series adds support for DSC fractional compressed bpp
for MTL+. The series starts with some fixes, followed by patches that
lay groundwork to iterate over valid compressed bpps to select the
'best' compressed bpp with optimal link configuration (taken from
upstream series: https://patchw
Hi Jani
On 9/12/2023 5:16 AM, Jani Nikula wrote:
On Thu, 07 Sep 2023, Stephen Boyd wrote:
Quoting Jani Nikula (2023-09-01 07:20:34)
The DP CTS test for EDID last block checksum expects the checksum for
the last block, invalid or not. Skip the validity check.
For the most part (*), the EDIDs
Hi, Danilo,
On 9/9/23 17:31, Danilo Krummrich wrote:
So far the DRM GPUVA manager offers common infrastructure to track GPU VA
allocations and mappings, generically connect GPU VA mappings to their
backing buffers and perform more complex mapping operations on the GPU VA
space.
However, there a
Yes, we've proposed this change before. The reasoning is still the
same. Added below to include in this thread as well. Is there a reason
the below explanation and test is not sufficient?
This issue affected several different CometLake-based Chrome OS device
designs. The details of the original re
On 12/09/2023 4:53 pm, Rob Herring wrote:
On Tue, Sep 12, 2023 at 11:13:50AM +0100, Robin Murphy wrote:
On 12/09/2023 9:28 am, Krzysztof Kozlowski wrote:
On 12/09/2023 08:16, Yong Wu (吴勇) wrote:
Hi Rob,
Thanks for your review.
On Mon, 2023-09-11 at 10:44 -0500, Rob Herring wrote:
E
On 9/11/23 10:38, Pekka Paalanen wrote:
> On Fri, 8 Sep 2023 17:10:46 +0200
> Thomas Zimmermann wrote:
>> Am 08.09.23 um 16:41 schrieb Pekka Paalanen:
>>> On Fri, 8 Sep 2023 15:56:51 +0200
>>> Thomas Zimmermann wrote:
I have a number of concerns. My point it not that we shouldn't optim
On Tue, Sep 12, 2023 at 11:13:50AM +0100, Robin Murphy wrote:
> On 12/09/2023 9:28 am, Krzysztof Kozlowski wrote:
> > On 12/09/2023 08:16, Yong Wu (吴勇) wrote:
> > > Hi Rob,
> > >
> > > Thanks for your review.
> > >
> > > On Mon, 2023-09-11 at 10:44 -0500, Rob Herring wrote:
> > > >
> > >
drm-tip/drm-tip linus/master v6.6-rc1
> next-20230912]
> [cannot apply to drm-misc/drm-misc-next drm-intel/for-linux-next]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
On Tue, Sep 12, 2023 at 09:37:06AM +0200, Boris Brezillon wrote:
> On Mon, 11 Sep 2023 19:16:05 -0700
> Matthew Brost wrote:
>
> > Rather than a global modparam for scheduling policy, move the scheduling
> > policy to scheduler / entity so user can control each scheduler / entity
> > policy.
>
>
On Tue, 12 Sep 2023 16:49:09 +0200
Boris Brezillon wrote:
> On Tue, 12 Sep 2023 16:33:01 +0200
> Danilo Krummrich wrote:
>
> > On 9/12/23 16:28, Boris Brezillon wrote:
> > > On Thu, 17 Aug 2023 13:13:31 +0200
> > > Danilo Krummrich wrote:
> > >
> > >> I think that's a misunderstanding.
Le mardi 12 septembre 2023 à 08:47 +, Yong Wu (吴勇) a écrit :
> On Mon, 2023-09-11 at 12:12 -0400, Nicolas Dufresne wrote:
> >
> > External email : Please do not click links or open attachments until
> > you have verified the sender or the content.
> > Hi,
> >
> > Le lundi 11 septembre 2
On Tue, Sep 12, 2023 at 09:29:53AM +0200, Boris Brezillon wrote:
> On Mon, 11 Sep 2023 19:16:04 -0700
> Matthew Brost wrote:
>
> > @@ -1071,6 +1063,7 @@ static int drm_sched_main(void *param)
> > *
> > * @sched: scheduler instance
> > * @ops: backend operations for this scheduler
> > + * @s
Le mardi 12 septembre 2023 à 16:46 +0200, Christian König a écrit :
> Am 12.09.23 um 10:52 schrieb Yong Wu (吴勇):
> > [SNIP]
> > > But what we should try to avoid is that newly merged drivers provide
> > > both a driver specific UAPI and DMA-heaps. The justification that
> > > this
> > > makes it ea
On Tue, Sep 12, 2023 at 04:53:00PM +0200, Boris Brezillon wrote:
> On Tue, 12 Sep 2023 14:37:57 +
> Matthew Brost wrote:
>
> > > Looks like you are changing the behavior here (unconditional ->
> > > conditional timestamp update)? Probably something that should go in a
> > > separate patch.
>
On Tue, Sep 12, 2023 at 12:28:28PM +0200, Boris Brezillon wrote:
> On Mon, 11 Sep 2023 19:16:13 -0700
> Matthew Brost wrote:
>
> > +void drm_sched_add_pending_job(struct drm_sched_job *job, bool tail)
> > +{
> > + struct drm_gpu_scheduler *sched = job->sched;
> > + struct drm_sched_entity *en
On Tue, 12 Sep 2023 14:37:57 +
Matthew Brost wrote:
> > Looks like you are changing the behavior here (unconditional ->
> > conditional timestamp update)? Probably something that should go in a
> > separate patch.
> >
>
> This patch creates a race so this check isn't need before this patc
On 9/12/23 00:47, Jani Nikula wrote:
> On Mon, 11 Sep 2023, Randy Dunlap wrote:
>> On 9/10/23 19:11, Stephen Rothwell wrote:
>>> Hi all,
>>>
>>> Please do *not* include material destined for v6.7 in your linux-next
>>> included branches until *after* v6.6-rc1 has been released. Also,
>>> do *n
On Tue, Sep 12, 2023 at 10:23:02AM +0200, Boris Brezillon wrote:
> On Mon, 11 Sep 2023 19:16:08 -0700
> Matthew Brost wrote:
>
> > Add generic schedule message interface which sends messages to backend
> > from the drm_gpu_scheduler main submission thread. The idea is some of
> > these messages m
Le lundi 11 septembre 2023 à 12:13 +0200, Christian König a écrit :
> Am 11.09.23 um 04:30 schrieb Yong Wu:
> > From: John Stultz
> >
> > This allows drivers who don't want to create their own
> > DMA-BUF exporter to be able to allocate DMA-BUFs directly
> > from existing DMA-BUF Heaps.
> >
> >
On Tue, 12 Sep 2023 16:33:01 +0200
Danilo Krummrich wrote:
> On 9/12/23 16:28, Boris Brezillon wrote:
> > On Thu, 17 Aug 2023 13:13:31 +0200
> > Danilo Krummrich wrote:
> >
> >> I think that's a misunderstanding. I'm not trying to say that it is
> >> *always* beneficial to fill up the ring as
On Tue, Sep 12, 2023 at 11:57:30AM +0200, Christian König wrote:
> Am 12.09.23 um 04:16 schrieb Matthew Brost:
> > Wait for pending jobs to be complete before signaling queued jobs. This
> > ensures dma-fence signaling order correct and also ensures the entity is
> > not running on the hardware aft
Am 12.09.23 um 10:52 schrieb Yong Wu (吴勇):
[SNIP]
But what we should try to avoid is that newly merged drivers provide
both a driver specific UAPI and DMA-heaps. The justification that
this
makes it easier to transit userspace to the new UAPI doesn't really
count.
That would be adding UAPI alre
On Tue, Sep 12, 2023 at 10:08:33AM +0200, Boris Brezillon wrote:
> On Mon, 11 Sep 2023 19:16:07 -0700
> Matthew Brost wrote:
>
> > Rather than call free_job and run_job in same work item have a dedicated
> > work item for each. This aligns with the design and intended use of work
> > queues.
> >
: 15d30b46573d75f5cb58cfacded8ebab9c76a2b0
patch link:
https://lore.kernel.org/r/20230910-simpledrm-multiple-power-domains-v1-1-f8718aefc685%40jannau.net
patch subject: [PATCH] drm/simpledrm: Add support for multiple "power-domains"
config: arm64-randconfig-r003-20230912
(https://downl
On 9/12/23 16:28, Boris Brezillon wrote:
On Thu, 17 Aug 2023 13:13:31 +0200
Danilo Krummrich wrote:
I think that's a misunderstanding. I'm not trying to say that it is
*always* beneficial to fill up the ring as much as possible. But I think
it is under certain circumstances, exactly those circ
On Thu, 17 Aug 2023 13:13:31 +0200
Danilo Krummrich wrote:
> I think that's a misunderstanding. I'm not trying to say that it is
> *always* beneficial to fill up the ring as much as possible. But I think
> it is under certain circumstances, exactly those circumstances I
> described for Nouveau
Hi Matthew,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-exynos/exynos-drm-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.6-rc1
next-20230912]
[cannot apply to drm-misc/drm-misc-next drm-intel
On Tue, Sep 12, 2023 at 03:52:28PM +0200, Boris Brezillon wrote:
> On Tue, 12 Sep 2023 14:56:06 +0200
> Danilo Krummrich wrote:
>
> > On Tue, Sep 12, 2023 at 02:18:18PM +0200, Boris Brezillon wrote:
> > > On Tue, 12 Sep 2023 12:46:26 +0200
> > > Danilo Krummrich wrote:
> > >
> > > > > I'm a b
On Tue, 12 Sep 2023 15:34:41 +0200
Danilo Krummrich wrote:
> On Tue, Sep 12, 2023 at 03:27:05PM +0200, Boris Brezillon wrote:
> > On Fri, 25 Aug 2023 15:45:49 +0200
> > Christian König wrote:
> >
> > > I tried this patch with Nouveau and found a race condition:
> > >
> > > In d
On Tue, 12 Sep 2023 14:56:06 +0200
Danilo Krummrich wrote:
> On Tue, Sep 12, 2023 at 02:18:18PM +0200, Boris Brezillon wrote:
> > On Tue, 12 Sep 2023 12:46:26 +0200
> > Danilo Krummrich wrote:
> >
> > > > I'm a bit worried that leaving this single vs multi-threaded wq
> > > > decision to driv
Rename the fbdev mmap helper fb_pgprotect() to pgprot_framebuffer().
The helper sets VMA page-access flags for framebuffers in device I/O
memory.
Also clean up the helper's parameters and return value. Instead of
the VMA instance, pass the individial parameters separately: existing
page-access fla
Fix coding style. No functional changes.
Signed-off-by: Thomas Zimmermann
---
arch/powerpc/include/asm/machdep.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/machdep.h
b/arch/powerpc/include/asm/machdep.h
index 4f6e7d7ee3883..933465ed4c
Call __phys_mem_access_prot() from the fbdev mmap helper
pgprot_framebuffer(). Allows to avoid the file argument of NULL.
Signed-off-by: Thomas Zimmermann
---
arch/powerpc/include/asm/fb.h | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/fb.h b/a
Only PowerPC's fb_pgprotect() needs the file argument, although
the implementation does not use it. Pass NULL to the internal
helper in preparation of further updates. A later patch will remove
the file parameter from fb_pgprotect().
While at it, replace the shift operation with PHYS_PFN().
Sugge
Remove 'file' parameter from struct machdep_calls.phys_mem_access_prot
and its implementation in pci_phys_mem_access_prot(). The file is not
used on PowerPC. By removing it, a later patch can simplify fbdev's
mmap code, which uses phys_mem_access_prot() on PowerPC.
Signed-off-by: Thomas Zimmermann
Clean up and rename fb_pgprotect() to work without struct file. Then
refactor the implementation for PowerPC. This change has been discussed
at [1] in the context of refactoring fbdev's mmap code.
The first two patches update fbdev and replace fbdev's fb_pgprotect()
with pgprot_framebuffer() on al
On Tue, Sep 12, 2023 at 03:27:05PM +0200, Boris Brezillon wrote:
> On Fri, 25 Aug 2023 15:45:49 +0200
> Christian König wrote:
>
> > I tried this patch with Nouveau and found a race condition:
> >
> > In drm_sched_run_job_work() the job is added to the pending_list via
> > drm
On Fri, 25 Aug 2023 15:45:49 +0200
Christian König wrote:
> I tried this patch with Nouveau and found a race condition:
>
> In drm_sched_run_job_work() the job is added to the pending_list via
> drm_sched_job_begin(), then the run_job() callback is called and the
> sched
Hi Maxime,
Hopefully less mangled formatting this time: turns out Thunderbird +
plain text is utterly unreadable, so that's one less MUA that is
actually usable to send email to kernel lists without getting shouted
at.
On Mon, 11 Sept 2023 at 15:46, Maxime Ripard wrote:
> On Mon, Sep 11, 2023 at
On Tue, Sep 12, 2023 at 02:18:18PM +0200, Boris Brezillon wrote:
> On Tue, 12 Sep 2023 12:46:26 +0200
> Danilo Krummrich wrote:
>
> > > I'm a bit worried that leaving this single vs multi-threaded wq
> > > decision to drivers is going to cause unnecessary pain, because what
> > > was previously a
Am 12.09.23 um 13:49 schrieb Karolina Stolarek:
Test initialization of ttm_resource using different memory domains.
Add tests for a system memory manager and functions that can be
tested without a fully-featured resource manager. Update
ttm_bo_kunit_init() to initialize BO's kref and reservation
Hi Liviu,
Thank you so much for reviewing this patch! I expect this patch to be
merged.
Best Regards,
baozhu.liu
-邮件原件-
发件人: liviu.du...@arm.com
发送时间: 2023年9月11日 22:46
收件人: Liu Lucas/刘保柱
抄送: airl...@gmail.com; dan...@ffwll.ch; dri-devel@lists.freedesktop.org;
linux-ker...@v
On 23.08.2023 14:56, Konrad Dybcio wrote:
> A740 builds upon the A730 IP, shuffling some values and registers
> around. More differences will appear when things like BCL are
> implemented.
>
> adreno_is_a740_family is added in preparation for more A7xx GPUs,
> the logic checks will be valid result
On Tue, 12 Sep 2023 12:46:26 +0200
Danilo Krummrich wrote:
> > I'm a bit worried that leaving this single vs multi-threaded wq
> > decision to drivers is going to cause unnecessary pain, because what
> > was previously a granted in term of run/cleanup execution order (thanks
> > to the kthread+st
On Fri, 08 Sep 2023, Ian Ray wrote:
> On Fri, Sep 01, 2023 at 05:52:02PM +0300, Jani Nikula wrote:
>>
>> On Fri, 01 Sep 2023, Jani Nikula wrote:
>> > The driver was originally added in commit fcfa0ddc18ed ("drm/bridge:
>> > Drivers for megachips-stdp-ge-b850v3-fw (LVDS-DP++)"). I tried to
>>
On Thu, 07 Sep 2023, Stephen Boyd wrote:
> Quoting Jani Nikula (2023-09-01 07:20:34)
>> The DP CTS test for EDID last block checksum expects the checksum for
>> the last block, invalid or not. Skip the validity check.
>>
>> For the most part (*), the EDIDs returned by drm_get_edid() will be
>> val
Remove a leftover definition of page order and pass an empty flag value
in ttm_pool_pre_populated().
Signed-off-by: Karolina Stolarek
---
drivers/gpu/drm/ttm/tests/ttm_pool_test.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ttm/tests/ttm_pool_test.c
b/d
Test reservation and release of TTM buffer objects. Add tests to check
pin and unpin operations.
Signed-off-by: Karolina Stolarek
---
drivers/gpu/drm/ttm/tests/Makefile| 1 +
drivers/gpu/drm/ttm/tests/ttm_bo_test.c | 620 ++
drivers/gpu/drm/ttm/tests/ttm_kunit
Test initialization, creation and destruction of ttm_tt instances.
Export ttm_tt_destroy and ttm_tt_create symbols for test purposes.
Signed-off-by: Karolina Stolarek
---
drivers/gpu/drm/ttm/tests/Makefile| 1 +
drivers/gpu/drm/ttm/tests/ttm_kunit_helpers.c | 20 ++
drivers/gpu/dr
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