On Mon, Jul 4, 2016 at 4:45 PM, Dan Carpenter
wrote:
> "brick" is allocated with devm_kzalloc() so freeing it with kfree()
> leads to a double free. We can just delete it.
That makes perfect sense.
Reviewed-by: Alexandre Courbot
2.4.3 -- Sometimes crashes
World of Warcraft 3.3.5 -- Most times works
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On Wed, Jul 6, 2016 at 9:23 PM, wrote:
> From: Wei Yongjun
>
> In case of error, the function iommu_domain_alloc() returns NULL
> pointer not ERR_PTR(). The IS_ERR() test in the return value check
> should be replaced with NULL test.
Reviewed-by: Alexandre Courbot
Thanks!
From: Fabio Estevam
regulator_set_voltage() may fail, so we better check its return value
and propagate it in the case of error.
Signed-off-by: Fabio Estevam
---
drivers/gpu/drm/imx/imx-tve.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/imx/imx-tve.c b
On 4 July 2016 at 07:27, Vinay Simha wrote:
> On Mon, Jul 4, 2016 at 4:22 AM, Emil Velikov
> wrote:
>> On 28 June 2016 at 16:59, Vinay Simha wrote:
>>> hi,
>>>
>>> Any further comments or reviews?
>>>
>> You still haven't covered my earlier suggestions, as such I cannot
>> give you a r-b :-( Th
On 30 June 2016 at 19:22, Jan Vesely wrote:
> Remove whitespace at the end of line.
> diff -b shows only two removed lines
>
> Signed-off-by: Jan Vesely
Pushed to master. Thanks Jan !
-Emil
Hi Dave,
Just a couple of fixes for amdgpu for 4.7:
- 2 small tonga powerplay fixes
- Additional Polaris fixes
The following changes since commit 88c087109b5fedaf9b61839d08543fdaf9d5ec39:
Merge tag 'drm-intel-fixes-2016-06-30' of
git://anongit.freedesktop.org/drm-intel into drm-fixes (2016-0
This allows the compiler to do type checking.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/imx/imx-ldb.c | 7 +--
drivers/gpu/drm/imx/imx-tve.c | 7 +--
drivers/gpu/drm/imx/ipuv3-crtc.c | 5 -
drivers/gpu/drm/imx/ipuv3-plane.c | 5 -
drivers/gpu/d
The internal bus configuration is imx-drm specific crtc state. Store it
in imx_crtc_state and let the encoder atomic_check callbacks determine
bus_flags, bus_format and the sync pins, possibly taking into account
the mode and the connector display info.
Signed-off-by: Philipp Zabel
---
drivers/g
With atomic modeset support, these callbacks are optional.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/imx/dw_hdmi-imx.c | 7 ---
drivers/gpu/drm/imx/parallel-display.c | 7 ---
2 files changed, 14 deletions(-)
diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c
b/drivers/gpu/drm/
Hi,
I have tested Liu Ying's imx drm atomic mode setting conversion series [1]
with three different outputs (DPI + eDP bridge, LVDS + panel, HDMI)
and noticed that in the LDB case bus_format handling doesn't work
correctly if the format is determined by the panel instead of the
device tree. In tha
On 5 July 2016 at 21:21, Rob Herring wrote:
> AOSP master now errors if LOCAL_SRC_FILES contains headers, so filter
> out header files from the source lists.
>
Pushed to master.
Thanks Rob.
-Emil
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Document basic simple-panel support for Sharp LQ101K1LY04
Signed-off-by: Joshua Clayton
Acked-by: Rob Herring
---
.../devicetree/bindings/display/panel/sharp,lq101k1ly04.txt| 7 +++
1 file changed, 7 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/
Add simple-panel support for the Sharp LQ101K1LY04i, which is
a 10 inch WXGA (1280x800) lvds panel.
Signed-off-by: Joshua Clayton
---
Reposting again in hopes of getting this into 4.8
drivers/gpu/drm/panel/panel-simple.c | 27 +++
1 file changed, 27 insertions(+)
dif
Ping!
- Tobias
Tobias Jakobi wrote:
> Currently enabling Exynos DRM support automatically pulls in
> lots of fbdev dependencies. However these deps are
> unnecessary since DRM core already enables them when
> needed.
>
> Signed-off-by: Tobias Jakobi
> ---
> drivers/gpu/drm/exynos/Kconfig | 4 -
On 07/06/2016 03:05 PM, Chris Wilson wrote:
> On Wed, Jul 06, 2016 at 12:17:55PM +0200, Mario Kleiner wrote:
>> Since i pulled the current drm-next tree i see strong flicker and
>> visual corruption during pageflipping, both in my own app, but also
>> in KDE4 and KDE5 Plasma with desktop compositio
Hello.
I have a question to experts of GPU/DRM subsystem.
Can I use a frame buffer for each display or subsystem involves only a
single frame buffer in emulation mode (DRM_FBDEV_EMULATION option)?
In my current configuration is created, only one frame buffer for the FIRST
display (fb0).
Are there
On Wed, Jul 06, 2016 at 12:17:55PM +0200, Mario Kleiner wrote:
> Since i pulled the current drm-next tree i see strong flicker and
> visual corruption during pageflipping, both in my own app, but also
> in KDE4 and KDE5 Plasma with desktop composition enabled. This
> happens on both Intel HD Ironak
Read DisplayPort branch device info from through debugfs
interface.
v2: use drm_dp_helper routines to collect data
v3: cleanup to match the drm_dp_helper.c patches introduced
earlier in this series
v4: move DP branch device info to function 'intel_dp_branch_device_info()'
Signed-off-by: Mika
DisplayPort branch device may define max supported bits per
component. Update display info based on this value if bpc
is defined.
v2: cleanup to match the drm_dp_helper.c patches introduced
earlier in this series
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/intel_dp.c | 9 +
Filter out a mode that exceeds the max pixel rate setting
for DP to VGA dongle. This is defined in DPCD register 0x81
if detailed cap info i.e. info field is 4 bytes long and
it is available for DP downstream port.
The register defines the pixel rate divided by 8 in MP/s.
v2: DPCD read outs and c
SW revision is mandatory field for DisplayPort branch
devices. This is defined in DPCD register field 0x50A.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/drm_dp_helper.c | 21 +
include/drm/drm_dp_helper.h | 2 ++
2 files changed, 23 insertions(+)
diff --git a/drivers
HW revision is mandatory field for DisplayPort branch
devices. This is defined in DPCD register field 0x509.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/drm_dp_helper.c | 21 +
include/drm/drm_dp_helper.h | 7 +++
2 files changed, 28 insertions(+)
diff --git a/dr
Read DisplayPort branch device id string.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/drm_dp_helper.c | 12
include/drm/drm_dp_helper.h | 2 ++
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 95d624a..40
Helper routine to read out maximum supported bits per
component for DisplayPort legay converters.
v2: Return early if detailed port cap info is not available.
Replace if-else ladder with switch-case (Ville)
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/drm_dp_helper.c | 42
Helper routine to read out maximum supported pixel rate
for DisplayPort legay VGA converter or TMDS clock rate
for other digital legacy converters. The helper returns
clock rate in kHz.
v2: Return early if detailed port cap info is not available.
Replace if-else ladder with switch-case (Ville)
Drop "VGA" from bits per component definitions as these
are also used by other standards such as DVI, HDMI,
DP++.
Signed-off-by: Mika Kahola
---
include/drm/drm_dp_helper.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/dr
Add missing DisplayPort downstream port types. The introduced
new port types are DP++ and Wireless.
Signed-off-by: Mika Kahola
---
include/drm/drm_dp_helper.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 4d85cf2..6e8b92e 10
Prep work for DP branch device handling
This series of patches reads DPCD register 0x80h for receiver
capabilities for DP branch devices. The branch device types are
converters for the following standards
- DP to VGA
- DP to DVI
- DP to HDMI
- DP++ dual mode
- Wireless WiGig
DPCD register d
On Mon, Jul 04, 2016 at 12:40:35PM +0200, Lukas Wunner wrote:
> Convert asciidoc-formatted docs to rst in accordance with Jonathan's and
> Jani's effort to use sphinx for kernel-doc rendering in 4.8.
Somebody help me out here. How do I verify this works and using sphinx? to build
the docs? Should
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Update kernel interface with new I915_GETPARAM ioctl entries for
pooled EU and min no. of eus in a pool. Add a wrapping function
for each parameter. Userspace drivers need these values when decide
the thread count. This kernel enabled pooled eu by default for BXT
and for fused down 2x6 parts it is
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A strange one. In Linux 4.7-rc4, at least as build by the Ubuntu
mainline ppa, gamma table updates via RandR don't work. No errors are
reported and the X-Server thinks everything went well, but on Intel
Ironlake and Ivybridge the updates don't have any visual effect.
The same problem doesn't ha
Hi Andrey,
On 5 July 2016 at 12:46, Ponomarenko Andrey
wrote:
> Hello,
>
> I'm working on a new project for backward compatibility analysis of the Linux
> ABIs. The report for libdrm 2.4.25-2.4.68 has been recently added to the
> project and updated every other day:
> http://abi-laboratory.pr
From: Wei Yongjun
In case of error, the function iommu_domain_alloc() returns NULL
pointer not ERR_PTR(). The IS_ERR() test in the return value check
should be replaced with NULL test.
Signed-off-by: Wei Yongjun
---
drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 2 +-
1 file changed, 1 i
Since i pulled the current drm-next tree i see strong flicker and visual
corruption during pageflipping, both in my own app, but also in KDE4 and
KDE5 Plasma with desktop composition enabled. This happens on both Intel
HD Ironake mobile (Apple MBP 2010) and HD-4000 Ivybridge mobile (Apple
macMi
This also brings over the C++ guard introduced recently in the kernel
headers.
Signed-off-by: Eric Anholt
---
Corresponding libdrm patch to the kernel branching support I sent out.
include/drm/vc4_drm.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/drm/vc4_d
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On 06.07.2016 06:06, Tejun Heo wrote:
> On Mon, Jul 04, 2016 at 12:58:32PM +0900, Michel Dänzer wrote:
>> On 02.07.2016 22:46, Tejun Heo wrote:
>>> On Sat, Jul 02, 2016 at 04:33:50PM +0530, Bhaktipriya Shridhar wrote:
alloc_workqueue replaces deprecated create_singlethread_workqueue().
>
According to E-EDID spec 1.3, table 3.9, a digital video sink with the
"DFP 1.x compliant TMDS" bit set is "signal compatible with VESA DFP 1.x
TMDS CRGB, 1 pixel / clock, up to 8 bits / color MSB aligned".
For such displays, the DFP spec 1.0, section 3.10 "EDID support" says:
"If the DFP monitor
For DP sinks which don't expose color depth via EDID, use
the drm_dp_sink_bpc() helper to derive the bpc of the sink.
This should handle DP native sinks with the "Assume 6 bpc if EDID
doesn't tell us" as mandated by DP spec. It gives more accurate
values for DP->legacy converters for HDMI, DVI and
drm_dp_sink_bpc() is meant as a fallback to be used by
kms drivers if a DP sink doesn't provide supported color
depth bpc via EDID.
It parses dpcd registers and optionally downstream port
registers read by the driver from DP AUX and passed to
the function to find out what the bpc of the connected
This reverts commit 013dd9e03872
("drm/i915/dp: fall back to 18 bpp when sink capability is unknown")
This commit introduced a regression into stable kernels,
as it reduces output color depth to 6 bpc for any video
sink connected to a Displayport connector if that sink
doesn't report a specific co
Bugzilla https://bugzilla.kernel.org/show_bug.cgi?id=105331
reports that the "AEO model 0" display is driven with 8 bpc
without dithering by default, which looks bad because that
panel is apparently a 6 bpc DP panel with faulty EDID.
A fix for this was made by commit 013dd9e03872
("drm/i915/dp: fa
Updated series to fix the regressions introduced into stable
kernels for active Displayport to dual-link DVI converters and
for active Displayport to VGA converters. Also to fix this stuff
better for Linux 4.8.
Patch 1 + 2 are needed to fix the regressions in the stable
kernels. These are meant fo
On Mon, Jul 04, 2016 at 10:55:09AM +0100, Mel Gorman wrote:
> On Mon, Jul 04, 2016 at 05:04:12PM +0900, Minchan Kim wrote:
> > > > How big ratio between highmem:lowmem do you think a problem?
> > > >
> > >
> > > That's a "how long is a piece of string" type question. The ratio does
> > > not mat
.
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http://pastebin.com/XHnF0Ur8
http://pastebin.com/gGxjWpde
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(whoops, apologies for the CHROMIUM tag in the subject line...)
On Tue, Jun 28, 2016 at 4:52 PM, Archit Taneja
wrote:
>
>
> On 06/27/2016 01:18 PM, Nicolas Boichat wrote:
>>
>> This driver supports single input, 2 output display mux (e.g.
>> HDMI mux), that provides its status via a GPIO.
>
>
>
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Hi Archit,
Sorry got swamped by other things and forgot to reply.
On Tue, Jun 28, 2016 at 4:28 PM, Archit Taneja
wrote:
>
>
> On 06/27/2016 01:18 PM, Nicolas Boichat wrote:
>>
>> Hi all,
>>
>> This is a follow up to the 2 patches to add support for ANX7688 sent here:
>> https://patchwork.kernel
Hello, Michel.
On Wed, Jul 06, 2016 at 12:12:52PM +0900, Michel Dänzer wrote:
> There is an ordering requirement between the two queues, but it's
> enforced by the driver (by only queuing the unpin work once a flip has
> completed, which only happens after the corresponding flip work has run).
O
esktop.org/archives/dri-devel/attachments/20160706/d9e714c3/attachment.html>
nd should catch it.
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