Reviewed-by: Nate DeSimone
-Original Message-
From: devel@edk2.groups.io On Behalf Of Ashley E Desimone
Sent: Friday, May 1, 2020 5:15 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Pandya, Puja
; Bjorge, Erik C ; Bret
Barkelew ; Agyeman, Prince
Subject: [edk2-devel] [edk2-s
For the series...
Reviewed-by: Nate DeSimone
-Original Message-
From: Desimone, Ashley E
Sent: Friday, May 1, 2020 1:40 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Pandya, Puja
; Bjorge, Erik C ; Bret
Barkelew ; Agyeman, Prince
Subject: [edk2-staging/EdkRepo] [PATCH 0/2
Pushed: https://github.com/tianocore/edk2-staging/commit/6fd03660
-Original Message-
From: devel@edk2.groups.io On Behalf Of Ashley E Desimone
Sent: Friday, May 1, 2020 5:15 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Pandya, Puja
; Bjorge, Erik C ; Bret
Barkelew ; Agyeman,
Pushed as 9120b007~..48a58d54
-Original Message-
From: Desimone, Ashley E
Sent: Friday, May 1, 2020 1:40 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Pandya, Puja
; Bjorge, Erik C ; Bret
Barkelew ; Agyeman, Prince
Subject: [edk2-staging/EdkRepo] [PATCH 0/2] EdkRepo: Remove
On 5/4/20 1:15 PM, Pete Batard wrote:
From: Andrei Warkentin
Fix for https://github.com/raspberrypi/firmware/issues/1376.
For the Pi 3, to properly configure miniUART, we need the core clock,
which can be vary between VideoCore firmare release or config.txt options.
Unfortunately, it's painfu
Hi Ard,
On 2020.05.05 11:05, Ard Biesheuvel wrote:
On 5/4/20 1:15 PM, Pete Batard wrote:
From: Andrei Warkentin
Fix for https://github.com/raspberrypi/firmware/issues/1376.
For the Pi 3, to properly configure miniUART, we need the core clock,
which can be vary between VideoCore firmare relea
On 5/5/20 1:54 PM, Pete Batard wrote:
Hi Ard,
On 2020.05.05 11:05, Ard Biesheuvel wrote:
On 5/4/20 1:15 PM, Pete Batard wrote:
From: Andrei Warkentin
Fix for https://github.com/raspberrypi/firmware/issues/1376.
For the Pi 3, to properly configure miniUART, we need the core clock,
which can
On 2020.05.05 13:05, Ard Biesheuvel wrote:
On 5/5/20 1:54 PM, Pete Batard wrote:
Hi Ard,
On 2020.05.05 11:05, Ard Biesheuvel wrote:
On 5/4/20 1:15 PM, Pete Batard wrote:
From: Andrei Warkentin
Fix for https://github.com/raspberrypi/firmware/issues/1376.
For the Pi 3, to properly configure
There are currently four platforms that are supported under SgiPkg and
all these four platforms have a common platform dsc file to allow these
to be built into a single binary. But the newer platforms that are
intended to be added to the SgiPkg differ to some extent on the software
programming inte
Changes since v4:
- Addressed all the comments from Ard.
- Split the patches into multiple smaller patches where applicable.
- Reworded the commit messages to be more accurate about the change
being introduced.
- Picked up Ard's review tags
Changes since v3:
- Addressed all the comments fr
Use the PcdChipCount constant to define the maximum number of chips
included in the multi-chip package. In addition to this, remove the
hardcoded value of the chip count in the MADT ACPI table of RD-N1-EdgeX2
platform and replace it with the number of chips specified by
'PcdChipCount'.
Signed-off-
Add a fdf include file for each supported platform. This include file
can be used to choose the ACPI table module to be included in the
flash image for the platform.
Signed-off-by: Aditya Angadi
---
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc | 1 +
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.f
Add Madt, Dsdt and Srat ACPI tables that are specific for RD-Daniel
Config-XLR platform. Reuse the rest of the shared ACPI tables in SgiPkg.
Signed-off-by: Aditya Angadi
---
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl | 125
Platform/ARM/SgiPkg/AcpiTables/RdDani
Add Madt and Dsdt ACPI tables that are specific for RD-Daniel Config-M
platform. Reuse the rest of the shared ACPI tables in SgiPkg.
Signed-off-by: Aditya Angadi
Reviewed-by: Ard Biesheuvel
---
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl | 118
Platform/ARM/SgiPk
The value of PcdCoreCount and PcdClusterCount are not same across all
ARM SGI/RD platforms. So move it form .dsc.inc file to platform specific
.dsc file and let platform define the value of these two PCDs.
Signed-off-by: Aditya Angadi
---
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc | 12 ++
Remove the duplication of the ACPI helper macros related to GIC
distributor, redistributor and ITS from each platform's MADT ACPI
table. Let these macros be defined in the common SgiAcpiHeader.h
file.
Signed-off-by: Aditya Angadi
---
Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc | 68 +
Arm's RD-Daniel Config-M platform is built using 16 Neoverse cores and
connected to 8GB of RAM. Add initial platform support for this platform.
Signed-off-by: Aditya Angadi
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 4 ++
Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.dsc |
Arm's RD-Daniel Config-XLR platform is a quad chip platform with each
chip having four Neoverse cores and 8GB of RAM attached to it. These
chips are coherently connected over CCIX interface and are put together
into a multi-chip package. Add initial support for this platform.
Signed-off-by: Aditya
The number of processing elements is hardcoded in the MADT ACPI table
of the RD-E1-Edge platform. Remove the hardcoded value and obtain the
core count on platform from PCDs instead.
Signed-off-by: Aditya Angadi
---
Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc | 5 -
1 file changed, 4 in
Move common platform description entries in platform specific DSDT to
a SSDT that can be reused on all SGI/RD platforms.
Signed-off-by: Aditya Angadi
Reviewed-by: Ard Biesheuvel
---
Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl | 70
+---
Platform/ARM/SgiPkg
From: Vijayenthiran Subramaniam
The RD-N1-Edge dual chip platform has an additional 8GB of memory
connected to the second chip. Add the SRAT ACPI table to describe
the proximity domain, base address and size of this memory.
Signed-off-by: Aditya Angadi
---
Platform/ARM/SgiPkg/AcpiTables/RdN1Ed
Newer RD platforms have different base address for GIC redistributors.
The size of the address space that GIC occupies is also different. So
let each platform define the values of GIC related PCDs by moving the
existing PCDs related to GIC distributor and redistributor addresses
from the .dsc.inc i
Add helper macros to create the memory affinity and gicc affinity
structures in the SRAT table.
Signed-off-by: Aditya Angadi
---
Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
b/Pla
Let the SGI-575 platform's MADT table be aligned with the MADT
table of the other RD platforms supported in the SgiPkg.
Signed-off-by: Aditya Angadi
---
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc | 130 +---
1 file changed, 31 insertions(+), 99 deletions(-)
diff --git a/Pla
From: Vijayenthiran Subramaniam
On a multi-chip platform, there are memory nodes connected to the
remote chips that are usable. Setup memory descriptor HOBs for all
the remote memory nodes. Use the remote chip memory offset value to
determine the base address for these remote memory nodes.
A new
The last change in moving away from single binary for all SGI/RD
platforms to independent binary for each platform is to let the platform
select only the ACPI table module that is required for the platform.
Each platform dsc file specifies the ACPI table module to use. All the
platform specific AC
On 5/4/20 3:57 PM, Ard Biesheuvel wrote:
Delete a couple of obsole driver from EmbeddedPkg. They have been moved
into edk2-platforms alongside the small set of development platforms
that still use them, but they are no long fit for use beyond that.
Diffs have been omitted for files that are comp
On Mon, May 04, 2020 at 15:57:22 +0200, Ard Biesheuvel wrote:
> Delete a couple of obsole driver from EmbeddedPkg. They have been moved
> into edk2-platforms alongside the small set of development platforms
> that still use them, but they are no long fit for use beyond that.
>
> Diffs have been om
The 16550 'miniUART' on the Raspberry Pi gets its input clock from
different sources on RPi3 and RPi3. Fix the logic that derives the
divisor for the 16550 baud clock on the respective platforms.
While at it, make the input clock PCD patchable for RPi3 so we can
manipulate it at runtime in a futur
The Raspberry Pi 3 derives its 16550 baud clock from the variable core
clock, and so any reprogramming of the baud rate needs to take the
actual core clock value into account.
Introduce a DXE phase version of DualSerialPortLib that discovers this
value in its constructor, using the RPi firmware pr
This proposes an alternative approach to the issue described in
https://github.com/raspberrypi/firmware/issues/1376.
Instead of fiddling with HobLib internals and relying on headers being
included in the correct order, this replaces all DEBUG uses of SerialPortLib
with an implementation that doesn
On DEBUG builds that use the serial port directly for debug output,
every module reinitializes the UART hardware, through the DebugLib
constructor calling SerialPortInitialize.
This is unnecessary, but usually harmless. However, in cases where this
requires information that is non-trivial to obtai
In preparation of creating different versions of DualSerialPortLib,
split off the parts that will be shared between all versions.
Signed-off-by: Ard Biesheuvel
---
Platform/RaspberryPi/Library/DualSerialPortLib/DualSerialPortLib.inf | 5
+-
Platform/RaspberryPi/Library/DualSerialPortLib/D
Query the firmware for the clock rate that is used to drive the
16550 baud clock, so that we can program the correct baud rate.
Co-authored-by: Pete Batard
Co-authored-by: Andrei Warkentin
Co-authored-by: Ard Biesheuvel
Signed-off-by: Pete Batard
Signed-off-by: Ard Biesheuvel
---
Platform/Ra
On Fri, May 01, 2020 at 11:19:32 +0530, Pankaj Bansal wrote:
> From: Pankaj Bansal
>
> Add an I2c library to control the i2c controllers to communicate
> with I2c device.
>
> We need this functionality in a lib because this is going to be used
> in PrePeiCore sec module to get the System clock i
On 04/30/20 23:12, Tom Lendacky wrote:
> On 4/30/20 1:58 PM, Laszlo Ersek wrote:
>> Hi Tom,
>
> Hi Laszlo,
>
>>
>> On 04/22/20 19:41, Lendacky, Thomas wrote:
>>> BZ:
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2198&data=02%7C0
Acked-by: Samer El-Haj-Mahmoud
> -Original Message-
> From: r...@edk2.groups.io On Behalf Of Leif Lindholm
> via Groups.Io
> Sent: Monday, March 23, 2020 3:06 PM
> To: devel@edk2.groups.io; r...@edk2.groups.io
> Cc: fel...@ami.com; Mark Doran ; Andrew Fish
> ; Laszlo Ersek ; Michael D
On 05/01/20 00:09, Tom Lendacky wrote:
> On 4/30/20 4:12 PM, Tom Lendacky wrote:
>> On 4/30/20 1:58 PM, Laszlo Ersek wrote:
>>> Hi Tom,
>>
>> Hi Laszlo,
>>
>>>
>>> On 04/22/20 19:41, Lendacky, Thomas wrote:
BZ:
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tia
On 05/04/20 18:41, Tom Lendacky wrote:
> Is there an easy way to run everything that this link points, too? Is it
> just creating a pull request that does this? I don't want to take up a
> lot of your time, so if there's some documentation on how to run an
> integration test to find and fix issues
CC Leif
On 05/01/20 22:00, Rebecca Cran wrote:
> Allow users who didn't clone one of the TianoCore repos from a
> canonical URL to specify the name of the repo (edk2, edk2-platforms
> or edk2-non-osi) when running SetupGit.py to allow them to configure
> their repo properly.
>
> The new option is
Replace the switch statement in the main parser loop with a table-driven
approach. Use the ParseAcpiStruct () method to resolve how each
Static Resource Allocation Structure given should be parsed.
Print the offset of each Static Resource Allocation Structure from the
start of the table.
Consolid
Replace the switch statement in the main parser loop with a table-driven
approach. Use the ParseAcpiStruct () method to resolve how each
Interrupt Controller Structure given should be parsed.
Enumerate all structures found in the Multiple APIC Description Table
(MADT) on a per-type basis. Print th
On 5/5/20 4:08 PM, Leif Lindholm wrote:
On Mon, May 04, 2020 at 15:57:22 +0200, Ard Biesheuvel wrote:
Delete a couple of obsole driver from EmbeddedPkg. They have been moved
into edk2-platforms alongside the small set of development platforms
that still use them, but they are no long fit for use
Replace the switch statement in the main parser loop with a table-driven
approach. Use the ParseAcpiStruct () method to resolve how each
Platform Timer Structure given should be parsed.
Enumerate all structures found in the Generic Timer Description Table
(GTDT) on a per-type basis. Print the offs
This patch series modifies existing ACPI table parsers. Now, structure
type values are used as indexes to access a centralized database
containing information on how to parse each structure in the table.
Replacing a 'switch' statements with arrays indexed by the Type value
allows consolidation of
Define and implement an interface to streamline metadata collection and
validation for structures present in each ACPI table.
Most ACPI tables define substructures which constitute the table.
These substructures are identified by their 'Type' field value. The
range of possible 'Type' values is def
Replace the switch statement in the main parser loop with a table-driven
approach. Use the ParseAcpiStruct () method to resolve how each IORT
Node given should be parsed.
Enumerate all structures found in the IO Remapping Table (IORT) on a
per-type basis. Replace calls to AsciiSPrint () with the
P
Replace the switch statement in the main parser loop with a table-driven
approach. Use the ParseAcpiStruct () method to resolve how each
Processor Topology Structure given should be parsed.
Enumerate all structures found in the Processor Properties Topology
Table (PPTT) on a per-type basis.
Conso
On 5/5/20 6:02 PM, kette...@xs4all.nl wrote:
From: Mark Kettenis
The SoftIron Overdrive 1000 does not have a BMC so don't advertise
the IPMI KCS interface.
Signed-off-by: Mark Kettenis
Thanks Mark
Reviewed-by: Ard Biesheuvel
Pushed as 72d6a1e804cb..03fb86be4146
---
Platform/SoftIron/
On 05/04/20 13:48, Philippe Mathieu-Daudé wrote:
> On 4/30/20 11:06 PM, Rebecca Cran wrote:
>> I only updated links to the top-level mailing list, not any links to
>> individual messages.
>>
>> Signed-off-by: Rebecca Cran
>> ---
>> HardFeatureFreeze.md |
From: Mark Kettenis
The SoftIron Overdrive 1000 does not have a BMC so don't advertise
the IPMI KCS interface.
Signed-off-by: Mark Kettenis
---
Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 2 --
1 file changed, 2 deletions(-)
diff --git a/Platform/SoftIron/Overdrive1000Board/
On 05/04/20 13:45, Philippe Mathieu-Daudé wrote:
> On 5/4/20 1:09 AM, Rebecca Cran wrote:
>> Add a null implementation library for QemuFwCfgLib, in order to
>> support building PciHostBridgeLib for bhyve.
>>
>> Signed-off-by: Rebecca Cran
>> Cc: Jordan Justen
>> Cc: Laszlo Ersek
>> Cc: Ard Biesh
Nate, if you run into this issue again please let me know and I can send out a
new version.
Thanks,
-Erik
-Original Message-
From: Desimone, Nathaniel L
Sent: Monday, May 4, 2020 8:59 PM
To: Bjorge, Erik C ; devel@edk2.groups.io
Cc: Desimone, Ashley E ; Pandya, Puja
; Bret Barkelew ;
On 5/5/20 4:50 PM, Ard Biesheuvel wrote:
The 16550 'miniUART' on the Raspberry Pi gets its input clock from
different sources on RPi3 and RPi3. Fix the logic that derives the
This should be 'Rpi3 and RPi4'
divisor for the 16550 baud clock on the respective platforms.
While at it, make the in
On 5/5/20 4:50 PM, Ard Biesheuvel wrote:
Query the firmware for the clock rate that is used to drive the
16550 baud clock, so that we can program the correct baud rate.
Co-authored-by: Pete Batard
Co-authored-by: Andrei Warkentin
Co-authored-by: Ard Biesheuvel
Signed-off-by: Pete Batard
Sign
On 5/5/20 3:01 PM, Aditya Angadi via groups.io wrote:
Changes since v4:
- Addressed all the comments from Ard.
- Split the patches into multiple smaller patches where applicable.
- Reworded the commit messages to be more accurate about the change
being introduced.
- Picked up Ard's rev
On 5/1/20 3:17 PM, Lendacky, Thomas via groups.io wrote:
BZ:
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2340&data=02%7C01%7Cthomas.lendacky%40amd.com%7Ca1268b8e6d554b6c55ca08d7ee0cbf84%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%
On 05/04/20 04:18, Rebecca Cran wrote:
> Introduce BaseResetSystemLibBhyve.inf, to support powering off
> bhyve guests.
>
> Signed-off-by: Rebecca Cran
> Cc: Jordan Justen
> Cc: Laszlo Ersek
> Cc: Ard Biesheuvel
> ---
> Laszlo: I couldn't find your email specifying specific changes to
> make,
On 05/04/20 23:06, Nikita Leshenko wrote:
> The controller supports up to 8 targets in practice (Not reported by the
> controller, but based on the implementation of the virtual device),
> report them in GetNextTarget and GetNextTargetLun. The firmware will
> then try to communicate with them and c
On 05/04/20 23:06, Nikita Leshenko wrote:
> Reset and send the IO controller initialization request. The reply is
> read back to complete the doorbell function but it isn't useful to us
> because it doesn't contain relevant data or status codes.
>
> See "LSI53C1030 PCI-X to Dual Channel Ultra320 S
On 05/04/20 23:06, Nikita Leshenko wrote:
> Machines should be able to boot after this commit. Tested with different
> Linux distributions (Ubuntu, CentOS) and different Windows
> versions (Windows 7, Windows 10, Server 2016).
>
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2390
> Signed-o
On 05/04/20 23:05, Nikita Leshenko wrote:
> This series adds driver support for:
> - LSI53C1030
> - SAS1068
> - SAS1068E
>
> These controllers are widely supported by QEMU, VirtualBox and VMWare.
> This work is part of the more general agenda of enhancing OVMF boot
> device support to have feature
Hi Tom,
On 05/01/20 22:17, Lendacky, Thomas wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2340
>
> Commit 2db0ccc2d7fe ("UefiCpuPkg: Update CpuExceptionHandlerLib pass
> XCODE5 tool chain") introduced binary patching into the exception handling
> support. CPU exception handling is al
On 05/01/20 22:17, Lendacky, Thomas wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2340
>
> Use the XCODE5 CpuExceptionHandlerLib library in place of the standard
> library when building with the XCODE5 toolchain. The XCODE5 version of
> the library performs binary patching and should
On 5/5/20 4:39 PM, Laszlo Ersek wrote:
Hi Tom,
On 05/01/20 22:17, Lendacky, Thomas wrote:
BZ:
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2340&data=02%7C01%7Cthomas.lendacky%40amd.com%7C4d398c73a4bc4674d36608d7f13cce1d%7C3dd896
On 05/01/20 22:17, Lendacky, Thomas wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2340
>
> Now that an XCODE5 specific CpuExceptionHandlerLib library is in place,
> revert the changes made to the ExceptionHandlerAsm.nasm in commit
> 2db0ccc2d7fe ("UefiCpuPkg: Update CpuExceptionHandle
On 05/01/20 22:17, Lendacky, Thomas wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2340
>
> Use the XCODE5 CpuExceptionHandlerLib library in place of the standard
> library when building with the XCODE5 toolchain. The XCODE5 version of
> the library performs binary patching and should
Eric, Ray,
can one of you please approve, and also merge, this patch?
It's been on the list for two weeks now (and you were CC'd). I didn't
want to go ahead and merge it myself without at least an ACK from one of
you.
Thanks
Laszlo
On 04/22/20 18:55, Laszlo Ersek wrote:
> On 04/22/20 00:05, Leo
Today we just have an option to hide DT entirely, while ACPI
is always exposed. This change extends the option to
provide all three choices:
- ACPI only
- ACPI + DT
- DT only
Why? Because not all OSes will prefer DT over ACPI when both are available.
To do this cleanly, move the variable structur
*Reminder:* TianoCore Bug Triage - APAC / NAMO
*When:* Wednesday, 6 May 2020, 9:30am to 10:30am, (GMT+08:00) Asia/Chongqing
*Where:* https://bluejeans.com/889357567?src=join_info
View Event ( https://edk2.groups.io/g/devel/viewevent?eventid=773823 )
*Organizer:* Brian Richardson brian.richard..
Acked-by: Eric Dong
Hi Laszlo,
I saw you already provided Review-by tag and I can't verify the change, so I
don't add comments for this patch.
I will provide Acked-by tag for the similar case next time.
I have pushed this change.
Thanks,
Eric
From: devel@edk2.groups.io [mailto:devel@edk2.gro
I can't search the patch in master, anyone can pull the patch if it haven't
been pull.
Best Regards
guomin
From: devel@edk2.groups.io On Behalf Of Guomin Jiang
Sent: Monday, March 23, 2020 4:13 PM
To: Kun Qin ; devel@edk2.groups.io; Kinney, Michael D
; Xu, Wei6
Cc: Gao, Liming
Subject: Re: [e
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Laszlo Ersek
> Sent: Tuesday, May 5, 2020 11:30 PM
> To: Tom Lendacky ; Dong, Eric
> ; devel@edk2.groups.io
> Cc: Justen, Jordan L ; Ard Biesheuvel
> ; Kinney, Michael D
> ; Gao, Liming ; Ni, Ra
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2536
This commit adds DxeAslUpdateLib library support in IntelSiliconPkg,
which allows AML to be updated in DXE.
Signed-off-by: Miki Shindo
Cc: Sai Chaganty
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Prince Agyeman
Cc: Ray Ni
Acked-by: Nate DeS
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2536
Callers of DxeAslUpdateLib don't have to call InitializeAslUpdateLib()
but the library itself runs it internally. This commit deletes
the redundant calls in caller side and makes it an internal call.
LocateAcpiTableByOemTableId() is unrefere
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2536
This commit removes redundant InitializeAslUpdateLib call
as DxeAslUpdateLib itself calls it internally.
Signed-off-by: Miki Shindo
Cc: Sai Chaganty
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Prince Agyeman
Cc: Ray Ni
Acked-by: Nate DeSimo
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2536
Callers of DxeAslUpdateLib don't have to call InitializeAslUpdateLib()
but the library itself runs it internally. This commit deletes
the redundant calls in caller side and makes it an internal call.
LocateAcpiTableByOemTableId() is unrefere
Patch 7/7 of this series adds DxeAslUpdateLib support in IntelSiliconPkg
so each project can consume it.
As the existing DxeAslUpdateLib in SiliconPkg have different header files,
this series of patches resolve the inconsistency and avoid build failure.
Also some of unreferenced contents are clean
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2536
This commit removes redundant InitializeAslUpdateLib calls
as DxeAslUpdateLib itself calls it internally.
Signed-off-by: Miki Shindo
Cc: Sai Chaganty
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Prince Agyeman
Cc: Ray Ni
Acked-by: Nate DeSim
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2536
This commit removes redundant InitializeAslUpdateLib call
as DxeAslUpdateLib itself calls it internally.
Signed-off-by: Miki Shindo
Cc: Sai Chaganty
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Prince Agyeman
Cc: Ray Ni
Acked-by: Nate DeSimo
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2536
Callers of DxeAslUpdateLib don't have to call InitializeAslUpdateLib()
but the library itself runs it internally. This commit makes it
an internal call. LocateAcpiTableByOemTableId() is unreferenced externally
so this commit makes it an inte
Hi Guomin,
The patch was just pushed. Thanks a lot.
BR,
Wei
From: Jiang, Guomin
Sent: Wednesday, May 6, 2020 9:36 AM
To: devel@edk2.groups.io; Jiang, Guomin ; Kun Qin
; Kinney, Michael D ; Xu,
Wei6
Cc: Gao, Liming
Subject: RE: [edk2-devel] [PATCH] FmpDevicePkg/FmpDxe: Fix uninitialized
poin
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2686
some GUID include character ' or " ascii value, transfer to string will
catch the wrong value.
Cc: Bob Feng
Cc: Liming Gao
Signed-off-by: Yunhua Feng
---
BaseTools/Source/Python/Common/Misc.py | 10 +-
1 file changed, 5 insertio
On 5/6/20 2:59 AM, Andrei Warkentin wrote:
Today we just have an option to hide DT entirely, while ACPI
is always exposed. This change extends the option to
provide all three choices:
- ACPI only
- ACPI + DT
- DT only
Why? Because not all OSes will prefer DT over ACPI when both are available.
T
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