From: Vijayenthiran Subramaniam <vijayenthiran.subraman...@arm.com>
On a multi-chip platform, there are memory nodes connected to the
remote chips that are usable. Setup memory descriptor HOBs for all
the remote memory nodes. Use the remote chip memory offset value to
determine the base address for these remote memory nodes.
A new PCD 'PcdChipCount' is added in the ArmSgiTokenSpace that a
platform can use to define the number of coherently connected chips
in a multi-chip package.
Signed-off-by: Aditya Angadi <aditya.ang...@arm.com>
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 8 ++
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 3 +
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 87
+++++++++++++++++++-
Platform/ARM/SgiPkg/SgiPlatform.dec | 3 +
4 files changed, 100 insertions(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index d87fb2b5409f..728abbea97e8 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -80,6 +80,14 @@
// Remote chip address offset (4TB per chip)
#define SGI_REMOTE_CHIP_MEM_OFFSET(n) ((1ULL << 42) * (n))
+// Base address of the DRAM1 block in a remote chip
+#define SYSTEM_MEMORY_BASE_REMOTE(ChipId) \
+ (SGI_REMOTE_CHIP_MEM_OFFSET (ChipId) + FixedPcdGet64
(PcdSystemMemoryBase))
+
+// Base address of the DRAM2 block in a remote chip
+#define DRAM_BLOCK2_BASE_REMOTE(ChipId) \
+ (SGI_REMOTE_CHIP_MEM_OFFSET (ChipId) + FixedPcdGet64
(PcdDramBlock2Base))
+
// ARM platform description data.
typedef struct {
UINTN PlatformId;
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
index a918afef5fba..464a7cde4513 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -46,6 +46,9 @@ [FixedPcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
+
+ gArmSgiTokenSpaceGuid.PcdChipCount
+
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmTokenSpaceGuid.PcdFvBaseAddress
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index 8d0ad4ec9c84..e30819c5cd55 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -16,7 +16,8 @@
#include <SgiPlatform.h>
// Total number of descriptors, including the final "end-of-table" descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 13
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \
+ (11 + (FixedPcdGet32 (PcdChipCount) * 2))
/**
Returns the Virtual Memory Map of the platform.
@@ -52,6 +53,48 @@ ArmPlatformGetVirtualMemoryMap (
FixedPcdGet64 (PcdDramBlock2Base),
FixedPcdGet64 (PcdDramBlock2Size));
+#if (FixedPcdGet32 (PcdChipCount) > 1)
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ SYSTEM_MEMORY_BASE_REMOTE (1),
+ PcdGet64 (PcdSystemMemorySize));
+
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ DRAM_BLOCK2_BASE_REMOTE (1),
+ FixedPcdGet64 (PcdDramBlock2Size));
+
+#if (FixedPcdGet32 (PcdChipCount) > 2)
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ SYSTEM_MEMORY_BASE_REMOTE (2),
+ FixedPcdGet64 (PcdSystemMemorySize));
+
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ DRAM_BLOCK2_BASE_REMOTE (2),
+ FixedPcdGet64 (PcdDramBlock2Size));
+
+#if (FixedPcdGet32 (PcdChipCount) > 3)
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ SYSTEM_MEMORY_BASE_REMOTE (3),
+ FixedPcdGet64 (PcdSystemMemorySize));
+
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ DRAM_BLOCK2_BASE_REMOTE (3),
+ FixedPcdGet64 (PcdDramBlock2Size));
+#endif
+#endif
+#endif
+
ASSERT (VirtualMemoryMap != NULL);
Index = 0;
@@ -122,6 +165,48 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length = PcdGet64 (PcdDramBlock2Size);
VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+#if (FixedPcdGet32 (PcdChipCount) > 1)
+ // Chip 1 DDR Block 1 - (2GB)
+ VirtualMemoryTable[++Index].PhysicalBase = SYSTEM_MEMORY_BASE_REMOTE (1),
+ VirtualMemoryTable[Index].VirtualBase = SYSTEM_MEMORY_BASE_REMOTE (1),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
+ VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ // Chip 1 DDR Block 2 - (6GB)
+ VirtualMemoryTable[++Index].PhysicalBase = DRAM_BLOCK2_BASE_REMOTE (1),
+ VirtualMemoryTable[Index].VirtualBase = DRAM_BLOCK2_BASE_REMOTE (1),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdDramBlock2Size);
+ VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+#if (FixedPcdGet32 (PcdChipCount) > 2)
+ // Chip 2 DDR Block 1 - (2GB)
+ VirtualMemoryTable[++Index].PhysicalBase = SYSTEM_MEMORY_BASE_REMOTE (2),
+ VirtualMemoryTable[Index].VirtualBase = SYSTEM_MEMORY_BASE_REMOTE (2),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
+ VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ // Chip 2 DDR Block 2 - (6GB)
+ VirtualMemoryTable[++Index].PhysicalBase = DRAM_BLOCK2_BASE_REMOTE (2),
+ VirtualMemoryTable[Index].VirtualBase = DRAM_BLOCK2_BASE_REMOTE (2),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdDramBlock2Size);
+ VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+#if (FixedPcdGet32 (PcdChipCount) > 3)
+ // Chip 3 DDR Block 1 - (2GB)
+ VirtualMemoryTable[++Index].PhysicalBase = SYSTEM_MEMORY_BASE_REMOTE (3),
+ VirtualMemoryTable[Index].VirtualBase = SYSTEM_MEMORY_BASE_REMOTE (3),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
+ VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ // Chip 3 DDR Block 2 - (6GB)
+ VirtualMemoryTable[++Index].PhysicalBase = DRAM_BLOCK2_BASE_REMOTE (3),
+ VirtualMemoryTable[Index].VirtualBase = DRAM_BLOCK2_BASE_REMOTE (3),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdDramBlock2Size);
+ VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+#endif
+#endif
+#endif
+
// PCI Configuration Space
VirtualMemoryTable[++Index].PhysicalBase = PcdGet64
(PcdPciExpressBaseAddress);
VirtualMemoryTable[Index].VirtualBase = PcdGet64
(PcdPciExpressBaseAddress);
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec
b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 97c1e40349ea..dac7fdc308b1 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -46,6 +46,9 @@ [PcdsFixedAtBuild]
gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x00000000|UINT32|0x00000008
gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|0x00000000|UINT32|0x00000009
+ # Chip count on the platform
+ gArmSgiTokenSpaceGuid.PcdChipCount|1|UINT32|0x0000000B
+
# GIC
gArmSgiTokenSpaceGuid.PcdGicSize|0|UINT64|0x0000000A
--
2.17.1
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