Link to Gitlab branch with my changes is
Commits · topics/Rename_RdFremont_To_RdV3 · Infra Solutions / Reference Design
/ platsw / edk2-platforms · GitLab (arm.com) (
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/commits/topics/Rename_RdFremont_To_RdV3
)
-=-=-
Hi Sami,
Please find the link for gitlab branch.
Commits · topics/Rename_RdFremont_To_RdV3 · Infra Solutions / Reference Design
/ platsw / edk2-platforms · GitLab (arm.com) (
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/commits/topics/Rename_RdFremont_To_RdV3
Change all occurrences of RD-Fremont to RD-V3 to align with the official
platform name.
Link to gitlab branch with the patches in this series -
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/commits/topics/Rename_RdFremont_To_RdV3
Prabin CA (1):
Platform/Sgi
Change all occurrences of RD-Fremont to RD-V3 to align with the official
platform name.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/{RdFremont/RdFremont.dsc => RdV3/RdV3.dsc}
| 6 +++---
Platform/ARM/SgiPkg/AcpiTables/{RdFremontAcpiTables.inf => RdV3AcpiTables.inf
Hi Sami,
Thank you for reviewing the patches. Yes that is fine, you can make the changes
locally and merge to upstream.
*Thanks,*
*Prabin CA*
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Hi,
Need review on this patches, waiting for a month to get the review on this
patch set. Any review on this would be really helpful.
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Thanks Sami, for your review I have addressed your review comments and
incorporated the changes. Please find the link to new patch series
https://edk2.groups.io/g/devel/message/117378
From: Sami Mujawar via Groups.Io
Sent: Sunday, March 31, 2024 3:07 PM
To: Prabin CA ; devel@edk2.groups.io
Thanks Sami, for your review I have addressed your review comments and
incorporated the changes. Please find the link to new patch series
https://edk2.groups.io/g/devel/message/117378
> -Original Message-
> From: Sami Mujawar
> Sent: Sunday, March 31, 2024 5:36 PM
> T
Extend the SMBIOS support for RD-Fremont platform. RD-Fremont is a
16 core platform with Poseidon CPU. Each of the CPUs include
64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.
Signed-off-by: Prabin CA
-V2 platform.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 7
+--
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 9
++---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
From: Pranav Madhu
Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7 ++-
Platform/ARM/SgiPkg
nding the variant of the RD-N2 platform being build. RD-V2
platform is an example of such a variant.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/RdN2/RdN2.dsc | 4
Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
ff-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatform.dec | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec
b/Platform/ARM/SgiPkg/SgiPlatform.dec
index af7887e54126..d540dbff2d19 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/S
/infra-solutions/reference-design/platsw/edk2-platforms/-/commits/topics/rdv2/?ref_type=heads
Prabin CA (3):
Platform/Sgi: Add a new PCD for L2 cache size
Platform/Sgi: Use PCD value for L2 cache size in PPTT table
Platform/Sgi: Extend SMBIOS support for RD-Fremont
Pranav Madhu (2
the _CPC object with a value address of 0 for the performance
limited register (we will make the similar changes for older platforms as well
and post as a new series). Please do let us know if you have any suggestions on
using any specific register for the performance limited register. Your input
Hi Levi,
The patches to use dynamic tables are under development and so the PCIe support
will follow after your patches.
Thanks,
Prabin CA
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addition to this, RD-Fremont platform does not
support CPPC revision 1 and below. So update the _OSC method to let OSPM
know about this fact.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl | 162
RD-Fremont platform supports two LPI states, LPI1 (Standby WFI) and LPI3
(Power-down). The cluster supports LPI2 (Power-down) state. The LPI
implementation also supports combined power state for core and cluster.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables
Extend the SMBIOS support for RD-Fremont platform. RD-Fremont is a
16 core platform with Poseidon CPU. Each of the CPUs include
64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.
Signed-off-by: Prabin CA
as well to define the PCDs for its generation of
platforms.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap3.dsc.inc | 71
Platform/ARM/SgiPkg/RdFremont/RdFremont.dsc | 55 +++
Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc | 10 +++
3
ation for
adding support for this platform, add the initial set of ACPI tables and
reuse existing ACPI tables as applicable to boot a operating system on
this platform.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 73
Platform/ARM/SgiPkg/AcpiT
Introducing a flag called PCIE_ENABLE, which can be set to TRUE or
FALSE from the respective .dsc files to enable or disable the
PCIe support. As not all reference design platforms have PCIe support
enabled, this flag is introduced.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 6 +-
3 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
From: Vivek Gautam
On RD-N2 and previous generation platforms, the base address was within
32-bit region. However, on upcoming platforms, the SMMUv3 base address
is beyond 32-bit address region. So, update the datatype of SMMUv3 base
PCD.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
mentioned instead of the 'performance limited register address'.
Correcting this typo. However, it's important to retain the reference to
the performance limited register in the macro for future use, as it will
prove useful once functionalities such as power metering devices are
enabled.
mmits/topics/rdfremont/
Prabin CA (7):
Platform/Sgi: Correct typo in defining CPPC performance limited register
Platform/Sgi: Refactor system memory base and size definitions
Platform/Sgi: Introduce a flag to enable PCIe support for RD Platforms
Platform/Sgi: Add initial support for RD-Fr
-Fremont platform does not support CPPC
revision 1 and below. So update the _OSC method to let OSPM know about
this fact.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl | 162
2
RD-Fremont platform supports two LPI states, LPI1 (Standby WFI) and LPI3
(Power-down). The cluster supports LPI2 (Power-down) state. The LPI
implementation also supports combined power state for core and cluster.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables
ation for
adding support for this platform, add the initial set of ACPI tables and
reuse existing ACPI tables as applicable to boot a operating system on
this platform.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 73
Platform/ARM/SgiPkg/AcpiT
Extend the SMBIOS support for RD-Fremont platform. RD-Fremont is a
16 core platform with Poseidon CPU. Each of the CPUs include
64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.
Signed-off-by: Prabin CA
as well to define the PCDs for its generation of
platforms.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap3.dsc.inc | 71
Platform/ARM/SgiPkg/RdFremont/RdFremont.dsc | 55 +++
Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc | 10 +++
3
Introducing a flag called PCIE_ENABLE, which can be set to TRUE or
FALSE from the respective .dsc files to enable or disable the
PCIe support. As not all reference design platforms have PCIe support
enabled, this flag is introduced.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 6 +-
3 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
From: Vivek Gautam
On RD-N2 and previous generation platforms, the base address was within
32-bit region. However, on upcoming platforms, the SMMUv3 base address
is beyond 32-bit address region. So, update the datatype of SMMUv3 base
PCD.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
ssage/116262
Link to gitlab branch with the patches in this series -
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/commits/topics/rdfremont/
Prabin CA (6):
Platform/Sgi: Refactor system memory base and size definitions
Platform/Sgi: Introduce a flag to enable
-N2-Cfg3 has 12 GIC ITS blocks when compared to the
other RD-N2 variants that have 6 GIC ITS blocks.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/RdN2Cfg3/RdN2Cfg3.dsc
| 58
Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
-V2 platform.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 7
+--
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 9
++---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
From: Pranav Madhu
Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7 ++-
Platform/ARM/SgiPkg
A new PCD named PcdPlatformVariant is introduced to specify the variant
number of a platform. This PCD can be used to select platform variant
specific configurations. The default value of this PCD is 0 which
selects the base variant.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
SgiPlatformMm.dsc.inc to resolve this dependency.
[1]:
https://github.com/tianocore/edk2/commit/8db39c60cdf35e0a53ccdbccf7e152ab41f54f4c
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
b
access). So,
remove the use of +nofp gcc build option flag.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index
opics/rdn2cfg3_rdv2_updates
Omkar Anand Kulkarni (1):
Platform/Sgi: remove +nofp gcc option flag
Prabin CA (2):
Platform/Sgi: Add a PCD to specify platform variant
Platform/Sgi: Add support for RD-N2-Cfg3 platform
Pranav Madhu (2):
Platform/Sgi: Define RD-V2 platform id values
Platform/Sgi: Extend SMBIOS su
Thanks, resolved.
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Hi Pierre,
Since, Pcie is not enabled in the platform we have to suppress the Pcie related
modules while in booting, other wise it cause the boot hazard to the platforms.
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Hi Pierre,
Thanks for reviewing it, I have followed the links you send to correct the
signed-off. Please review the patches.
This patch have dependencies with
https://edk2.groups.io/g/devel/message/113732. I had already mentioned same in
the cover letter of this Patches too.
-=-=-=-=-=-=-=-=
-Fremont platform does not support CPPC
revision 1 and below. So update the _OSC method to let OSPM know about
this fact.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl | 162
2
RD-Fremont platform supports two LPI states, LPI1 (Standby WFI) and LPI3
(Power-down). The cluster supports LPI2 (Power-down) state. The LPI
implementation also supports combined power state for core and cluster.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables
Extend the SMBIOS support for RD-Fremont platform. RD-Fremont is a
16 core platform with Poseidon CPU. Each of the CPUs include
64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.
Signed-off-by: Prabin CA
as well to define the PCDs for its generation of
platforms.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap3.dsc.inc | 71
Platform/ARM/SgiPkg/RdFremont/RdFremont.dsc | 55 +++
Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc | 10 +++
3
ation for
adding support for this platform, add the initial set of ACPI tables and
reuse existing ACPI tables as applicable to boot a operating system on
this platform.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 73
Platform/ARM/SgiPkg/AcpiT
Introducing a flag called PCIE_ENABLE, which can be set to TRUE or
FALSE from the respective .dsc files to enable or disable the
PCIe support. As not all reference design platforms have PCIe support
enabled, this flag is introduced.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 6 +-
3 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
From: Vivek Gautam
On RD-N2 and previous generation platforms, the base address was within
32-bit region. However, on upcoming platforms, the SMMUv3 base address
is beyond 32-bit address region. So, update the datatype of SMMUv3 base
PCD.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
eries -
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/tree/topics/rdfremont
Prabin CA (6):
Platform/Sgi: Refactor system memory base and size definitions
Platform/Sgi: Introduce a flag to enable PCIe support for RD Platforms
Platform/Sgi: Add initial support f
-V2 platform.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 7
+--
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 9
++---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
From: Pranav Madhu
Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7 ++-
Platform/ARM/SgiPkg
-N2-Cfg3 has 12 GIC ITS blocks when compared to the
other RD-N2 variants that have 6 GIC ITS blocks.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/RdN2Cfg3/RdN2Cfg3.dsc
| 58
Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
A new PCD named PcdPlatformVariant is introduced to specify the variant
number of a platform. This PCD can be used to select platform variant
specific configurations. The default value of this PCD is 0 which
selects the base variant.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
SgiPlatformMm.dsc.inc to resolve this dependency.
[1]:
https://github.com/tianocore/edk2/commit/8db39c60cdf35e0a53ccdbccf7e152ab41f54f4c
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
b
access). So,
remove the use of +nofp gcc build option flag.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index
p gcc option flag
Prabin CA (2):
Platform/Sgi: Add a PCD to specify platform variant
Platform/Sgi: Add support for RD-N2-Cfg3 platform
Pranav Madhu (2):
Platform/Sgi: Define RD-V2 platform id values
Platform/Sgi: Extend SMBIOS support for RD-V2 platform
Vijayenthiran Subramaniam (1):
Platfor
-Fremont platform does not support CPPC
revision 1 and below. So update the _OSC method to let OSPM know about
this fact.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl | 162
2
RD-Fremont platform supports two LPI states, LPI1 (Standby WFI) and LPI3
(Power-down). The cluster supports LPI2 (Power-down) state. The LPI
implementation also supports combined power state for core and cluster.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables
Extend the SMBIOS support for RD-Fremont platform. RD-Fremont is a
16 core platform with Poseidon CPU. Each of the CPUs include
64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.
Signed-off-by: Prabin CA
as well to define the PCDs for its generation of
platforms.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap3.dsc.inc | 71
Platform/ARM/SgiPkg/RdFremont/RdFremont.dsc | 55 +++
Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc | 10 +++
3
ation for
adding support for this platform, add the initial set of ACPI tables and
reuse existing ACPI tables as applicable to boot a operating system on
this platform.
Signed-off-by: Shriram K
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 73
Pla
Introducing a flag called PCIE_ENABLE, which can be set to TRUE or
FALSE from the respective .dsc files to enable or disable the
PCIe support. As not all reference design platforms have PCIe support
enabled, this flag is introduced.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 6 +-
3 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
From: Vivek Gautam
On RD-N2 and previous generation platforms, the base address was within
32-bit region. However, on upcoming platforms, the SMMUv3 base address
is beyond 32-bit address region. So, update the datatype of SMMUv3 base
PCD.
Signed-off-by: Vivek Gautam
Signed-off-by: Prabin CA
/rdfremont
Prabin CA (6):
Platform/Sgi: Refactor system memory base and size definitions
Platform/Sgi: Introduce a flag to enable PCIe support for RD Platforms
Platform/Sgi: Add initial support for RD-Fremont platform
Platform/Sgi: Extend SMBIOS support for RD-Fremont
Platform/Sgi: Low Power
-V2 platform.
Signed-off-by: Pranav Madhu
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 7
+--
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 9
++---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe
From: Pranav Madhu
Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.
Signed-off-by: Pranav Madhu
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7
-N2-Cfg3 has 12 GIC ITS blocks when compared to the
other RD-N2 variants that have 6 GIC ITS blocks.
Signed-off-by: Vijayenthiran Subramaniam
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/RdN2Cfg3/RdN2Cfg3.dsc
| 58
Platform/ARM/SgiPkg
A new PCD named PcdPlatformVariant is introduced to specify the variant
number of a platform. This PCD can be used to select platform variant
specific configurations. The default value of this PCD is 0 which
selects the base variant.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
SgiPlatformMm.dsc.inc to resolve this dependency.
[1]:
https://github.com/tianocore/edk2/commit/8db39c60cdf35e0a53ccdbccf7e152ab41f54f4c
Signed-off-by: Vijayenthiran Subramaniam
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a
access). So,
remove the use of +nofp gcc build option flag.
Signed-off-by: Omkar Anand Kulkarni
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
b/Platform/ARM
patches in this series -
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/tree/topics/rdn2cfg3_rdv2_updates
Omkar Anand Kulkarni (1):
Platform/Sgi: remove +nofp gcc option flag
Prabin CA (2):
Platform/Sgi: Add a PCD to specify platform variant
Platform/Sgi: Add
RD-Fremont platform supports two LPI states, LPI1 (Standby WFI) and LPI3
(Power-down). The cluster supports LPI2 (Power-down) state. The LPI
implementation also supports combined power state for core and cluster.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables
-Fremont platform does not support CPPC
revision 1 and below. So update the _OSC method to let OSPM know about
this fact.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl | 162
2
Extend the SMBIOS support for RD-Fremont platform. RD-Fremont is a
16 core platform with Poseidon CPU. Each of the CPUs include
64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.
Signed-off-by: Prabin CA
as well to define the PCDs for its generation of
platforms.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap3.dsc.inc | 71
Platform/ARM/SgiPkg/RdFremont/RdFremont.dsc | 55 +++
Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc | 10 +++
3
Introducing a flag called PCIE_ENABLE, which can be set to TRUE or
FALSE from the respective .dsc files to enable or disable the
PCIe support. As not all reference design platforms have PCIe support
enabled, this flag is introduced.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
ation for
adding support for this platform, add the initial set of ACPI tables and
reuse existing ACPI tables as applicable to boot a operating system on
this platform.
Signed-off-by: Shriram K
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 73
Pla
.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 8 +++-
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 6 +-
3 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
From: Vivek Gautam
On RD-N2 and previous generation platforms, the base address was within
32-bit region. However, on upcoming platforms, the SMMUv3 base address
is beyond 32-bit address region. So, update the datatype of SMMUv3 base
PCD.
Signed-off-by: Vivek Gautam
Signed-off-by: Prabin CA
with the patches in this series -
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/commits/topics/rdfremont/
Prabin CA (6):
Platform/Sgi: Refactor system memory base and size definitions
Platform/Sgi: Introduce a flag to enable PCIe support for RD Platforms
-V2 platform.
Signed-off-by: Pranav Madhu
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 7
+--
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 9
++---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe
From: Pranav Madhu
Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.
Signed-off-by: Pranav Madhu
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7
-N2-Cfg3 has 12 GIC ITS blocks when compared to the
other RD-N2 variants that have 6 GIC ITS blocks.
Signed-off-by: Vijayenthiran Subramaniam
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/RdN2Cfg3/RdN2Cfg3.dsc
| 58
Platform/ARM/SgiPkg
A new PCD named PcdPlatformVariant is introduced to specify the variant
number of a platform. This PCD can be used to select platform variant
specific configurations. The default value of this PCD is 0 which
selects the base variant.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
SgiPlatformMm.dsc.inc to resolve this dependency.
[1]:
https://github.com/tianocore/edk2/commit/8db39c60cdf35e0a53ccdbccf7e152ab41f54f4c
Signed-off-by: Vijayenthiran Subramaniam
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a
fined reference to `__stack_chk_fail'
Signed-off-by: Vijayenthiran Subramaniam
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
b/Platform/
access). So,
remove the use of +nofp gcc build option flag.
Signed-off-by: Omkar Anand Kulkarni
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
b/Platform/ARM
patches in this series -
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/tree/topics/rdn2cfg3_rdv2_updates
Omkar Anand Kulkarni (1):
Platform/Sgi: remove +nofp gcc option flag
Prabin CA (3):
Platform/Sgi: add no-stack-protector flag for StMM builds
Platform/Sgi
-V2 platform.
Signed-off-by: Pranav Madhu
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 7
+--
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 9
++---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe
-N2-Cfg3 has 12 GIC ITS blocks when compared to the
other RD-N2 variants that have 6 GIC ITS blocks.
Signed-off-by: Vijayenthiran Subramaniam
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/RdN2Cfg3/RdN2Cfg3.dsc
| 58
Platform/ARM/SgiPkg
From: Pranav Madhu
Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.
Signed-off-by: Pranav Madhu
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7
A new PCD named PcdPlatformVariant is introduced to specify the variant
number of a platform. This PCD can be used to select platform variant
specific configurations. The default value of this PCD is 0 which
selects the base variant.
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg
-V2 platform.
Signed-off-by: Pranav Madhu
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 7
+--
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 9
++---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe
-N2-Cfg3 has 12 GIC ITS blocks when compared to the
other RD-N2 variants that have 6 GIC ITS blocks.
Signed-off-by: Vijayenthiran Subramaniam
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/RdN2Cfg3/RdN2Cfg3.dsc
| 58
Platform/ARM/SgiPkg
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