From: Pavan Nikhilesh
Use WFE LDP loop while polling for GETWORK completion for better
power savings.
Disabled by default and can be enabled by configuring meson with
'RTE_ARM_USE_WFE' enabled.
Signed-off-by: Pavan Nikhilesh
---
v4 Changes:
- Split patches
v5 Changes:
- Update release notes
Hi Srujana,
On 2/27/24 06:56, Srujana Challa wrote:
Disable use_va flag for VDPA backend type and fixes the issues
with shadow control command processing, when it is disabled.
This will help to make virtio user driver works in IOVA
as PA mode for vDPA backend.
It is too late for v24.03, but a
Hi,
> -Original Message-
> From: Michael Baum
> Sent: Monday, February 26, 2024 3:19 PM
> To: dev@dpdk.org
> Cc: Matan Azrad ; Dariusz Sosnowski
> ; Raslan Darawsheh ; Slava
> Ovsiienko ; Ori Kam ;
> Suanming Mou
> Subject: [PATCH v7 0/3] net/mlx5: add compare item support
>
> Add HWS s
> From: Tyler Retzlaff [mailto:roret...@linux.microsoft.com]
> Sent: Tuesday, 27 February 2024 06.41
>
> RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Provide
> inline functions to access compatible type pointer to rearm_data
> and rx_descriptor_fields1 which will allow direct refer
> @@ -607,8 +603,7 @@ struct rte_mbuf {
> struct rte_mempool *pool; /**< Pool from which mbuf was allocated. */
>
> /* second cache line - fields only used in slow path or on TX */
> - RTE_MARKER cacheline1 __rte_cache_min_aligned;
> -
> + alignas(RTE_CACHE_LINE_MIN_SIZE)
This
Signed-off-by: Isaac Boukris
---
app/dumpcap/main.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/app/dumpcap/main.c b/app/dumpcap/main.c
index d57db0589a..88cec43086 100644
--- a/app/dumpcap/main.c
+++ b/app/dumpcap/main.c
@@ -830,11 +830,12 @@ static void enable_pdump
Hi Chengwen,
Thanks for the review and feedback. I will send the next version with suggested
changes.
Thanks,
Amit Shukla
> -Original Message-
> From: fengchengwen
> Sent: Wednesday, February 21, 2024 8:56 AM
> To: Gowrishankar Muthukrishnan ;
> dev@dpdk.org; Amit Prakash Shukla
> Cc:
> Subject: [PATCH v6 01/39] eal: use C11 alignas
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by con
> Subject: [PATCH v6 02/39] eal: redefine macro to be integer literal for MSVC
>
> MSVC __declspec(align(#)) is limited and accepts only integer literals
> as opposed to constant expressions. define XMM_SIZE to be 16 instead of
> sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
> com
This patchset adds support for two new QAT devices.
A new GEN3 device, and a GEN5 device, both of which have
wireless slice support for algorithms such as ZUC-256.
Symmetric, asymmetric and compression are all supported
for these devices.
v3:
- Fixed typos in commit and code comments.
- Repla
Adding GEN5 files for handling GEN LCE specific operations.
These files are inherited from the existing files/APIs
which has some changes specific GEN5 requirements
Also updated the mailmap file.
Signed-off-by: Nishikant Nayak
---
v3:
- Removed use of linux/kernel.h macro to fix ARM compilati
Adding GEN LCE specific macros which is required for updating
the support for GEN LCE features.
Also this patch adds other macros which is being used by GEN LCE
Specific APIs.
Signed-off-by: Nishikant Nayak
---
v2:
- Renamed device from GEN 5 to GEN LCE.
- Removed unused code.
- Updat
This patch handles the changes required for updating the common
header fields specific to GEN LCE, Also added/updated of the response
processing APIs based on GEN LCE requirement.
Signed-off-by: Nishikant Nayak
---
v2:
- Renamed device from GEN 5 to GEN LCE.
- Removed unused code.
- U
Adding one new unit test code for validating the features
added as part of GCM with 64 byte AAD.
The new test case adds one new test for GCM algo for both
encrypt and decrypt operations.
Signed-off-by: Nishikant Nayak
---
v2:
- Removed unused code.
- Added one new unit test, AAD with GCM
> Subject: [PATCH v6 05/39] ring: use C11 alignas
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by c
> Subject: [PATCH v6 14/39] acl: use C11 alignas
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by co
> Subject: [PATCH v6 11/39] ethdev: use C11 alignas
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by
> Subject: [PATCH v6 08/39] mbuf: use C11 alignas
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by c
This patchset adds a new QAT LCE device.
The device currently only supports symmetric crypto,
and only the AES-GCM algorithm.
v4:
- Fixed cover letter, v3 included the wrong details relating
to another patchset.
v3:
- Fixed typos in commit and code comments.
- Replaced use of linux/kerne
Adding GEN5 files for handling GEN LCE specific operations.
These files are inherited from the existing files/APIs
which has some changes specific GEN5 requirements
Also updated the mailmap file.
Signed-off-by: Nishikant Nayak
---
v3:
- Removed use of linux/kernel.h macro to fix ARM compilati
Adding GEN LCE specific macros which is required for updating
the support for GEN LCE features.
Also this patch adds other macros which is being used by GEN LCE
Specific APIs.
Signed-off-by: Nishikant Nayak
---
v2:
- Renamed device from GEN 5 to GEN LCE.
- Removed unused code.
- Updat
This patch handles the changes required for updating the common
header fields specific to GEN LCE, Also added/updated of the response
processing APIs based on GEN LCE requirement.
Signed-off-by: Nishikant Nayak
---
v2:
- Renamed device from GEN 5 to GEN LCE.
- Removed unused code.
- U
Adding one new unit test code for validating the features
added as part of GCM with 64 byte AAD.
The new test case adds one new test for GCM algo for both
encrypt and decrypt operations.
Signed-off-by: Nishikant Nayak
---
v2:
- Removed unused code.
- Added one new unit test, AAD with GCM
> Subject: [PATCH v6 27/39] mempool: use C11 alignas
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported b
> Subject: [PATCH v6 32/39] bpf: use C11 alignas
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by con
> Subject: [PATCH v6 30/39] ipsec: use C11 alignas
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by
> Subject: [PATCH v6 39/39] ip_frag: use C11 alignas
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported b
> Subject: [PATCH v3 02/16] bpf: stop using variadic argument pack extension
>
> Use RTE_LOG_LINE_PREFIX instead of RTE_LOG_LINE in macro expansions
> which allow a prefix and arguments to be inserted into the log line
> without the need to use the ## args variadic argument pack extension.
>
>
> Subject: [PATCH v3 16/16] ip_frag: stop using variadic argument pack extension
>
> Remove use of args... and just use __VA_ARGS__. The macros expanding
> the argument pack do not require args extension to remove trailing comma.
>
> Signed-off-by: Tyler Retzlaff
> ---
> lib/ip_frag/ip_frag_
On 2/23/2024 3:15 PM, fengchengwen wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
Hi Vipin,
On 2023/12/20 0:40, Vipin Varghese wrote:
Modify the user display data with total average latency per wo
Hi Chengwen,
Please see my reply in-line.
Thanks
> -Original Message-
> From: fengchengwen
> Sent: Wednesday, February 21, 2024 11:54 AM
> To: Amit Prakash Shukla ; Cheng Jiang
>
> Cc: dev@dpdk.org; Jerin Jacob ; Vamsi Krishna Attunuru
> ; Nithin Kumar Dabilpuram
> ; Anoob Joseph ;
> G
> -Original Message-
> From: Nayak, Nishikanta
> Sent: Tuesday, February 27, 2024 9:40 AM
> To: dev@dpdk.org
> Cc: Power, Ciara ; Ji, Kai ; Kusztal,
> ArkadiuszX ; S Joshi, Rakesh
> ; Nayak, Nishikanta
> Subject: [PATCH v4 0/4] add QAT GEN LCE device
>
> This patchset adds a new QAT L
On 2/26/2024 7:35 AM, fengchengwen wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
Hi Vipin,
On 2023/12/20 19:03, Vipin Varghese wrote:
From: Vipin Varghese
Replace pktmbuf pool with mempool, thi
> From: Mattias Rönnblom [mailto:mattias.ronnb...@ericsson.com]
> Sent: Sunday, 25 February 2024 16.03
[...]
> +static void *
> +lcore_var_alloc(size_t size, size_t align)
> +{
> + void *handle;
> + void *value;
> +
> + offset = RTE_ALIGN_CEIL(offset, align);
> +
> + if (offset +
> -Original Message-
> From: Stephen Hemminger
> + sigaction(SIGHUP, NULL, &origaction);
Why do we need this ? Can't be this direct sigaction(SIGHUP, &action, NULL)
without a below if code?
Can you please explain how this works.
> + if (origaction.sa_handler == SIG_DFL)
> Subject: [PATCH v6 02/23] mbuf: consolidate driver asserts for mbuf struct
>
> Collect duplicated RTE_BUILD_BUG_ON checks from drivers and place them
> at global scope with struct rte_mbuf definition using static_assert.
>
> Signed-off-by: Tyler Retzlaff
> ---
> lib/mbuf/rte_mbuf_core.h |
> Subject: [PATCH v6 20/23] mbuf: remove and stop using rte marker fields
>
> RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Remove
> RTE_MARKER fields from rte_mbuf struct.
>
> Maintain alignment of fields after removed cacheline1 marker by placing
> C11 alignas(RTE_CACHE_LINE_MI
Hi Anoob, reply inline.
Regards,
Radu
On 27-Feb-24 5:19 AM, Anoob Joseph wrote:
Hi Radu,
Thanks for making the changes. I've one more question. Please see inline.
Thanks,
Anoob
-Original Message-
From: Radu Nicolau
Sent: Monday, February 26, 2024 3:56 PM
To: dev@dpdk.org
Cc: Anoob
> Subject: [EXT] Re: [PATCH] net/virtio-user: support IOVA as PA mode for vDPA
> backend
>
> External Email
>
> --
> Hi Srujana,
>
> On 2/27/24 06:56, Srujana Challa wrote:
> > Disable use_va flag for VDPA backend type and fixes
A simple comment in vhost_user_msg_handler() is not that robust.
Add a lock_all_qps property to message handlers so that their
implementation can add a build check and assert a vq is locked.
Signed-off-by: David Marchand
Reviewed-by: Maxime Coquelin
---
Changes since v3:
- directly called stati
> Subject: RE: [PATCH v2] app/testpmd: use Tx preparation in txonly engine
>
> > > >>> TSO breaks when MSS spans more than 8 data fragments. Those
> > > >>> packets will be dropped by Tx preparation API, but it will
> > > >>> cause
> > > >>> MDD event if txonly forwarding engine does
Hi Bruce,
I see you are the lucky delegate for this patch :-)
https://patchwork.dpdk.org/project/dpdk/patch/20240130100027.39466-1-ktray...@redhat.com/
Just wondering if any comment and if it's planned for 23.03 or later
release ?
thanks,
Kevin.
On 30/01/2024 10:00, Kevin Traynor wrote:
> When
On Mon, Feb 26, 2024 at 8:17 PM Morten Brørup
wrote:
>
> > From: Jerin Jacob [mailto:jerinjac...@gmail.com]
> > Sent: Monday, 26 February 2024 09.34
> >
> > On Fri, Feb 23, 2024 at 7:30 PM Morten Brørup
> > wrote:
> > >
> > > Bugfix: The vlan in the bulletin does not contain a VLAN header, only
Add the necessary logic to get firmware version from firmware file, and
only reload the firmware when the firmware version changed.
Also add a device argument which can force reload the firmware and
ignore the firmware version.
Peng Zhang (3):
net/nfp: add the elf module
net/nfp: reload the f
From: Peng Zhang
Add the elf module, which can get mip information from the
firmware ELF file.
Signed-off-by: Peng Zhang
Reviewed-by: Chaoyong He
Reviewed-by: Long Wu
---
drivers/net/nfp/meson.build |1 +
drivers/net/nfp/nfpcore/nfp_elf.c | 1079 +
drive
From: Peng Zhang
Add the interfaces of getting firmware version from BSP and ELF file,
only reloading the firmware when the version is different, which
means the firmware has changed.
This will accelerate the average startup time for both
multi-PF and single-PF firmware.
Signed-off-by: Peng Zha
From: Peng Zhang
Add an option to force reload the firmware.
This option can be ignored in some case, for example:
When using a 2 port NFP card and both with this reload firmware option,
only the first one will cause the firmware reload and the second one
will be ignored.
Signed-off-by: Peng Zh
On the attempt to create a flow rule with:
- matching on REPRESENTED_PORT,
- matching on outer VLAN tag,
- matching on inner VLAN tag,
- METER action,
flow splitting mechanism for handling metering flows was causing
memory corruption. It was assumed that suffix flow will have a single
VLAN item (
Hi Radu,
Please see inline.
Thanks,
Anoob
> -Original Message-
> From: Radu Nicolau
> Sent: Tuesday, February 27, 2024 3:41 PM
> To: Anoob Joseph
> Cc: sta...@dpdk.org; Volodymyr Fialko ; Ting-Kai Ku
> ; Ciara Power ; Kai Ji
> ; Akhil Goyal ; dev@dpdk.org
> Subject: Re: [EXT] [PATCH v3
+To: Raslan, regarding MLX5 patch
> From: Jerin Jacob [mailto:jerinjac...@gmail.com]
> Sent: Tuesday, 27 February 2024 12.01
>
> On Mon, Feb 26, 2024 at 8:17 PM Morten Brørup
> wrote:
> >
> > > From: Jerin Jacob [mailto:jerinjac...@gmail.com]
> > > Sent: Monday, 26 February 2024 09.34
> > >
> >
This patchset adds a new QAT LCE device.
The device currently only supports symmetric crypto,
and only the AES-GCM algorithm.
v5:
- Fixed compilation issue by replacing __u8 with uint8_t.
v4:
- Fixed cover letter, v3 included the wrong details relating
to another patchset.
v3:
- Fixed ty
Adding GEN5 files for handling GEN LCE specific operations.
These files are inherited from the existing files/APIs
which has some changes specific GEN5 requirements
Also updated the mailmap file.
Signed-off-by: Nishikant Nayak
Acked-by: Ciara Power
---
v5:
- Replaced usage of __u8 with uint8
Adding GEN LCE specific macros which is required for updating
the support for GEN LCE features.
Also this patch adds other macros which is being used by GEN LCE
Specific APIs.
Signed-off-by: Nishikant Nayak
Acked-by: Ciara Power
---
v2:
- Renamed device from GEN 5 to GEN LCE.
- Removed u
Adding one new unit test code for validating the features
added as part of GCM with 64 byte AAD.
The new test case adds one new test for GCM algo for both
encrypt and decrypt operations.
Signed-off-by: Nishikant Nayak
Acked-by: Ciara Power
---
v2:
- Removed unused code.
- Added one new u
This patch handles the changes required for updating the common
header fields specific to GEN LCE, Also added/updated of the response
processing APIs based on GEN LCE requirement.
Signed-off-by: Nishikant Nayak
Acked-by: Ciara Power
---
v2:
- Renamed device from GEN 5 to GEN LCE.
- Remov
Hi Vipin,
On 2024/2/27 17:57, Varghese, Vipin wrote:
>
> On 2/26/2024 7:35 AM, fengchengwen wrote:
>> Caution: This message originated from an External Source. Use proper caution
>> when opening attachments, clicking links, or responding.
>>
>>
>> Hi Vipin,
>>
>> On 2023/12/20 19:03, Vipin Vargh
On 30/01/2024 10:00, Kevin Traynor wrote:
When vf issues a reset to pf there is a 50 msec wait plus an additional
max of 1 msec for the pf to indicate the reset is complete before
timeout.
In some cases, it is seen that the reset is timing out, in which case
the reset does not complete and an er
Hi Vipin,
On 2024/2/27 17:50, Varghese, Vipin wrote:
>
> On 2/23/2024 3:15 PM, fengchengwen wrote:
>> Caution: This message originated from an External Source. Use proper caution
>> when opening attachments, clicking links, or responding.
>>
>>
>> Hi Vipin,
>>
>> On 2023/12/20 0:40, Vipin Varghe
Hi,
> -Original Message-
> From: Michael Baum
> Sent: Monday, February 26, 2024 3:46 PM
> To: dev@dpdk.org
> Cc: Matan Azrad ; Dariusz Sosnowski
> ; Raslan Darawsheh ; Slava
> Ovsiienko ; Ori Kam ;
> Suanming Mou
> Subject: [PATCH v3 0/7] net/mlx5: support copy from inner fields
>
> Thi
There are use cases where a SA should be able to use different cryptodevs on
different lcores, for example there can be cryptodevs with just 1 qp per VF.
For this purpose this patch relaxes the check in create lookaside session
function.
Also add a check to verify that a CQP is available for the c
This patchset adds support for sharing indirect METER_MARK flow actions
between ports, when flow engine is configured with
RTE_FLOW_PORT_FLAG_SHARE_INDIRECT.
v4:
- Rebased.
v3:
- Rebased on top of v24.03-rc1.
- Fixed completion polling issue with meter queues.
v2:
- Updated release notes.
Dar
Move mlx5_flow_meter_init() and mlx5_flow_meter_uinit()
to module for meter operations.
Signed-off-by: Dariusz Sosnowski
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow_hw.c| 203
drivers/net/mlx5/mlx5_flow_meter.c | 207 +
2 files c
This patch adds support for sharing meter mark actions between multiple
ports of the same physical NIC.
Meter objects pool, meter mark actions and meter profiles can be
created only on the host port. Guest ports are allowed to use meter
objects created on the host port through indirect actions. Di
On 2024-02-27 10:58, Morten Brørup wrote:
From: Mattias Rönnblom [mailto:mattias.ronnb...@ericsson.com]
Sent: Sunday, 25 February 2024 16.03
[...]
+static void *
+lcore_var_alloc(size_t size, size_t align)
+{
+ void *handle;
+ void *value;
+
+ offset = RTE_ALIGN_CEIL(offset,
>
> --
> There are use cases where a SA should be able to use different cryptodevs on
> different lcores, for example there can be cryptodevs with just 1 qp per VF.
> For this purpose this patch relaxes the check in create lookasi
Patches 1 and 2 contain fixes for existing implementation of
connection tracking flow actions.
Patch 3 adds support for sharing connection tracking flow actions
between ports when ports' flow engines are configured with
RTE_FLOW_PORT_FLAG_SHARE_INDIRECT flag set.
Patch 4 is based on the previous
In mlx5 PMD, handles to indirect connection tracking flow actions
are encoded in 32-bit unsigned integers as follows:
- Bits 31-29 - indirect action type.
- Bits 28-25 - port on which connection tracking action was created.
- Bits 24-0 - index of connection tracking object.
Macro defining a bit s
In mlx5 PMD, handles to indirect connection tracking flow actions
are encoded as 32-bit unsigned integers, where port ID is stored
in bits 28-25. Because of this, connection tracking flow actions
cannot be created on ports with IDs higher than 15.
This patch adds missing validation.
Fixes: 463170a
From: Suanming Mou
This commit adds cross port CT object sharing.
Shared CT object shares the same DevX objects, but allocate port's
own action locally. Once the CT object is shared between two flows
in different ports, the two flows use their own local action with
the same offset index.
The sh
This patch removes the owner port index from integer
representation of indirect action handle in mlx5 PMD for conntrack
flow actions.
This index is not needed when HW Steering flow engine is enabled,
because either:
- port references its own indirect actions or,
- port references indirect actions
On the attempt to create a flow rule with:
- matching on REPRESENTED_PORT,
- matching on outer VLAN tag,
- matching on inner VLAN tag,
- METER action,
flow splitting mechanism for handling metering flows was causing
memory corruption. It was assumed that suffix flow will have a single
VLAN item (
Rather than have a block of code as example that gets unaligned as
time passes, add literal includes.
The coding style guide points at the cfgfile library, let's use it too
as an example.
Fixes: 97433132c2ed ("lib: use per line logging in helpers")
Signed-off-by: David Marchand
---
doc/guides/
Performance improvement is done for Tx fastpath flag MBUF_NOFF when
tx_compl_ena is false and mbuf has an external buffer.
In such case, Instead of individual external mbuf free before LMTST,
a chain of external mbuf will be created and free all after LMTST.
This not only improve the performance bu
> From: Mattias Rönnblom [mailto:hof...@lysator.liu.se]
> Sent: Tuesday, 27 February 2024 14.44
>
> On 2024-02-27 10:58, Morten Brørup wrote:
> >> From: Mattias Rönnblom [mailto:mattias.ronnb...@ericsson.com]
> >> Sent: Sunday, 25 February 2024 16.03
> >
> > [...]
> >
> >> +static void *
> >> +lco
Hello Dodji,
On Tue, Feb 27, 2024 at 6:44 AM Tyler Retzlaff
wrote:
>
> RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Remove
> RTE_MARKER fields from rte_mbuf struct.
>
> Maintain alignment of fields after removed cacheline1 marker by placing
> C11 alignas(RTE_CACHE_LINE_MIN_SIZE).
The method to initialize tag registers by using capability bits is
not supported on some old NICs. In the meanwhile, the HWS for flow
rule insertion is not supported either. There is no need to
initialize HWS only resource on the old NICs.
Fixes: 48041ccbaa8d ("net/mlx5: initialize HWS flow regist
Improve dma-perf application to support PCI dev and SG copy,
along with additional supports as below:
- validate copied memory
- skip tests if not opted.
v9:
- Review suggestions.
Amit Prakash Shukla (2):
app/dma-perf: add skip support
app/dma-perf: add PCI device support
Gowrishankar Muth
From: Gowrishankar Muthukrishnan
Validate copied memory to ensure DMA copy did not fail.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Anoob Joseph
Acked-by: Chengwen Feng
---
app/test-dma-perf/benchmark.c | 21 -
app/test-dma-perf/main.c | 16 +++-
From: Gowrishankar Muthukrishnan
Add SG copy support.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Anoob Joseph
Acked-by: Chengwen Feng
---
v9:
- SG config variables renamed.
app/test-dma-perf/benchmark.c | 278 +-
app/test-dma-perf/config.ini | 25 +
On Tue, Feb 20, 2024 at 02:57:35PM +, Parthakumar Roy wrote:
> The default value for RTE_PKTMBUF_HEADROOM used to be set in
> config/rte_config.h. This patch removes it from the file and
> instead, a meson option, pkt_mbuf_headroom, is introduced to make
> headroom tunable from the build proces
Add support to test performance for "device to memory" and
"memory to device" data transfer.
Signed-off-by: Amit Prakash Shukla
Acked-by: Anoob Joseph
Acked-by: Chengwen Feng
---
v9:
- PCI config parsing using kvargs.
app/test-dma-perf/benchmark.c | 117 ++
app
> From: David Marchand [mailto:david.march...@redhat.com]
> Sent: Tuesday, 27 February 2024 16.18
>
> Hello Dodji,
>
> On Tue, Feb 27, 2024 at 6:44 AM Tyler Retzlaff
> wrote:
> >
> > RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Remove
> > RTE_MARKER fields from rte_mbuf struct.
>
> > diff --git a/app/test-dma-perf/config.ini
> > b/app/test-dma-perf/config.ini index cddcf93c6e..f460b93414 100644
> > --- a/app/test-dma-perf/config.ini
> > +++ b/app/test-dma-perf/config.ini
> > @@ -9,6 +9,8 @@
> > ; "buf_size" denotes the memory size of a single operation.
> > ; "dma_ring_si
> From: Bruce Richardson [mailto:bruce.richard...@intel.com]
> Sent: Tuesday, 27 February 2024 17.02
>
> While this is not likely a setting that many will need to change, it's
> not
> the first time I've heard of users looking to adjust it.
>
> Because it's such a simple change, I'd support havin
Hi,
> -Original Message-
> From: Wathsala Vithanage
> Sent: Thursday, February 15, 2024 8:27 PM
> To: NBU-Contact-Thomas Monjalon (EXTERNAL) ;
> Dariusz Sosnowski ; Slava Ovsiienko
> ; Ori Kam ; Suanming Mou
> ; Matan Azrad
> Cc: dev@dpdk.org; n...@arm.com; Wathsala Vithanage
> ; Honnappa
Hi,
> -Original Message-
> From: Yunjian Wang
> Sent: Tuesday, February 20, 2024 11:32 AM
> To: dev@dpdk.org
> Cc: Dariusz Sosnowski ; Ori Kam
> ; Matan Azrad ; Slava Ovsiienko
> ; Suanming Mou ;
> luyi...@huawei.com; Pengfei Sun ;
> sta...@dpdk.org
> Subject: [PATCH] net/mlx5: fix use aft
Hi,
> -Original Message-
> From: Slava Ovsiienko
> Sent: Tuesday, February 20, 2024 1:45 PM
> To: dev@dpdk.org
> Cc: Matan Azrad ; Raslan Darawsheh
> ; Ori Kam ; Dariusz Sosnowski
> ; sta...@dpdk.org
> Subject: [PATCH] net/mlx5: fix error packets drop in the regular Rx
>
> When packet ge
Hi,
> -Original Message-
> From: Bing Zhao
> Sent: Wednesday, February 21, 2024 5:23 AM
> To: Suanming Mou ; Raslan Darawsheh
> ; dev@dpdk.org
> Cc: Matan Azrad ; Slava Ovsiienko
> ; Ori Kam ; Dariusz Sosnowski
> ; sta...@dpdk.org; Michael Baum
>
> Subject: [PATCH] net/mlx5: prevent quer
On 2/20/2024 3:33 PM, Sivaprasad Tummala wrote:
> This patch introduces a comprehensive refactor to the core power
> management library. The primary focus is on improving modularity
> and organization by relocating specific driver implementations
> from the 'lib/power' directory to dedicated direct
Hi,
> -Original Message-
> From: Bing Zhao
> Sent: Wednesday, February 21, 2024 8:28 AM
> To: Suanming Mou ; Raslan Darawsheh
> ; dev@dpdk.org
> Cc: Matan Azrad ; Slava Ovsiienko
> ; Ori Kam ; Dariusz Sosnowski
> ; sta...@dpdk.org; Hamdan Agbariya
> ; Erez Shitrit
> Subject: [PATCH] net/
Hi,
> -Original Message-
> From: Bing Zhao
> Sent: Wednesday, February 21, 2024 8:50 AM
> To: Suanming Mou ; Raslan Darawsheh
> ; dev@dpdk.org
> Cc: Matan Azrad ; Slava Ovsiienko
> ; Ori Kam ; Dariusz Sosnowski
> ; sta...@dpdk.org
> Subject: [PATCH] net/mlx5: fix condition of LACP miss fl
Add support to skip running a dma-perf test-case.
Signed-off-by: Amit Prakash Shukla
Acked-by: Anoob Joseph
Acked-by: Chengwen Feng
---
app/test-dma-perf/config.ini | 2 ++
app/test-dma-perf/main.c | 48 ++--
app/test-dma-perf/main.h | 1 +
3 files cha
On 2024-02-27 16:05, Morten Brørup wrote:
From: Mattias Rönnblom [mailto:hof...@lysator.liu.se]
Sent: Tuesday, 27 February 2024 14.44
On 2024-02-27 10:58, Morten Brørup wrote:
From: Mattias Rönnblom [mailto:mattias.ronnb...@ericsson.com]
Sent: Sunday, 25 February 2024 16.03
[...]
+static vo
> From: Mattias Rönnblom [mailto:hof...@lysator.liu.se]
> Sent: Tuesday, 27 February 2024 17.28
>
> On 2024-02-27 16:05, Morten Brørup wrote:
> >> From: Mattias Rönnblom [mailto:hof...@lysator.liu.se]
> >> Sent: Tuesday, 27 February 2024 14.44
> >>
> >> On 2024-02-27 10:58, Morten Brørup wrote:
>
Hi Tyler,
On 2/26/24 12:03, Maxime Coquelin wrote:
Hello,
On 2/22/24 19:05, Chautru, Nicolas wrote:
Hi Maxime,
Why would we change this here and now? Is the intent not to use new
suggested semantics for new patches only?
The pull request was rejected because of the use of such barrier, whi
On Tue, Feb 27, 2024 at 10:10:03AM +0100, Morten Brørup wrote:
> > From: Tyler Retzlaff [mailto:roret...@linux.microsoft.com]
> > Sent: Tuesday, 27 February 2024 06.41
> >
> > RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Provide
> > inline functions to access compatible type pointe
On Tue, Feb 27, 2024 at 04:18:10PM +0100, David Marchand wrote:
> Hello Dodji,
>
> On Tue, Feb 27, 2024 at 6:44 AM Tyler Retzlaff
> wrote:
> >
> > RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Remove
> > RTE_MARKER fields from rte_mbuf struct.
> >
> > Maintain alignment of fields a
On 15/02/2024 13:31, edwin.brosse...@6wind.com wrote:
From: Edwin Brossette
Different Intel nics with the igxbe pmd do not handle RSS in the same
way when working with virtualization. While some nics like Intel 82599ES
only have a single RSS table in the device and leave all rss features to
b
Add SipHash which is a fast and cryptographicly sound hash
created by Jean-Philippe Aumasson and Daniel J. Bernstein.
Siphash is widely used by Linux, FreeBSD, OpenBSD and other
projects because it is fast and resistant to DoS attacks.
This version is designed to be useful as alternative hash
with
Upon a successful comparison, NEON sets all the bits in the lane to 1
We can skip shifting by simply masking with specific masks.
Signed-off-by: Yoan Picchi
Reviewed-by: Ruifeng Wang
Reviewed-by: Nathan Brown
---
lib/hash/rte_cuckoo_hash.c | 16 +++-
1 file changed, 7 insertions(+)
1 - 100 of 173 matches
Mail list logo
