On Fri, Jul 9, 2021 at 2:44 PM Bruce Richardson
wrote:
>
> On Fri, Jul 09, 2021 at 12:05:40AM +0530, Jerin Jacob wrote:
> > On Thu, Jul 8, 2021 at 8:41 AM fengchengwen wrote:
> > >
> >
> > > >>>
> > > >>> It's just more conditionals and branches all through the code. Inside
> > > >>> the
> > > >
On Sat, Jul 10, 2021 at 12:46 AM Tyler Retzlaff
wrote:
>
> On Fri, Jul 09, 2021 at 11:46:54AM +0530, Jerin Jacob wrote:
> > > +
> > > +Promotion to stable
> > > +~~~
> > > +
> > > +Ordinarily APIs marked as ``experimental`` will be promoted to the
> > > stable ABI
> > > +once a ma
From: Jerin Jacob
Documented the role of RTE_ARM_EAL_RDTSC_USE_PMU to enable
PMU based rte_rdtsc().
Signed-off-by: Jerin Jacob
---
doc/guides/prog_guide/profile_app.rst | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/doc/guides/prog_guide/profile_app.rst
b/doc/
Hi Jan,
> -Original Message-
> From: dev On Behalf Of Jan Viktorin
> Sent: Wednesday, July 7, 2021 6:54 PM
>
> On Sun, 4 Jul 2021 15:18:01 +
> Matan Azrad wrote:
>
> > From: Havlík Martin
> > > Dne 2021-06-23 09:04, Min Hu (Connor) napsal:
> > > > 在 2021/6/22 17:25, Martin Havlik
This patch introduce 'dmadevice' which is a generic type of DMA
device.
The APIs of dmadev library exposes some generic operations which can
enable configuration and I/O with the DMA devices.
Signed-off-by: Chengwen Feng
---
MAINTAINERS |4 +
config/rte_config.h |
Note:
1) This patch hold dmadev <> vchan layer, I think vchan can be very
conceptually separated from hw-channel.
2) I could not under struct dpi_dma_queue_ctx_s, so this patch I define
the rte_dma_slave_port_parameters refer to Kunpeng DMA implemention.
3) This patch hasn't include doxy rela
Hello Andrew,
Can you estimate when that patch will be merged ?
Regards,
Gregory
> -Original Message-
> From: Gregory Etelson
> Sent: Monday, July 5, 2021 14:52
> To: dev@dpdk.org
> Cc: Gregory Etelson ; Slava Ovsiienko
> ; Ori Kam ; Xiaoyun Li
>
> Subject: [PATCH] app/testpmd: add flo
Hi,
> -Original Message-
> From: dev On Behalf Of Cristian Dumitrescu
> Sent: Saturday, July 10, 2021 3:21 AM
> To: dev@dpdk.org; NBU-Contact-Thomas Monjalon
>
> Cc: Churchill Khangar
> Subject: [dpdk-dev] [PATCH V4 4/5] examples/pipeline: add support for
> selector tables
>
> Add appl
From: Dana Vardi
ethtool_cmd_speed return uint32 and after the arithmetic
operation in mrvl_get_max_rate func the result is out of range.
Fixes: 429c394417 ("net/mvpp2: support traffic manager")
Cc: t...@semihalf.com
Cc: sta...@dpdk.org
Signed-off-by: Dana Vardi
Reviewed-by: Liron Himi
---
d
From: Dana Vardi
Need to set configure flag to allow create and commit mrvl tm
hierarchy tree. tm configuration depends on parameters that are
being set in port configure stage, e.g. nb_tx_queues.
This also aligned with the tm api description.
Fixes: 429c394417 ("net/mvpp2: support traffic manag
From: Meir Levi
vlan_strip and vlan_extend features need to return "unsupported"
error value.
Fixes: ff0b8b10dc4 ("net/mvpp2: support VLAN offload")
Cc: sta...@dpdk.org
Signed-off-by: Meir Levi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 8 ++--
1 file changed, 6 insert
On Sun, Jul 11, 2021 at 3:12 PM fengchengwen wrote:
>
> Note:
> 1) This patch hold dmadev <> vchan layer, I think vchan can be very
>conceptually separated from hw-channel.
I would like to keep it as channel instead of virtual channel as it is
implementation-specific.
No strong opinion on thi
On Sun, Jul 11, 2021 at 2:59 PM Chengwen Feng wrote:
>
> This patch introduce 'dmadevice' which is a generic type of DMA
> device.
>
> The APIs of dmadev library exposes some generic operations which can
> enable configuration and I/O with the DMA devices.
>
> Signed-off-by: Chengwen Feng
> diff
On Sun, 11 Jul 2021 08:49:18 +
Ori Kam wrote:
> Hi Jan,
Hi Ori,
>
>
> > -Original Message-
> > From: dev On Behalf Of Jan Viktorin
> > Sent: Wednesday, July 7, 2021 6:54 PM
> >
> > On Sun, 4 Jul 2021 15:18:01 +
> > Matan Azrad wrote:
> >
> > > From: Havlík Martin
> > >
From: Pavan Nikhilesh
Add support for event eth Rx adapter.
Resize cn10k workslot fastpath structure to fit in 64B cacheline size.
Signed-off-by: Pavan Nikhilesh
---
v8 Changes:
- Fix incorrect cq_w1 offset.
- Move doc changes to 1st patch.
v7 Changes:
- Set correct limits for SQB aura.
v
From: Pavan Nikhilesh
Add support for event eth Rx adapter fastpath operations.
Signed-off-by: Pavan Nikhilesh
---
drivers/event/cnxk/cn10k_eventdev.c | 136 +++-
drivers/event/cnxk/cn10k_worker.c | 54
drivers/event/cnxk/cn10k_worker.h | 97 +-
From: Pavan Nikhilesh
Add support for event eth Tx adapter.
Signed-off-by: Pavan Nikhilesh
Acked-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix.h| 1 +
drivers/common/cnxk/roc_nix_queue.c | 8 +-
drivers/event/cnxk/cn10k_eventdev.c | 91 ++
driver
From: Pavan Nikhilesh
Add support for event eth Tx adapter fastpath operations.
Signed-off-by: Pavan Nikhilesh
---
drivers/event/cnxk/cn10k_eventdev.c | 38
drivers/event/cnxk/cn10k_worker.h | 67 +
drivers/event/cnxk/cn10k_worker_tx_enq.c | 23 +
From: Pavan Nikhilesh
Add event vector support for cnxk event Rx adapter, add control path
APIs to get vector limits and ability to configure event vectorization
on a given Rx queue.
Signed-off-by: Pavan Nikhilesh
---
drivers/event/cnxk/cn10k_eventdev.c | 106 ++-
driv
From: Pavan Nikhilesh
Add Rx event vector fastpath to convert HW defined metadata into
rte_mbuf and rte_event_vector.
Signed-off-by: Pavan Nikhilesh
---
drivers/event/cnxk/cn10k_worker.h| 56
drivers/net/cnxk/cn10k_rx.h | 200 ---
drivers/net/cnxk
From: Pavan Nikhilesh
Add Tx event vector fastpath, integrate event vector Tx routine
into Tx burst.
Signed-off-by: Pavan Nikhilesh
---
drivers/common/cnxk/roc_sso.h| 23 ++
drivers/event/cnxk/cn10k_eventdev.c | 3 +-
drivers/event/cnxk/cn10k_worker.h| 104 +
> -Original Message-
> From: Thomas Monjalon
> Sent: Friday, July 9, 2021 5:00 PM
> To: Zhang, Qi Z ; Liu, Lingyu
> Cc: dev@dpdk.org; Xing, Beilei ; Wu, Jingjing
> ; Guo, Junfeng
> Subject: Re: [dpdk-dev] [PATCH v1 4/4] doc: update iavf driver FDIR/RSS for
> GTPoGRE
>
> 07/07/2021 14
Some ipool instances in the driver are used as ID\index allocator and
added other logic in order to work with limited index values.
Add a new configuration for ipool specify the maximum index value.
The ipool will ensure that no index bigger than the maximum value is
provided.
Use this configurat
This patch series optimize the flow insertion rate with adding
local cache to index pool and list.
For object which wants efficient index allocate and free, local
cache will be very helpful.
For index pool, two level cache is added, one as local and another
as global. The global cache is able to
For object which wants efficient index allocate and free, local
cache will be very helpful.
Two level cache is introduced to allocate and free the index more
efficient. One as local and the other as global. The global cache
is able to save all the allocated index. That means all the allocated
inde
In some cases, application may want to know all the allocated
index in order to apply some operations to the allocated index.
This commit adds the indexed pool functions to support foreach
operation.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5_utils.c | 96 +
This commit supports the index pool non-lcore operations with
an extra cache and lcore lock.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5_utils.c | 75 +--
drivers/net/mlx5/mlx5_utils.h | 3 +-
2 files changed, 56 insertions(+), 22
The flow list is used to save the create flows and to be used only
when port closes all the flows need to be flushed.
This commit takes advantage of the index pool foreach operation to
flush all the allocated flows.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/net/mlx5/linux/m
From: Matan Azrad
Define the types of the modify header action fields to be with the
minimum size needed for the optional values range.
Signed-off-by: Matan Azrad
Acked-by: Suanming Mou
---
drivers/common/mlx5/linux/mlx5_glue.h | 1 +
drivers/net/mlx5/linux/mlx5_flow_os.h | 3 ++-
drivers/n
From: Matan Azrad
The mlx5 internal list utility is thread safe.
In order to synchronize list access between the threads, a RW lock is
taken for the critical sections.
The create\remove\clone\clone_free operations are in the critical
sections.
These operations are heavy and make the critical s
From: Matan Azrad
The internal mlx5 list tool is used mainly when the list objects need to
be synchronized between multiple threads.
The "cache" term is used in the internal mlx5 list API.
Next enhancements on this tool will use the "cache" term for per thread
cache management.
To prevent conf
From: Matan Azrad
When mlx5 list object is accessed by multiple cores, the list lock
counter is all the time written by all the cores what increases cache
misses in the memory caches.
In addition, when one thread accesses the list for add\remove\lookup
operation, all the other threads coming to
From: Matan Azrad
When a cache entry is allocated by lcore A and is released by lcore B,
the driver should synchronize the cache list access of lcore A.
The design decision is to manage a counter per lcore cache that will be
increased atomically when the non-original lcore decreases the referenc
From: Matan Azrad
The atomic operation in the list utility no need a barriers because the
critical part are managed by RW lock.
Relax them.
Signed-off-by: Matan Azrad
Acked-by: Suanming Mou
---
drivers/net/mlx5/mlx5_utils.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
Hash list is planned to be implemented with the cache list code.
This commit moves the list utility to common directory.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_common.h | 2 +
drivers/common/mlx5/mlx5_common_utils.c | 250 +++
As some actions in SW-steering is only memory and can be allowed to
create duplicate objects, for lists which no need to check if there
are existing same objects in other sub local lists, search the object
only in local list will be more efficient.
This commit adds the lcore share mode to list opt
From: Matan Azrad
Currently, the list memory was allocated by the list API caller.
Move it to be allocated by the create API in order to save consistence
with the hlist utility.
Signed-off-by: Matan Azrad
Acked-by: Suanming Mou
---
drivers/net/mlx5/linux/mlx5_os.c | 105 +++
This commit optimizes to call the list callback functions with global
context directly.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_common_utils.c | 24 ++---
drivers/common/mlx5/mlx5_common_utils.h | 36
drivers/net/mlx5/mlx5_flow.h| 9
Currently, the list's local cache instance memory is allocated with
the list. As the local cache instance array size is RTE_MAX_LCORE,
most of the cases the system will only have very limited cores.
allocate the instance memory individually per core will be more
economic to the memory.
This commit
From: Matan Azrad
Using the mlx5 list utility object in the hlist buckets.
This patch moves the list utility object to the common utility, creates
all the clone operations for all the hlist instances in the driver.
Also adjust all the utility callbacks to be generic for both list and
hlist.
Si
Currently, hash list uses the cache list as bucket list. The list
in the buckets have the same name, ctx and callbacks. This wastes
the memory.
This commit abstracts all the name, ctx and callback members in the
list to a constant struct and others to the inconstant struct, uses
the wrapper functi
This commit supports the list non-lcore operations with
an extra sub-list and lock.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_common_utils.c | 92 +
drivers/common/mlx5/mlx5_common_utils.h | 9 ++-
2 files changed, 71 insertions(+),
With the new per core optimization to the list, the hash bucket size
can be tuned to a more accurate number.
This commit adjusts the hash bucket size.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/net/mlx5/linux/mlx5_os.c | 2 +-
drivers/net/mlx5/mlx5.c | 2 +-
drivers
From: Matan Azrad
Modify header actions are allocated by mlx5_malloc which has a big
overhead of memory and allocation time.
One of the action types under the modify header object is SET_TAG,
The SET_TAG action is commonly not reused by the flows and each flow has
its own value.
Hence, the mlx
This commit enables the tag and header modify action index pool
per-core cache in non-reclaim memory mode.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5.c | 4 +++-
drivers/net/mlx5/mlx5.h | 1 +
drivers/net/mlx5/mlx5_flow_dv.c | 3 ++-
3 files chan
This commit changes the index pool memory release configuration
to 0 when memory reclaim mode is not required.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
in
Currently, all the hash list tables are allocated during start up.
Since different applications may only use dedicated limited actions,
optimized the hash list table allocate on demand will save initial
memory.
This commit optimizes hash list table allocate on demand.
Signed-off-by: Suanming Mou
As hrxq struct has the indirect table pointer, while matching the
hrxq, better to use the hrxq indirect table instead of searching
from the list.
This commit optimizes the hrxq indirect table matching.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5_rxq.c | 18 +
This commit adds the multiple-thread flow insertion optimization
description.
Signed-off-by: Suanming Mou
Acked-by: Matan Azrad
---
doc/guides/nics/mlx5.rst | 5 +
doc/guides/rel_notes/release_21_08.rst | 1 +
2 files changed, 6 insertions(+)
diff --git a/doc/guides/nics/mlx5
> -Original Message-
> From: David Marchand
> Sent: Friday, July 9, 2021 10:07 PM
> To: Richael Zhuang
> Cc: dev ; Yu Jiang ; David Hunt
>
> Subject: Re: [dpdk-dev] [PATCH v8 0/2] power: add support for cppc cpufreq
> driver
>
> On Fri, Jul 9, 2021 at 12:56 PM Richael Zhuang
> wrote:
> -Original Message-
> From: Lance Richardson
> Sent: Saturday, July 10, 2021 12:39 AM
> To: Ajit Khaparde (ajit.khapa...@broadcom.com)
> ; Somnath Kotur
> ; Bruce Richardson
> ; Konstantin Ananyev
> ; jer...@marvell.com; Ruifeng Wang
> ; Stephen Hurd ;
> David Christensen
> Cc: dev@dpdk.
This patch adds default RSS support for IPv4 and IPv6 fragment packet.
Signed-off-by: Wenjun Wu
---
drivers/net/iavf/iavf_hash.c | 60 +---
1 file changed, 36 insertions(+), 24 deletions(-)
diff --git a/drivers/net/iavf/iavf_hash.c b/drivers/net/iavf/iavf_hash.c
> -Original Message-
> From: Andrew Rybchenko
> Sent: Friday, July 9, 2021 17:27
> To: Wang, Jie1X ; dev@dpdk.org
> Cc: Li, Xiaoyun ; sta...@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] app/testpmd: fix testpmd doesn't show RSS
> hash offload
>
> On 7/9/21 6:57 PM, Jie Wang wrote:
> > Thi
Hi,
> -Original Message-
> From: Pai G, Sunil
> Sent: Thursday, July 8, 2021 3:15 PM
> To: Jiang, Cheng1 ; maxime.coque...@redhat.com;
> Xia, Chenbo
> Cc: dev@dpdk.org; Hu, Jiayu ; Yang, YvonneX
>
> Subject: RE: [dpdk-dev] [PATCH v2 1/3] vhost: add unsafe API to drain pkts in
> async vh
> -Original Message-
> From: jer...@marvell.com
> Sent: Sunday, July 11, 2021 3:58 PM
> Cc: dev@dpdk.org; tho...@monjalon.net; Ruifeng Wang
> ; jer...@marvell.com
> Subject: [PATCH] doc: enhance arm64 profiling documentation
>
> From: Jerin Jacob
>
> Documented the role of RTE_ARM_EAL_R
From: Satheesh Paul
Add roc API for rte_flow_item_raw to parse custom L2 and L3 protocols.
Signed-off-by: Satheesh Paul
Reviewed-by: Kiran Kumar Kokkilagadda
---
drivers/common/cnxk/roc_mbox.h | 24 ++--
drivers/common/cnxk/roc_nix_ops.c | 14 +
drivers/common/cnxk/roc_npc.h
From: Satheesh Paul
Add support for rte_flow_item_raw to parse custom L2 and L3
protocols.
Signed-off-by: Satheesh Paul
---
doc/guides/nics/cnxk.rst | 37 +-
doc/guides/nics/features/cnxk.ini | 1 +
doc/guides/nics/features/cnxk_vec.ini | 1 +
doc/
Hi Maxime,
I have noticed you changed the state this patch to Superseded.
So are you going to submit a new version of this patch?
Thanks,
Cheng
> -Original Message-
> From: Jiang, Cheng1
> Sent: Wednesday, July 7, 2021 7:11 PM
> To: Maxime Coquelin ; dev@dpdk.org; Xia,
> Chenbo
> Cc: st
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