kni application have two main-loop threads that they
CPU utilization are up to 100 percent, this two theads are
writing thread and reading thread. I thank set interrupt mode
at reading thread would reduce this thread CPU utilization.
Signed-off-by: Tianli Lai
---
examples/kni/main.c | 91 +++
Add support for default action arguments. Up to now, only default
actions with no arguments were accepted.
Signed-off-by: Cristian Dumitrescu
Signed-off-by: Yogesh Jangra
---
lib/pipeline/rte_swx_pipeline.c | 200 +--
lib/pipeline/rte_swx_pipeline.h | 18 +--
This patch adds the basic NEON Rx path to the iavf driver. It does not
include scatter or flex varieties.
Signed-off-by: Kathleen Capella
---
drivers/net/iavf/iavf_rxtx.c | 12 +-
drivers/net/iavf/iavf_rxtx_vec_neon.c | 392 ++
drivers/net/iavf/meson.build
This patch aims to add the basic NEON Rx path to iavf driver. Currently,
the main Rx function (_recv_raw_pkts_vec) and the functions it depends on
have been implemented. Also, NEON vector path has been added to
iavf_set_rx_function. The code compiles on N1SDP platform and some traffic
testing has b
Hi Konstantin,
Comment on some of your feedback below. I will make the rest of the
changes and send a new version.
On 08/04/2022 18:26, Ananyev, Konstantin wrote:
Hi Sean,
Few nits, that I didn't spot previously, pls see below.
+
+/* Setup ACL context. 8< */
Looks like some typo within
Hi Sean,
Few nits, that I didn't spot previously, pls see below.
> l3fwd-acl contains duplicate functions to l3fwd.
> For this reason we merge l3fwd-acl code into l3fwd
> with '--lookup acl' cmdline option to run ACL.
>
> Signed-off-by: Sean Morrissey
> ---
> MAINTAINERS
On 2022-04-08 16:24, Mattias Rönnblom wrote:
PATCH v4:
* Reverted to Linux kernel style naming on the read side.
In this version I chose to adhere to kernel naming on the read side, but
keep the write_lock()/unlock() on the write side.
I think those names communicate better what the f
On Fri, 8 Apr 2022 16:24:42 +0200
Mattias Rönnblom wrote:
> + /* A writer pegged the sequence number during the read operation. */
> + if (unlikely(begin_sn != end_sn))
> + return true;
In some countries "pegged" might be considered inappropriate slang.
Use incremented or cha
On Fri, 8 Apr 2022 16:24:42 +0200
Mattias Rönnblom wrote:
> +++ b/lib/eal/common/rte_seqlock.c
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2022 Ericsson AB
> + */
> +
> +#include
> +
> +void
> +rte_seqlock_init(rte_seqlock_t *seqlock)
> +{
> + seqlock->s
On Fri, 8 Apr 2022 17:12:06 +0800
Tianli Lai wrote:
> + if (status[lcore].wakeup) {
> + RTE_LOG(INFO, APP,
> + "lcore %u sleeps until interrupt triggers\n",
> + rte_lcore_id());
> + }
Shouldn't the be at DEBUG level.
>
On Fri, Apr 08, 2022 at 03:15:02PM +0100, Kevin Laatz wrote:
> DMA devices are created during PCI probe of EAL init. These devices need
> to be closed in order to perform necessary cleanup for those devices.
> This patch adds the call to close() for all DMA devices.
>
> Signed-off-by: Kevin Laatz
On Fri, Apr 08, 2022 at 03:15:01PM +0100, Kevin Laatz wrote:
> During PCI device close, any allocated memory needs to be free'd.
> Currently, one of the free's is being called on an incorrect idxd_dmadev
> struct member, namely 'batch_idx_ring', causing a memleak from the
> pointer that should have
On Fri, Apr 08, 2022 at 03:15:00PM +0100, Kevin Laatz wrote:
> ASAN reports a memory leak for the 'pci' pointer in the 'idxd_dmadev'
> struct.
>
> This is fixed by free'ing the struct when the last queue on the PCI
> device is being closed.
>
> Fixes: 9449330a8458 ("dma/idxd: create dmadev instan
A sequence lock (seqlock) is synchronization primitive which allows
for data-race free, low-overhead, high-frequency reads, especially for
data structures shared across many cores and which are updated
relatively infrequently.
A seqlock permits multiple parallel readers. The variant of seqlock
imp
When sending a command to an idxd device via pci bar, the response from
HW is checked to ensure it was successful. The response was incorrectly
being negated before being returned by the function, meaning error codes
cannot be checked against the HW specification.
This patch fixes the return value
The application stops all dmadevs that it used but never closed any,
meaning device cleanup was not done.
This patch adds device cleanup for all dmadevs. All devices need to be
closed for completeness, since devices not used by the application may
also have been created during PCI probe of EAL init
DMA devices are created during PCI probe in EAL init. In order to
perform cleanup for those devices, they need to be stopped and closed.
This patch adds the necessary cleanup to ensure clean exit.
Signed-off-by: Kevin Laatz
---
app/test-pmd/testpmd.c | 9 +
1 file changed, 9 insertions(+
During PCI device close, any allocated memory needs to be free'd.
Currently, one of the free's is being called on an incorrect idxd_dmadev
struct member, namely 'batch_idx_ring', causing a memleak from the
pointer that should have been free'd.
This patch fixes this memleak by calling free on the co
DMA devices are created during PCI probe of EAL init. These devices
need to be closed in order to perform necessary cleanup for those
devices. This patch adds the call to close() for all DMA devices.
Signed-off-by: Kevin Laatz
---
app/test/test.c | 6 ++
1 file changed, 6 insertions(+)
diff
ASAN reports a memory leak for the 'pci' pointer in the 'idxd_dmadev'
struct.
This is fixed by free'ing the struct when the last queue on the PCI
device is being closed.
Fixes: 9449330a8458 ("dma/idxd: create dmadev instances on PCI probe")
Cc: sta...@dpdk.org
Cc: bruce.richard...@intel.com
Repo
This patchset addresses the device close for IDXD PCI devices.
Initially, there was a memory leak reported by ASAN for the 'pci' member
of the 'idxd_dmadev' struct due to a missing free. In addition, this
patch set corrects the behaviour of the device close function to ensure
the cleanup is complet
Add CLI options to l3fwd_power to utilize the new power APIs introduced in
this patchset. These CLI options allow the user to configure the
heuritstics made available through the new API via the l3fwd_power
application options.
Signed-off-by: Kevin Laatz
---
examples/l3fwd-power/main.c | 75
Add new get/set API to allow the user or application to set the minimum
and maximum frequencies to use when scaling.
Previously, the frequency range was determined by the HW capabilities of
the CPU. With this new API, the user or application can constrain this
if required.
Signed-off-by: Kevin Laa
Add new get/set API for configuring 'pause_duration' which used to adjust
the pause mode callback duration.
Signed-off-by: Kevin Laatz
---
lib/power/rte_power_pmd_mgmt.c | 26 --
lib/power/rte_power_pmd_mgmt.h | 31 +++
lib/power/version.map
Add new get/set APIs to configure emptypoll max which is used to
determine when a queue can go into sleep state.
Signed-off-by: Kevin Laatz
---
lib/power/rte_power_pmd_mgmt.c | 21 ++---
lib/power/rte_power_pmd_mgmt.h | 27 +++
lib/power/version.map
The power library contains some variables which are currently set by
defines, hard-coded values or set using sysfs values. In order to
configure these, code changes and recompiles are required, making
configuring these variables tedious.
This patchset introduces some new get/set APIs which allow u
This commit adds basic structs to handle asymmetric crypto capability.
Signed-off-by: Arek Kusztal
---
lib/cryptodev/rte_crypto_asym.h | 47 +
lib/cryptodev/rte_cryptodev.h | 8 ++
2 files changed, 55 insertions(+)
diff --git a/lib/cryptodev/rte_crypto_asy
2022-04-01 06:29 (UTC-0700), Tyler Retzlaff:
> Implement functions for getting/setting thread affinity.
> Threads can be pinned to specific cores by setting their
> affinity attribute.
>
> Signed-off-by: Narcisa Vasile
> Signed-off-by: Tyler Retzlaff
Acked-by: Dmitry Kozlyuk
Please see some s
2022-04-01 06:29 (UTC-0700), Tyler Retzlaff:
[...]
> +static int
> +test_thread_affinity(void)
> +{
> + pthread_t id;
> + rte_thread_t thread_id;
> +
> + RTE_TEST_ASSERT(pthread_create(&id, NULL, thread_main, NULL) == 0,
> + "Failed to create thread");
> + thread_id.opaq
Hi David,
Le jeu. 7 avr. 2022 à 11:24, David Marchand
a écrit :
> > As a side note, we probably need to check other similar places in DPDK code.
>
> What would be the best way to detect those problematic places?
As far as I'm aware, there is no silver bullet to detect all strict
aliasing violat
On Fri, Apr 08, 2022 at 10:57:55AM +0200, David Marchand wrote:
> Hello Tyler,
>
> On Fri, Apr 1, 2022 at 3:30 PM Tyler Retzlaff
> wrote:
> >
> > this series provides basic dependencies for additional eal thread api
> > additions. series includes basic error handling, initial get/set thread
> > a
On 2022-04-03 19:37, Honnappa Nagarahalli wrote:
+ * Example usage:
+ * @code{.c}
+ * #define MAX_Y_LEN (16)
+ * // Application-defined example data structure, protected by a seqlock.
+ * struct config {
+ * rte_seqlock_t lock;
+ * int param_x;
+ * char param_y[MAX_Y_
The index description isn't right, correct it as the Programmer's guide
said.
Also correct the guide's figure description about 'Dequeue First Step'.
Signed-off-by: Haiyue Wang
---
doc/guides/prog_guide/ring_lib.rst | 2 +-
lib/ring/rte_ring_core.h | 4 ++--
2 files changed, 3 inserti
> -Original Message-
> From: Marcin Danilewicz
> Sent: Thursday, April 7, 2022 3:52 PM
> To: dev@dpdk.org
> Cc: Ajmera, Megha
> Subject: [dpdk][PATCH 1/2] sched: enable/disable TC OV at runtime
>
> From: Megha Ajmera
>
> Added new API to enable or disable TC over subscription for be
This commit adds qat functions for curve25519 and
curve448.
Signed-off-by: Arek Kusztal
---
.../common/qat/qat_adf/icp_qat_fw_mmp_ids.h | 74 +++
1 file changed, 74 insertions(+)
diff --git a/drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h
b/drivers/common/qat/qat_adf/icp_qat
On Fri, Apr 08, 2022 at 12:20:23PM +0100, Zhang, RobinX wrote:
> Hi Bruce
>
> > -Original Message-
> > From: Richardson, Bruce
> > Sent: Friday, April 8, 2022 7:01 PM
> > To: Zhang, RobinX
> > Cc: dev@dpdk.org; Yang, Qiming ; Zhang, Qi Z
> > ; Yang, SteveX
> > Subject: Re: [PATCH v2] co
Hi Bruce
> -Original Message-
> From: Richardson, Bruce
> Sent: Friday, April 8, 2022 7:01 PM
> To: Zhang, RobinX
> Cc: dev@dpdk.org; Yang, Qiming ; Zhang, Qi Z
> ; Yang, SteveX
> Subject: Re: [PATCH v2] common/sff_module: add telemetry command to
> dump module EEPROM
>
> On Fri, Apr 0
Remove the limitation that max queue pair number must be 2^n.
With this patch, even on a 8 ports device, the max queue pair
number increased from 128 to 254.
Signed-off-by: Qi Zhang
---
v2:
- fix check patch warning
drivers/net/ice/ice_ethdev.c | 24
1 file changed, 20
Remove the limitation that max queue pair number must be 2^n.
With this patch, even on a 8 ports device, the max queue pair
number increased from 128 to 254.
Signed-off-by: Qi Zhang
---
drivers/net/ice/ice_ethdev.c | 24
1 file changed, 20 insertions(+), 4 deletions(-)
On Fri, Apr 08, 2022 at 11:55:07AM +0100, Zhang, RobinX wrote:
> Hi Bruce,
>
> > -Original Message-
> > From: Richardson, Bruce
> > Sent: Friday, April 8, 2022 6:33 PM
> > To: Zhang, RobinX
> > Cc: dev@dpdk.org; Yang, Qiming ; Zhang, Qi Z
> > ; Yang, SteveX
> > Subject: Re: [PATCH v2] c
Hi Bruce,
> -Original Message-
> From: Richardson, Bruce
> Sent: Friday, April 8, 2022 6:33 PM
> To: Zhang, RobinX
> Cc: dev@dpdk.org; Yang, Qiming ; Zhang, Qi Z
> ; Yang, SteveX
> Subject: Re: [PATCH v2] common/sff_module: add telemetry command to
> dump module EEPROM
>
> On Fri, Apr
On Fri, Apr 08, 2022 at 10:23:30AM +, Robin Zhang wrote:
> This patch introduce a new telemetry command '/sff_module/info'
> to dump format module EEPROM information.
>
> The format support for SFP(Small Formfactor Pluggable)/SFP+
> /QSFP+(Quad Small Formfactor Pluggable)/QSFP28 modules based
This patch introduce a new telemetry command '/sff_module/info'
to dump format module EEPROM information.
The format support for SFP(Small Formfactor Pluggable)/SFP+
/QSFP+(Quad Small Formfactor Pluggable)/QSFP28 modules based on
SFF(Small Form Factor) Committee specifications
SFF-8079/SFF-8472/SF
From: Xuan Ding
In async data path, call rte_vhost_async_get_inflight_thread_unsafe()
API to directly return the number of inflight packets instead of
maintaining a local variable.
Signed-off-by: Xuan Ding
Reviewed-by: Maxime Coquelin
---
examples/vhost/main.c | 28 +++
From: Xuan Ding
In async data path, when vring state changes or device is destroyed,
it is necessary to know the number of inflight packets in DMA engine.
This patch provides a thread unsafe API to return the number of
inflight packets for a vhost queue without using any lock.
Signed-off-by: Xua
From: Xuan Ding
This patchset introduces an unsafe API to get the number of inflight
packets in DMA engine. It should be only used within the vhost ops
which already holds the lock. Like vring state changes or device is
destroyed. Compared with rte_vhost_async_get_inflight(), this is a
lock free
Added test vector file for AES-128-GCM for
64B and 512B length buffers.
Signed-off-by: Archana Muniganti
---
app/test-crypto-perf/data/aes_gcm_128.data | 97 ++
1 file changed, 97 insertions(+)
create mode 100644 app/test-crypto-perf/data/aes_gcm_128.data
diff --git a/app/t
For decrypt, ICV mismatch can come as data is dummy and
latency will be calculated for error path. Hence populate
mbuf with test vector data.
Signed-off-by: Archana Muniganti
---
app/test-crypto-perf/cperf_ops.c | 3 +-
app/test-crypto-perf/cperf_test_common.c | 36 +++
For decrypt, ICV mismatch can come as data is dummy and
latency will be calculated for error path. Hence populate
mbuf with test vector data.
Archana Muniganti (2):
app/crypto-perf: populate mbuf in latency test
app/crypto-perf: add vector file for AES-GCM
app/test-crypto-perf/cperf_ops.c
Added AES_GMAC test vectors along with combined mode support.
Signed-off-by: Archana Muniganti
---
app/test/test_cryptodev.c | 26 +++-
app/test/test_cryptodev_security_ipsec.c | 12 ++
app/test/test_cryptodev_security_ipsec.h | 9 ++
...st_cryptodev_security_ip
Added tunnel and transport AH known test vectors for
SHA256 HMAC.
Signed-off-by: Archana Muniganti
---
app/test/test_cryptodev.c | 33 ++-
...st_cryptodev_security_ipsec_test_vectors.h | 210 ++
doc/guides/rel_notes/release_22_03.rst| 1 +
3 files c
Added auth only and null cipher + auth under combined mode
for following combinations.
1. Tunnel IPv4
2. Transport IPv4
Signed-off-by: Archana Muniganti
---
app/test/test_cryptodev.c| 97
app/test/test_cryptodev_security_ipsec.c | 74 +++---
a
Add IPsec AH known test vectors including combined
mode support.
Archana Muniganti (3):
test/crypto: add AH under combined mode UT
test/crypto: add AH test vectors
test/crypto: add AH AES-GMAC test vectors
app/test/test_cryptodev.c | 150 +++-
app/test/test_cryptode
On 4/8/22 09:13, Hu, Jiayu wrote:
>
>
>> -Original Message-
>> From: Ilya Maximets
>> Sent: Thursday, April 7, 2022 10:40 PM
>> To: Maxime Coquelin ; Van Haaren, Harry
>> ; Morten Brørup
>> ; Richardson, Bruce
>>
>> Cc: i.maxim...@ovn.org; Pai G, Sunil ; Stokes, Ian
>> ; Hu, Jiayu ; Fer
Looking at this driver history, there was never a need for including
execinfo.h.
Signed-off-by: David Marchand
---
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_o
The 'max_rx_pktlen' value was previously read from hardware, which was
set by the running firmware. This caused confusion due to different
meanings of 'MAX_MTU'. This patch updates the 'max_rx_pktlen' to the
maximum value that the NFP NIC can support. The 'max_mtu' value that is
read from hardware,
On Thu, Apr 7, 2022 at 1:20 PM Tyler Retzlaff
wrote:
> On Tue, Apr 05, 2022 at 03:48:58PM +0200, David Marchand wrote:
> > Add missing 'extern "C"' to file.
> >
> > Fixes: 1db72630da0c ("eal/windows: do not expose private facilities")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: David Marchand
On Tue, Jan 4, 2022 at 10:12 AM Ruifeng Wang wrote:
> > From: pbhagavat...@marvell.com
[snip]
> > -/**
> > - * Use single crc32 instruction to perform a hash on a 2 bytes value.
> > - * Fall back to software crc32 implementation in case SSE4.2 is
> > - * not supported
> > - *
> > - * @param data
This patch enabled Protocol Agnostic Flow Offloading FDIR in AVF.
Signed-off-by: Junfeng Guo
---
doc/guides/rel_notes/release_22_07.rst | 4 ++
drivers/net/iavf/iavf_fdir.c | 67 ++
drivers/net/iavf/iavf_generic_flow.c | 6 +++
drivers/net/iavf/iavf_generic_
Structure virtchnl_proto_headrs is extended with a union struct for
proto_hdr table and raw struct. Thus update the proto_hdrs template
init to align the virtchnl changes.
Signed-off-by: Junfeng Guo
---
drivers/net/iavf/iavf_hash.c | 180 ++-
1 file changed, 92 in
The patch extends existing virtchnl_proto_hdrs structure to allow VF
to pass a pair of buffers as packet data and mask that describe
a match pattern of a filter rule. Then the kernel PF driver is requested
to parse the pair of buffer and figure out low level hardware metadata
(ptype, profile, field
This patch set enabled Protocol Agnostic Flow (raw flow) Offloading
for FDIR in AVF.
[PATCH v3 1/3] common/iavf: support raw packet in protocol header
[PATCH v3 2/3] net/iavf: align with proto hdr struct change
[PATCH v3 3/3] net/iavf: enable Protocol Agnostic Flow Offloading FDIR
v3:
fix CI buil
Add support for queue rate limit and quanta size configuration
Signed-off-by: Wenjun Wu
---
doc/guides/rel_notes/release_22_07.rst | 4
1 file changed, 4 insertions(+)
diff --git a/doc/guides/rel_notes/release_22_07.rst
b/doc/guides/rel_notes/release_22_07.rst
index 42a5f2d990..f1b4057d70
This patch adds quanta size configuration support.
Quanta size should between 256 and 4096, and be a product of 64.
Signed-off-by: Wenjun Wu
---
drivers/net/iavf/iavf.h| 3 +++
drivers/net/iavf/iavf_ethdev.c | 38 ++
drivers/net/iavf/iavf_vchnl.c | 31 ++
This patch adds queue rate limit configuration support.
Only max bandwidth is supported.
Signed-off-by: Ting Xu
Signed-off-by: Wenjun Wu
---
drivers/net/iavf/iavf.h | 13 +++
drivers/net/iavf/iavf_tm.c| 190 --
drivers/net/iavf/iavf_vchnl.c | 23
This patch set adds queue rate limit and quanta size configuration.
Quanta size can be changed by driver devarg quanta_size=xxx. Quanta
size should be set to the value between 256 and 4096 and be the product
of 64.
v2: Rework virtchnl.
v3: Add release note.
v4: Quanta size configuration will block
This patch adds new virtchnl opcodes and structures for rate limit
and quanta size configuration, which include:
1. VIRTCHNL_OP_CONFIG_QUEUE_BW, to configure max bandwidth for each
VF per queue.
2. VIRTCHNL_OP_CONFIG_QUANTA, to configure quanta size per queue.
Signed-off-by: Ting Xu
Signed-off-by
Hello Tyler,
On Fri, Apr 1, 2022 at 3:30 PM Tyler Retzlaff
wrote:
>
> this series provides basic dependencies for additional eal thread api
> additions. series includes basic error handling, initial get/set thread
> affinity functions and minimal unit test.
>
> Tyler Retzlaff (3):
> eal/windows
+ @Cristian Dumitrescu meter maintainer.
On Fri, Apr 8, 2022 at 8:17 AM Alexander Kozyrev wrote:
>
> The introduction of asynchronous flow rules operations allowed users
> to create/destroy flow rules as part of the datapath without blocking
> on Flow API and slowing the packet processing down.
> From: Hu, Jiayu [mailto:jiayu...@intel.com]
> Sent: Friday, 8 April 2022 09.14
>
> > From: Ilya Maximets
> >
> > On 4/7/22 16:25, Maxime Coquelin wrote:
> > > Hi Harry,
> > >
> > > On 4/7/22 16:04, Van Haaren, Harry wrote:
> > >> Hi OVS & DPDK, Maintainers & Community,
> > >>
> > >> Top posting
This patch enabled Protocol Agnostic Flow Offloading FDIR in AVF.
Signed-off-by: Junfeng Guo
---
doc/guides/rel_notes/release_22_07.rst | 4 ++
drivers/net/iavf/iavf_fdir.c | 66 ++
drivers/net/iavf/iavf_generic_flow.c | 6 +++
drivers/net/iavf/iavf_generic_
Structure virtchnl_proto_headrs is extended with a union struct for
proto_hdr table and raw struct. Thus update the proto_hdrs template
init to align the virtchnl changes.
Signed-off-by: Junfeng Guo
---
drivers/net/iavf/iavf_hash.c | 180 ++-
1 file changed, 92 in
The patch extends existing virtchnl_proto_hdrs structure to allow VF
to pass a pair of buffers as packet data and mask that describe
a match pattern of a filter rule. Then the kernel PF driver is requested
to parse the pair of buffer and figure out low level hardware metadata
(ptype, profile, field
This patch set enabled Protocol Agnostic Flow (raw flow) Offloading
for FDIR in AVF.
[PATCH v2 1/3] common/iavf: support raw packet in protocol header
[PATCH v2 2/3] net/iavf: align with proto hdr struct change
[PATCH v2 3/3] net/iavf: enable Protocol Agnostic Flow Offloading FDIR
v2:
add release
This commit adds functions to use ecpm named
curves. This will speed up calculation
of multiplication for curves P-256 and P-384.
Signed-off-by: Arek Kusztal
---
.../common/qat/qat_adf/icp_qat_fw_mmp_ids.h | 42
drivers/common/qat/qat_adf/qat_pke.h | 20 ++
drivers/cr
This commit adds generation of ecdsa with named
curves. This will speed up calculation of
signature for curves P-256 and P-384.
Signed-off-by: Arek Kusztal
---
.../common/qat/qat_adf/icp_qat_fw_mmp_ids.h | 17 +
drivers/common/qat/qat_adf/qat_pke.h | 20 +
drivers/crypto/qat/q
This commit adds functions for ecdsa and multiplication using
named curves. This will speed up calculation of multiplication and
signature generation for curves P-256 and P-384.
Depends-on: series-22343 ("crypto/qat: refactor asym algorithm macros and logs")
Depends-on: patch-109417 ("crypto/qat:
Split the virtqs virt-queue resource between
the configuration threads.
Also need pre-created virt-queue resource
after virtq destruction.
This accelerates the LM process and reduces its time by 30%.
Signed-off-by: Li Zhang
---
drivers/vdpa/mlx5/mlx5_vdpa.c | 69 +++--
pre-created virt-queue sub-resource in device probe stage
and then modify virtqueue in device config stage.
Steer table also need to support dummy virt-queue.
This accelerates the LM process and reduces its time by 40%.
Signed-off-by: Li Zhang
Signed-off-by: Yajun Wu
---
drivers/vdpa/mlx5/mlx5_
Split the virtqs device close tasks after
stopping virt-queue between the configuration threads.
This accelerates the LM process and
reduces its time by 50%.
Signed-off-by: Li Zhang
---
drivers/vdpa/mlx5/mlx5_vdpa.c | 51 +--
drivers/vdpa/mlx5/mlx5_vdpa.h
Split the virtqs LM log between the configuration threads.
This accelerates the LM process and reduces its time by 20%.
Signed-off-by: Li Zhang
---
drivers/vdpa/mlx5/mlx5_vdpa.h | 3 +
drivers/vdpa/mlx5/mlx5_vdpa_cthread.c | 34 ++
drivers/vdpa/mlx5/mlx5_vdpa_lm.c | 90
The virtq object and all its sub-resources use a lot of
FW commands and can be accelerated by the MT management.
Split the virtqs creation between the configuration threads.
This accelerates the LM process and reduces its time by 20%.
Signed-off-by: Li Zhang
---
drivers/vdpa/mlx5/mlx5_vdpa.h
The driver creates a direct MR object of
the HW for each VM memory region,
which maps the VM physical address to
the actual physical address.
Later, after all the MRs are ready,
the driver creates an indirect MR to group all the direct MRs
into one virtual space from the HW perspective.
Create di
The configuration threads tasks need a container to
support multiple tasks assigned to a thread in parallel.
Use rte_ring container per thread to manage
the thread tasks without locks.
The caller thread from the user context opens a task to
a thread and enqueue it to the thread ring.
The thread pol
A virtq configuration can be modified after the virtq creation.
Added the following modifiable fields:
1.address fields: desc_addr/used_addr/available_addr
2.hw_available_index
3.hw_used_index
4.virtio_q_type
5.version type
6.queue mkey
7.feature bit mask: tso_ipv4/tso_ipv6/tx_csum/rx_csum
8.event
The LM process includes a lot of objects creations and
destructions in the source and the destination servers.
As much as LM time increases, the packet drop of the VM increases.
To improve LM time need to parallel the configurations for mlx5 FW.
Add internal multi-thread management in the driver fo
dev_config operation is called in LM progress.
LM time is very critical because all
the VM packets are dropped directly at that time.
Move the virtq creation to probe time and
only modify the configuration later in
the dev_config stage using the new ability
to modify virtq.
This optimization acce
The driver used a single global lock for any synchronization
needed for the datapath and control path.
It is better to group the critical sections with
the other ones that should be synchronized.
Replace the global lock with the following locks:
1.virtq locks(per virtq) synchronize datapath polli
From: Yajun Wu
Support set QP to RESET state.
Signed-off-by: Yajun Wu
---
drivers/common/mlx5/mlx5_devx_cmds.c | 7 +++
drivers/common/mlx5/mlx5_prm.h | 17 +
2 files changed, 24 insertions(+)
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
b/drivers/common/mlx5/
From: Yajun Wu
To speed up queue create time, event qp and cq will create only once.
Each virtq creation will reuse same event qp and cq.
Because FW will set event qp to error state during virtq destory,
need modify event qp to RESET state, then modify qp to RTS state as
usual. This can save abo
From: Yajun Wu
The motivation of this change is to reduce vDPA device queue creation
time by create some queue resource in vDPA device probe stage.
In VM live migration scenario, this can reduce 0.8ms for each queue
creation, thus reduce LM network downtime.
To create queue resource(umem/counte
From: Yajun Wu
Add calling rte_dev_remove in vDPA example application exit. Otherwise
rte_dev_remove never get called.
Fixes: edbed86d1cc ("examples/vdpa: introduce a new sample for vDPA")
Cc: sta...@dpdk.org
Signed-off-by: Yajun Wu
---
examples/vdpa/main.c | 4
1 file changed, 4 inserti
Allow the driver to use internal threads to
obtain fast configuration.
All the threads will be open on the same core of
the event completion queue scheduling thread.
Add max_conf_threads parameter to configure
the maximum number of internal threads in addition to
the caller thread (8 is suggested)
> -Original Message-
> From: Ilya Maximets
> Sent: Thursday, April 7, 2022 10:40 PM
> To: Maxime Coquelin ; Van Haaren, Harry
> ; Morten Brørup
> ; Richardson, Bruce
>
> Cc: i.maxim...@ovn.org; Pai G, Sunil ; Stokes, Ian
> ; Hu, Jiayu ; Ferriter, Cian
> ; ovs-...@openvswitch.org; dev@dp
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