On Thu, Feb 24, 2022 at 11:48 AM Gujjar, Abhinandan S
wrote:
>
> Acked-by: Abhinandan Gujjar
Applied to dpdk-next-net-eventdev/for-main. Thanks
>
> > -Original Message-
> > From: Shijith Thotton
> > Sent: Thursday, February 24, 2022 10:16 AM
> > To: dev@dpdk.org; jer...@marvell.com
> >
The structure "rte_flow_item_geneve_opt" is not a protocol header of
geneve tunnel option from rfc8926. The field "data" is a pointer
which points to the actual variable-length option data. So the
structure is not packed.
There is 4 bytes hole before the pointer in a 64-bit system. The
option head
From: Xuan Ding
Since QEMU 5.2.0 fixes the vhost multi-queue reconnection issue
in commit f66337bdbfda ("vhost-user: save features of multiqueues
if chardev is closed"), this patch removes the previous description
from known issue.
Fixes: b37e95507e1b ("doc: add vhost multi-queue reconnection is
> -Original Message-
> From: Stephen Hemminger
> Sent: Thursday, February 24, 2022 12:11 PM
> To: Yang, SteveX
> Cc: dev@dpdk.org; Yigit, Ferruh ; Xing, Beilei
> ; sta...@dpdk.org
> Subject: Re: [PATCH v2] net/i40e: fix unintentional integer overflow
>
> On Thu, 24 Feb 2022 01:17:22 +
Acked-by: Abhinandan Gujjar
> -Original Message-
> From: Shijith Thotton
> Sent: Thursday, February 24, 2022 10:16 AM
> To: dev@dpdk.org; jer...@marvell.com
> Cc: Shijith Thotton ; Gujjar, Abhinandan S
> ; Akhil Goyal
> Subject: [PATCH v7] app/eventdev: add crypto producer mode
>
> In
Patch implements soft expiry notification mechanism in out bound
path by creating required number of ring buffers and a common poll
thread which polls for soft expiry events enqueued by ucode.
Signed-off-by: Vamsi Attunuru
---
drivers/common/cnxk/roc_idev.c| 15 +++
drivers/common/c
On Thu, Feb 24, 2022 at 8:41 AM Gujjar, Abhinandan S
wrote:
>
> Acked-by: Abhinandan Gujjar
Applied to dpdk-next-net-eventdev/for-main. Thanks
>
> > -Original Message-
> > From: Kundapura, Ganapati
> > Sent: Wednesday, February 23, 2022 1:05 PM
> > To: Jayatheerthan, Jay ;
> > jerinjac
In crypto producer mode, producer core enqueues cryptodev with software
generated crypto ops and worker core dequeues crypto completion events
from the eventdev. Event crypto metadata used for above processing is
pre-populated in each crypto session.
Parameter --prod_type_cryptodev can be used to
On Wed, Feb 23, 2022 at 6:21 PM Rahul Bhansali wrote:
>
> This adds cn10k specific rx xstats of bpf, cpt and
> ipsecd counters.
>
> Signed-off-by: Rahul Bhansali
Acked-by: Jerin Jacob
Changed the git commit as follows and Applied to
dpdk-next-net-mrvl/for-next-net. Thanks
common/cnxk: ad
On Thu, 24 Feb 2022 01:17:22 +
Steve Yang wrote:
> Cast 1 to type uint64_t to avoid overflow.
>
> CID 375812 (#1 of 1):
> Unintentional integer overflow (OVERFLOW_BEFORE_WIDEN)
> overflow_before_widen: Potentially overflowing expression 1 << 2 * i + 1
> with type int (32 bits, signed) is eva
> -Original Message-
> From: Steve Yang
> Sent: Thursday, February 24, 2022 9:17 AM
> To: dev@dpdk.org
> Cc: Yigit, Ferruh ; Xing, Beilei
> ;
> Yang, SteveX ; sta...@dpdk.org
> Subject: [PATCH v2] net/i40e: fix unintentional integer overflow
>
> Cast 1 to type uint64_t to avoid overfl
The HW steering uses async queue-based flow rules management
mechanism. The matcher and part of the actions have been
prepared during flow table creation. Some remaining actions
will be constructed during flow creation if needed.
A flow postpone attribute bit describes if flow management
should be
The mark action is covered by tag action internally. While it is added
the HW will add a tag to the packet. The mark value can be set as fixed
or dynamic as the action mask indicates.
Signed-off-by: Suanming Mou
Acked-by: Viacheslav Ovsiienko
---
drivers/net/mlx5/mlx5.h | 2 +
drivers/
The hardware steering is backend to support rte_flow_async API in
mlx5 PMD. The port configuration function creates the queues and
needed flow management resources.
The PMD layer configuration function allocates the queues' context
and per-queue job descriptor pool. The job descriptor pool size
is
The Connect-X steering is a lookup hardware mechanism that accesses
flow tables, matches packets to the rules, and performs specified actions.
Historically, mlx5 PMD implements several software engines to manage
steering hardware facility:
- FW Steering - Verbs/Direct Verbs, uses FW calls to ma
Acked-by: Abhinandan Gujjar
> -Original Message-
> From: Kundapura, Ganapati
> Sent: Wednesday, February 23, 2022 1:05 PM
> To: Jayatheerthan, Jay ;
> jerinjac...@gmail.com; Gujjar, Abhinandan S
> ; dev@dpdk.org
> Subject: [PATCH v1] eventdev/crypto_adapter: remove logically dead code
>
HW steering header reformat action can work under bulk mode. In
this case, when create the table, bulk size of header reformat
actions will be allocated in low level. Afterwards, when create
flow, just simply specify the action index in the bulk and the
encapsulation data to the action will be enou
HW steering can support indirect action as well. With indirect action,
the flow can be created with more flexible shared RSS action selection.
This will can save the action template with different RSS actions.
This commit adds the flow queue operation callback for:
rte_flow_async_action_handle_cre
This commit adds the queue and RSS action. Similar to the jump action,
dynamic ones will be added to the action construct list.
Due to the queue and RSS action in template should not be destroyed
during port restart, the actions are created with standalone indirect
table as indirect action does. W
Jump action connects different level of flow tables and allows packet
handling in the chain of flows.
A new action construct data struct is also added in this commit to help
to handle not only the dynamic jump action but also for the other generic
dynamic actions. The actions with empty mask confi
In case port is being stopped, all created flows should be flushed.
This commit adds the flow flush helper function.
Signed-off-by: Suanming Mou
Acked-by: Viacheslav Ovsiienko
---
drivers/net/mlx5/mlx5_flow.c| 8 ++
drivers/net/mlx5/mlx5_flow_hw.c | 129
2
Flow table is a group of flows with the same matching criteria
and the same actions defined for them. The table defines rules
that have the same matching fields but with different matching
values. For example, matching on 5 tuple, the table will be
(IPv4 source + IPv4 dest + s_port + d_port + next_
The action template holds a list of action types that will be
used together on the same rule. The template's actions instances
will be created only when the template bind to the dedicated
group. And the created actions will be saved to each individual
group in order for best performance. The action
The pattern template defines flows that have the same matching
fields but with different matching values.
For example, matching on 5 tuple TCP flow, the template will be
(eth(null) + IPv4(source + dest) + TCP(s_port + d_port) while
the values for each rule will be different.
Due to the pattern tem
The new hardware steering engine relies on using dedicated steering WQEs
instead of direct writing to the low-level steering table entries directly.
In the first introduce implementation the hardware steering engine supports
the new queue based Flow API, the existing synchronous non-queue based Flo
The HW steering low-level implementation will be added later in another
patch series. To avoid the linkage issues the abstract stub replacement
is provided currently.
Signed-off-by: Suanming Mou
Acked-by: Viacheslav Ovsiienko
---
drivers/net/mlx5/meson.build | 1 +
drivers/net/mlx5/mlx5_dr.c
The Connect-X steering is a lookup hardware mechanism that accesses
flow tables, matches packets to the rules, and performs specified actions.
Historically, mlx5 PMD implements several software engines to manage
steering hardware facility:
- FW Steering - Verbs/Direct Verbs, uses FW calls to ma
Hi,
> -Original Message-
> From: Stephen Hemminger
> Sent: Wednesday, February 23, 2022 12:07 AM
> To: Li, Miao
> Cc: dev@dpdk.org; Hunt, David ; Wang, Yinan
>
> Subject: Re: [PATCH v1] power: add wakeup log
>
> On Tue, 22 Feb 2022 13:52:27 +
> Miao Li wrote:
>
> > +
Hi,
> -Original Message-
> From: Hunt, David
> Sent: Wednesday, February 23, 2022 12:32 AM
> To: Li, Miao ; dev@dpdk.org
> Cc: Wang, Yinan ; step...@networkplumber.org
> Subject: Re: [PATCH v1] power: add wakeup log
>
>
> On 22/2/2022 1:52 PM, Miao Li wrote:
> > This patch adds a log in
> -Original Message-
> From: Kevin Liu
> Sent: Friday, December 24, 2021 11:09 PM
> To: dev@dpdk.org
> Cc: Zhang, Qi Z ; Yang, SteveX
> ; Liu, KevinX ;
> sta...@dpdk.org
> Subject: [PATCH] net/ice: fix Tx offload path choice
>
> Testpmd forwards packets in checksum mode that it needs to c
> -Original Message-
> From: Jiang, YuX
> Sent: Thursday, February 17, 2022 1:31 PM
> To: Thomas Monjalon ; dev (dev@dpdk.org)
>
> Cc: Devlin, Michelle ; Mcnamara, John
> ; Yigit, Ferruh
> Subject: RE: release candidate 22.03-rc1
>
> > -Original Message-
> > From: Thomas Monjalo
From: Xuan Ding
This patch adds the use case for async dequeue API. Vswitch can
leverage DMA device to accelerate vhost async dequeue path.
Signed-off-by: Wenwu Ma
Signed-off-by: Yuan Wang
Signed-off-by: Xuan Ding
---
doc/guides/sample_app_ug/vhost.rst | 9 +-
examples/vhost/main.c
From: Xuan Ding
This patch implements asynchronous dequeue data path for vhost split
ring, with dmadev library integrated.
Signed-off-by: Xuan Ding
Signed-off-by: Yuan Wang
---
lib/vhost/rte_vhost_async.h | 37 ++-
lib/vhost/version.map | 1 +
lib/vhost/vhost.h | 1 +
lib
From: Xuan Ding
The presence of an asynchronous path allows applications to offload
memory copies to DMA engine, so as to save CPU cycles and improve
the copy performance. This patch set is a draft implementation for
split ring in vhost async dequeue data path. The code is based on
latest enqueue
Hi,
> -Original Message-
> From: Ferruh Yigit
> Sent: Thursday, February 24, 2022 2:46 AM
> To: Suanming Mou ; Slava Ovsiienko
> ; Matan Azrad
> Cc: Raslan Darawsheh ; dev@dpdk.org
> Subject: Re: [PATCH] net/mlx5: remove unused function
>
> On 2/15/2022 9:46 AM, Suanming Mou wrote:
> >
Cast 1 to type uint64_t to avoid overflow.
CID 375812 (#1 of 1):
Unintentional integer overflow (OVERFLOW_BEFORE_WIDEN)
overflow_before_widen: Potentially overflowing expression 1 << 2 * i + 1
with type int (32 bits, signed) is evaluated using 32-bit arithmetic, and
then used in a context that exp
On 2/23/2022 1:48 PM, Michael Baum wrote:
The "tx_db_nc" devarg forces doorbell register mapping to non-cached
region eliminating the extra write memory barrier. This argument was
used in creating the UAR for Tx and thus affected its performance.
Recently [1] its use has been extended to all UAR
On 2/23/2022 2:39 PM, Raslan Darawsheh wrote:
Hi,
-Original Message-
From: Shun Hao
Sent: Tuesday, February 22, 2022 5:07 PM
To: Matan Azrad ; Slava Ovsiienko
; or...@nvidia.com ; tho...@monjalon.net ;
Xueming(Steven) Li
Cc: dev@dpdk.org ; Raslan Darawsheh ;
sta...@dpdk.org
Subject: [
On 2/22/2022 10:26 AM, Viacheslav Ovsiienko wrote:
Updated:
- send scheduling feature description for mlx5
- release notes
Signed-off-by: Viacheslav Ovsiienko
---
doc/guides/nics/mlx5.rst | 5 +
doc/guides/rel_notes/release_22_03.rst | 6 ++
2 files changed, 11 i
Add support queue/RSS action for external RxQ.
In indirection table creation, the queue index will be taken from
mapping array.
This feature supports neither LRO nor Hairpin.
Signed-off-by: Michael Baum
---
doc/guides/nics/mlx5.rst | 1 +
doc/guides/rel_notes/release_22_03.rst |
External queue is a queue that has been created and managed outside the
PMD. The queues owner might use PMD to generate flow rules using these
external queues.
When the queue is created in hardware it is given an ID represented by
32 bits. In contrast, the index of the queues in PMD is represented
The RxQ/TxQ control structure has a field named type. This type is enum
with values for standard and hairpin.
The use of this field is to check whether the queue is of the hairpin
type or standard.
This patch replaces it with a boolean variable that saves whether it is
a hairpin.
Signed-off-by: M
Add option to probe common device using import CTX/PD functions instead
of create functions.
This option requires accepting the context FD and the PD handle as
devargs.
This sharing can be useful for applications that use PMD for only some
operations. For example, an app that generates queues itse
Add support for rdma-core API to import device.
The API gets ibv_context file descriptor and returns an ibv_context
pointer that is associated with the given file descriptor.
Add also support for rdma-core API to import PD.
The API gets ibv_context and PD handle and returns a protection domain
(PD)
The functions which are not explicitly marked as internal
were exported because the local catch-all rule was missing in the
version script.
After adding the missing rule, all local functions are hidden.
The function mlx5_get_device_guid is used in another library,
so it needs to be exported (as int
These patches add support to external Rx queues.
External queue is a queue that is managed by a process external to PMD,
but uses PMD process to generate its flow rules.
For the hardware to allow the DPDK process to set rules for it, the
process needs to use the same PD of the external process. In
> -Original Message-
> From: Tyler Retzlaff
> Sent: Wednesday, February 23, 2022 12:05 PM
> To: dev@dpdk.org
> Subject: meson test --test-args="--no-huge"
>
> noticing that meson test --test-args="--no-huge" has a pretty significant
> number of failures.
>
> given --no-huge isn't test
On 2/15/2022 9:46 AM, Suanming Mou wrote:
The mlx5_l3t_prepare_entry() function is not used anymore.
This commit removes the unused mlx5_l3t_prepare_entry() function.
Can you please send the fixes tag, to document when this
function became unused?
I can add it in next-net.
Signed-off-by: Su
Updated AESNI MB and AESNI GCM, KASUMI, ZUC and SNOW3G PMD documentation
guides with information about the latest Intel IPSec Multi-buffer
library supported.
Signed-off-by: Pablo de Lara
---
doc/guides/cryptodevs/aesni_gcm.rst | 8
doc/guides/cryptodevs/aesni_mb.rst | 8
doc/g
> From: Megha Ajmera [mailto:megha.ajm...@intel.com]
> Sent: Wednesday, 23 February 2022 18.37
>
> Masking of core mask was incorrect. Instead of using 1U for shifting,
> it
> should be using 1LU as the result is assigned to uint64.
>
> CID 375859: Potentially overflowing expression "1U << app_ma
On 2/23/2022 12:19 PM, Michal Krawczyk wrote:
Hi,
this set contains new ENA features:
* New xstats.
* Reconfigurable link status event.
* Usage of the optimized memcpy on arm/arm64.
* Better MP support.
* Reconfigurable Tx completion timeout value using devarg.
Beside that, this patchset conta
On 2/23/2022 5:47 PM, Michał Krawczyk wrote:
śr., 23 lut 2022 o 18:25 Ferruh Yigit napisał(a):
On 2/23/2022 12:19 PM, Michal Krawczyk wrote:
Those variables are being set, but never read. As they seem to be
leftover from the old offloads API and don't have any purpose right
now, they are simp
noticing that meson test --test-args="--no-huge" has a pretty
significant number of failures.
given --no-huge isn't tested at all is there value in keeping no-huge
support? or is this just unintentional since the --no-huge configuration
isn't run in the CI pipelines?
what's the promise from dpdk
śr., 23 lut 2022 o 18:25 Ferruh Yigit napisał(a):
>
> On 2/23/2022 12:19 PM, Michal Krawczyk wrote:
> > Those variables are being set, but never read. As they seem to be
> > leftover from the old offloads API and don't have any purpose right
> > now, they are simply being removed.
> >
>
> It can b
> From: Weiguo Li
>
> We allocated memory for 'q', we don't free it when null check for 'd' fails
> and
> it will lead to memory leak.
> We can move null check for 'd' ahead of the memory allocation to fix it.
>
> Fixes: 060e76729302 ("baseband/acc100: add queue configuration")
>
> Signed-off-
Masking of core mask was incorrect. Instead of using 1U for shifting, it
should be using 1LU as the result is assigned to uint64.
CID 375859: Potentially overflowing expression "1U << app_main_core" with
type "unsigned int" (32 bits, unsigned) is evaluated using 32-bit
arithmetic, and then used in
śr., 23 lut 2022 o 18:26 Ferruh Yigit napisał(a):
>
> On 2/23/2022 12:19 PM, Michal Krawczyk wrote:
> > As the default behavior for arm64 is to alias rte_memcpy as memcpy, ENA
> > cannot redefine memcpy as rte_memcpy as it would cause nested
> > declaration.
> >
> > To make it possible to use opti
On 2/23/2022 12:19 PM, Michal Krawczyk wrote:
Those variables are being set, but never read. As they seem to be
leftover from the old offloads API and don't have any purpose right
now, they are simply being removed.
It can be good to add fixes tag, both for
- document in which commit old offlo
On 2/23/2022 12:19 PM, Michal Krawczyk wrote:
As the default behavior for arm64 is to alias rte_memcpy as memcpy, ENA
cannot redefine memcpy as rte_memcpy as it would cause nested
declaration.
To make it possible to use optimized memcpy in the ena_com layer on Arm,
Out of curiosity, do you hav
22/02/2022 09:28, Tomasz Duszynski:
> Fix issues that were discovered during coverity scan.
>
> Tomasz Duszynski (2):
> raw/cnxk_gpio: fix resource leak
> raw/cnxk_gpio: check pointer before using it
Applied, thanks.
On 2/23/2022 12:19 PM, Michal Krawczyk wrote:
The enumeration seems to be leftover from porting the Linux driver to
the DPDK. It was used nowhere and refers to the ethtool which is not
present in the DPDK.
Fixes: 372c1af5ed8f ("net/ena: add dedicated memory area for extra device
info")
On Wed, Feb 23, 2022 at 5:11 PM Jerin Jacob wrote:
>
> On Wed, Feb 23, 2022 at 3:20 PM Rakesh Kudurumalla
> wrote:
> >
> > resolve compilation error caused due to gcc 12 version
> > error: storing the address of local variable message in *error.message
> >
> > Fixes: 26b034f78ca7 ("net/cnxk: supp
2022-02-21 00:56 (UTC+0300), Dmitry Kozlyuk:
> 2022-02-09 13:57 (UTC+), Ananyev, Konstantin:
> > > > Actually, please scrap that comment.
> > > > Obviously it wouldn't work for static variables,
> > > > and doesn't make much sense.
> > > > Though few thoughts remain:
> > > > for posix we probab
>> > >> >> >
>> > >> >> > + @Van Haaren, Harry
>> > >> >
>> > >> >Hi All,
>> > >> >
>> > >> >I have been away on vacation for the last week - hence the delay
>> > >> >in reply on this thread.
>> > >> >
>> > >> >
>> > >> >
>> > >> >> > > [1]
>> > >> >> > > Steps to reproduce:
>> > >> >> > > * Clone
On Wed, Feb 23, 2022 at 1:04 PM Ganapati Kundapura
wrote:
>
> eca_cryptodev_cdev_flush() is internal function and called with
> valid range of cdevs.
>
> crypto_cdev_info structure is allocated at adapter creation time
> and retrieved from the adapter for a valid cdevs which cannot be NULL
> and h
On Wed, Feb 23, 2022 at 5:59 PM Akhil Goyal wrote:
>
> From: Vidya Sagar Velumuri
>
> Add capability and support for inbound reassembly
> in cnxk driver.
> Register the dynamic field for IPsec reassembly.
> Attach the fragments using the dynamic field in case of incomplete
> reassembly
>
> Signed
On 23/02/2022 16:16, Kamaraj P wrote:
Thanks Kevin.
Apart from release notes to identify changes of DPDK version from 19.11 to
21.11, is there any any major design changes in DPDK ? for example (memory
management, mempool allocation behavior etc)
Please share if there is any pointers.
Notably
On Wed, Feb 23, 2022 at 5:58 PM Akhil Goyal wrote:
>
> From: Vidya Sagar Velumuri
>
> When reassembly is enabled by application, set corresponding
> flags in SA during creation.
>
> Provide roc API to configure reassembly unit with active and zombie limits
> and step size
>
> Signed-off-by: Vidya
On Wed, Feb 23, 2022 at 1:05 AM Nithin Dabilpuram
wrote:
>
> From: Satha Rao
>
> CN10K supports up to 832 resources at SMQ level, so increase
> bitmap count to 1024.
>
> Signed-off-by: Satha Rao
> ---
>
> v2:
> - Addressed comments from Jerin on patches 1/20, 3/20, 7/20,
> 8/20, 10/20, 11/20,
> -Original Message-
> From: Van Haaren, Harry
> Sent: Wednesday, February 23, 2022 3:43 PM
> To: Shijith Thotton ; Gujjar, Abhinandan S
> ; Jerin Jacob ;
> Hemant Agrawal ; Nipun Gupta
>
> Cc: Jerin Jacob Kollanukkaran ; dev@dpdk.org
> Subject: RE: [PATCH v5] app/eventdev: add crypto p
Link status change takes time that depends on the HW and the kernel.
It was checked immediately after the change was issued at probing.
If the port had beed down before probing, a "down" state may be read,
while the port would be "up" imminently.
After that, DPDK reported the port as "down" mistake
Sometimes net/mlx5 devices did not detect link status change to "up".
Each shared device was monitoring IBV_EVENT_PORT_{ACTIVE,ERR}
and queried the link status upon receiving the event.
IBV_EVENT_PORT_ACTIVE is delivered when the logical link status
(UP flag) is set, but the physical link status (
Introduce mlx5_nl_read_events() to read Netlink events
(technically, messages) from a socket that was configured
to listen for them via a new mlx5_nl_init() parameter.
Add mlx5_nl_parse_link_status_update() helper
to extract information from link-related events.
This patch is a shared base for late
This patchset fixes two related issues:
* In rare occasions with any HW link state change to UP was missed.
* If a port was DOWN before startup, its netdev would come UP,
but appear DOWN in DPDK (especially probable with ConnectX-4).
Dmitry Kozlyuk (3):
common/mlx5: add Netlink event helpers
23/02/2022 14:50, Ferruh Yigit:
> On 2/23/2022 1:32 PM, Tomasz Duszynski wrote:
> > PMD driver got merged during 22.03 merge window and number in map file
> > should reflect that.
> >
> > Fixes: d0b8a4e19131 ("raw/cnxk_gpio: add GPIO driver skeleton")
> >
> > Reported-by: Ferruh Yigit
> > Signed
Thanks Kevin.
Apart from release notes to identify changes of DPDK version from 19.11 to
21.11, is there any any major design changes in DPDK ? for example (memory
management, mempool allocation behavior etc)
Please share if there is any pointers.
Thanks,
Kamaraj
On Mon, Feb 21, 2022 at 3:53 PM
Hi Chuanshe,
> -Original Message-
> From: Chuanshe Zhang
> Sent: Tuesday, January 18, 2022 2:50 AM
> To: dev@dpdk.org
> Cc: Iremonger, Bernard
> Subject: [PATCH] examples/flow_classify: fix spelling when log error
>
> Signed-off-by: Chuanshe Zhang
> ---
> examples/flow_classify/flow_c
KASUMI, SNOW3G and ZUC require lengths and offsets to
be set in bits or bytes depending on the algorithm.
There were some algorithms that were mixing these two,
so this commit is fixing this issue.
Fixes: ae8e085c608d ("crypto/aesni_mb: support KASUMI F8/F9")
Fixes: 6c42e0cf4d12 ("crypto/aesni_mb:
ZUC PMD batches crypto operations depending on their type
(encryption + tag generation, tag verification + decryption, etc),
to allow parallelization.
The array used to store the pointers to these operations was
always the same array provided by dequeue_burst() function,
and it was looping around t
ZUC authentication is done over multiple buffers at a time.
When authentication verification is done, multiple scratch buffers
are using to generate the tags that will be compared afterwards.
However, the same scratch buffer was used always, instead of having
different ones for each crypto operatio
When processing crypto operations in ZUC PMD,
there were two operation types that were set at session level,
but not checked when the operations are enqueued and processed,
leaving the buffers untouched silently.
Fixes: cde8df1bda9d ("crypto/ipsec_mb: move zuc PMD")
Cc: piotrx.bronow...@intel.com
This patchset fixes various issues affecting ZUC and AESNI MB PMD,
when ZUC algorithm is used.
-v2: rebased on main branch
Pablo de Lara (4):
crypto/ipsec_mb: check for missing operation types
crypto/ipsec_mb: fix ZUC authentication verify
crypto/ipsec_mb: fix crypto operation overwrite
c
17/02/2022 03:59, Chengwen Feng:
> This patchset add Kunpeng930 DMA devices, and also include two patch
> used to enhance HiSilicon DMA PMD.
>
> Chengwen Feng (5):
> dma/hisilicon: support Kunpeng930 DMA devices
> dma/hisilicon: support handles errors with Kunpeng930 DMA
> dma/hisilicon: sup
16/02/2022 17:06, Bruce Richardson:
> This set contains a number of small fixes and updates for the idxd dma
> driver, mainly in the area of properly handling cases where the default
> max batch size is configured to a lower than expected value.
>
> Bruce Richardson (3):
> app/test: fix missing
Hi, Honnappa
The CPU information is as follows:
Architecture:aarch64
CPU op-mode(s): 64-bit
Byte Order: Little Endian
CPU(s): 128
On-line CPU(s) list: 0-127
Thread(s) per core: 1
Core(s) p
Hi Fan, Akhil,
In that case, I don't think there is any other alternative than what Fan
suggested (remove it now and add back along with capabilities). No objections
to that from my end. Leaving that to Akhil's judgement.
I would still prefer adding a driver specific check, though.
Thanks,
Ano
On Wed, 23 Feb 2022 14:49:12 +0100
Thomas Monjalon wrote:
> 23/02/2022 12:20, Ferruh Yigit:
> > On 2/23/2022 10:42 AM, Morten Brørup wrote:
> > > +Thomas, you may be interested in this discussion about applications
> > > using an uint64_t bit mask to identify active lcores.
> > >
> > >> Fro
Hi Akhil,
Currently these tests will fail on QAT - is it possible to merge this patch so
that QAT won't fail and we can add them back after the capability check is
added in the next release?
Regards,
Fan
> -Original Message-
> From: Akhil Goyal
> Sent: Wednesday, February 23, 2022 2:3
Hi,
> -Original Message-
> From: Shun Hao
> Sent: Tuesday, February 22, 2022 5:07 PM
> To: Matan Azrad ; Slava Ovsiienko
> ; or...@nvidia.com ; tho...@monjalon.net ;
> Xueming(Steven) Li
> Cc: dev@dpdk.org ; Raslan Darawsheh ;
> sta...@dpdk.org
> Subject: [PATCH v1] drivers: fix incorrec
Hi Anoob/Fan,
We no more add driver specific checks in test app. Everything comes from
capabilities.
We may defer this patch to next release till we have something in capability or
some other way.
> Hi Anoob,
>
> Make sense. Will do ASAP.
>
> Regards,
> Fan
>
Hi,
> -Original Message-
> From: Michael Baum
> Sent: Wednesday, February 23, 2022 3:48 PM
> To: dev@dpdk.org
> Cc: Matan Azrad ; Raslan Darawsheh
> ; Slava Ovsiienko
> Subject: [PATCH v2 0/5] Refactor mlx5 guides
>
> Recently [1] all the drivers running over the mlx5 device started sha
Hi Anoob,
Make sense. Will do ASAP.
Regards,
Fan
> -Original Message-
> From: Anoob Joseph
> Sent: Wednesday, February 23, 2022 1:29 PM
> To: Zhang, Roy Fan ; Kusztal, ArkadiuszX
>
> Cc: Akhil Goyal ; Umesh Kartha
> ; Ramkumar Balu ;
> dev@dpdk.org
> Subject: RE: [EXT] [PATCH] test/cry
On 2/23/2022 10:28 AM, Jiawen Wu wrote:
Remove redundant debug logs and unify the log format.
v2:
- Fix compile error.
- Merge broken log message lines.
- Use 'RTE_ETHER_ADDR_PRT_FMT' for MAC format.
Jiawen Wu (2):
net/ngbe: fix debug log
net/txgbe: fix debug log
Series applied to dpdk
On 2/23/2022 12:49 PM, Ferruh Yigit wrote:
On 2/23/2022 10:28 AM, Jiawen Wu wrote:
Remove 'DEBUGFUNC' due to too many invalid debug log prints, unify the
DEBUG level macros.
Fixes: 7dc117068a7c ("net/txgbe: support probe and remove")
Cc:sta...@dpdk.org
Signed-off-by: Jiawen Wu
---
drivers/ne
On 2/23/2022 1:32 PM, Tomasz Duszynski wrote:
PMD driver got merged during 22.03 merge window and number in map file
should reflect that.
Fixes: d0b8a4e19131 ("raw/cnxk_gpio: add GPIO driver skeleton")
Reported-by: Ferruh Yigit
Signed-off-by: Tomasz Duszynski
Acked-by: Ferruh Yigit
23/02/2022 12:20, Ferruh Yigit:
> On 2/23/2022 10:42 AM, Morten Brørup wrote:
> > +Thomas, you may be interested in this discussion about applications using
> > an uint64_t bit mask to identify active lcores.
> >
> >> From: Ferruh Yigit [mailto:ferruh.yi...@intel.com]
> >> Sent: Wednesday, 23 Feb
The "tx_db_nc" devarg forces doorbell register mapping to non-cached
region eliminating the extra write memory barrier. This argument was
used in creating the UAR for Tx and thus affected its performance.
Recently [1] its use has been extended to all UAR creation in all mlx5
drivers, and now its n
Adds new documentation for MLX5 common driver that contains:
- Its features list (doesn't exist for now).
- Its devargs description.
- Device configuration information and tutorial.
- Quick Start Guide for Mellanox OFED/EN.
Move into this doc all shared information from other MLX5 PMD docs and
Update "BlueField 2" -> "BlueField-2" in mlx5 docs.
Signed-off-by: Michael Baum
Reviewed-by: Raslan Darawsheh
Acked-by: Viacheslav Ovsiienko
---
doc/guides/compressdevs/mlx5.rst | 6 +++---
doc/guides/cryptodevs/mlx5.rst | 6 +++---
doc/guides/nics/mlx5.rst | 2 +-
doc/guides/regexde
Update links in both mlx4 and mlx5 doc.
Signed-off-by: Michael Baum
Reviewed-by: Raslan Darawsheh
Acked-by: Viacheslav Ovsiienko
---
doc/guides/nics/mlx4.rst | 4 ++--
doc/guides/nics/mlx5.rst | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/doc/guides/nics/mlx4.rst b
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