On 06/05/2013 05:49 PM, Stephen Hemminger wrote:
> On Wed, 05 Jun 2013 16:50:03 +0200
> Damien Millescamps wrote:
>
>> Hi Stephen,
>>
>> Overall this patch is very nice. My only comment on this one is why do
>> you limit the max number of memory resources to 5 ?
>> The PCI configuration space perm
Hi Stephen,
Overall this patch is very nice. My only comment on this one is why do
you limit the max number of memory resources to 5 ?
The PCI configuration space permits to store up to 6 base addresses.
> +#define PCI_MEM_RESOURCE 5
Please, can you add a log/comment with your patch, too ?
Che
On 30/05/2013 19:12, Stephen Hemminger wrote:
> By default, DPDK based applications would only allow logging
> to syslog as "rte", DAEMON; but for any production application more
> control is desired to allow using actual application name and
> overriding the facility.
>
> Signed-off-by: Stephen He
On 30/05/2013 19:12, Stephen Hemminger wrote:
> Both logging and calls to panic are never in the critical path.
> Use the GCC attribute cold to mark these functions as cold,
> which generates more optimised code.
>
> Signed-off-by: Stephen Hemminger
Reviewed-by: Vincent Jardin
It does not hurt to
On 30/05/2013 19:12, Stephen Hemminger wrote:
> In many application there are no timers queued, and the call to
> rte_timer_managecan be optimized in that case avoid reading HPET and
> lock overhead.
>
> Signed-off-by: Stephen Hemminger
Reviewed-by: Vincent Jardin
It is a nice to have for perform
On 30/05/2013 19:12, Stephen Hemminger wrote:
> The 82576 has known issues which require the write threshold to be set to 1.
> See:
> http://download.intel.com/design/network/specupdt/82576_SPECUPDATE.pdf
>
> If not then single packets will hang in transmit ring until more arrive.
> Simple te
The code to do interrupts in the igb_uio is broken on later kernel versions
because pci_cfg_access_lock must not be used from interrupt context. But there
is
a much better way of doing all this now that a generic access to INTX
is available. Use pci_intx routines in later kernels, and provide back
On Wed, 05 Jun 2013 20:05:15 +0200
Damien Millescamps wrote:
> On 06/05/2013 05:49 PM, Stephen Hemminger wrote:
> > On Wed, 05 Jun 2013 16:50:03 +0200
> > Damien Millescamps wrote:
> >
> >> Hi Stephen,
> >>
> >> Overall this patch is very nice. My only comment on this one is why do
> >> you limi
On Wed, 05 Jun 2013 16:50:03 +0200
Damien Millescamps wrote:
> Hi Stephen,
>
> Overall this patch is very nice. My only comment on this one is why do
> you limit the max number of memory resources to 5 ?
> The PCI configuration space permits to store up to 6 base addresses.
>
> > +#define PCI_M
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