@@ -1545,6 +1605,30 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
break;
}
case Builtin::BI__builtin_hlsl_elementwise_saturate:
spall wrote:
No I did not; It is supposed to fall through to the next case, so I will
@@ -18695,6 +18695,50 @@ case Builtin::BI__builtin_hlsl_elementwise_isinf: {
CGM.getHLSLRuntime().getSaturateIntrinsic(), ArrayRef{Op0},
nullptr, "hlsl.saturate");
}
+ case Builtin::BI__builtin_hlsl_select: {
+Value *OpCond = EmitScalarExpr(E->getArg(0));
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/107129
>From 3e0cd3c450eb4aa28742c4879733987e9e2692e7 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 28 Aug 2024 01:44:35 +
Subject: [PATCH 1/4] implement select intrinsic
---
clang/include/clang/Basic/Built
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/107129
>From 3e0cd3c450eb4aa28742c4879733987e9e2692e7 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 28 Aug 2024 01:44:35 +
Subject: [PATCH 1/5] implement select intrinsic
---
clang/include/clang/Basic/Built
@@ -1544,6 +1604,30 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
break;
}
+ case Builtin::BI__builtin_hlsl_select: {
spall wrote:
I think it is slightly special. It is a template function, and t
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/107129
>From 3e0cd3c450eb4aa28742c4879733987e9e2692e7 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 28 Aug 2024 01:44:35 +
Subject: [PATCH 1/6] implement select intrinsic
---
clang/include/clang/Basic/Built
@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK
+
+// CHECK: %hlsl.select = select i1
+// CHECK: ret i32 %hlsl.selec
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/107129
>From 3e0cd3c450eb4aa28742c4879733987e9e2692e7 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 28 Aug 2024 01:44:35 +
Subject: [PATCH 1/7] implement select intrinsic
---
clang/include/clang/Basic/Built
@@ -1512,6 +1512,83 @@ void SetElementTypeAsReturnType(Sema *S, CallExpr
*TheCall,
TheCall->setType(ReturnType);
}
+static bool CheckScalarOrVector(Sema *S, CallExpr *TheCall, QualType Scalar,
+ unsigned ArgIndex) {
+ assert(TheCall->getNumArg
@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
spall wrote:
How do I fix this?
https://github.com/llvm/llvm-project/pull/107129
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://github.com/spall deleted
https://github.com/llvm/llvm-project/pull/107129
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/107129
>From 3e0cd3c450eb4aa28742c4879733987e9e2692e7 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 28 Aug 2024 01:44:35 +
Subject: [PATCH 1/8] implement select intrinsic
---
clang/include/clang/Basic/Built
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/107129
>From 3e0cd3c450eb4aa28742c4879733987e9e2692e7 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 28 Aug 2024 01:44:35 +
Subject: [PATCH 1/9] implement select intrinsic
---
clang/include/clang/Basic/Built
https://github.com/spall created
https://github.com/llvm/llvm-project/pull/108121
Implement elementwise popcount to support HLSL function 'countbits'.
Closes #99094
>From 365886deae6e35ee2761c2fae2a28caa0e214880 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Fri, 6 Sep 2024 21:03:05 +
spall wrote:
This pull request is missing the appropriate text in 'ReleaseNotes.rst'. I am
looking for advice on what is appropriate to put in that file, and where.
https://github.com/llvm/llvm-project/pull/108121
___
cfe-commits mailing list
cfe-comm
https://github.com/spall created
https://github.com/llvm/llvm-project/pull/108128
The test called 'ceil' instead of 'bitreverse', which I assume was a copy paste
leftover.
>From 86e24b508c47ee6ad09cbaec299baeab32cf964b Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 11 Sep 2024 01:22:37
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/108128
>From 8146b03b49a94532335f9bb238c6c41c9a800034 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 11 Sep 2024 01:22:37 +
Subject: [PATCH] fix elementwise bitreverse test
---
clang/test/Sema/builtins-eleme
spall wrote:
> > This pull request is missing the appropriate text in 'ReleaseNotes.rst'. I
> > am looking for advice on what is appropriate to put in that file, and where.
>
> Here's a PR with ReleaseNotes.rst change
> [57f879c#diff-ec770381d76c859f5f572db789175fe44410a72608f58ad5dbb14335ba56
https://github.com/spall created
https://github.com/llvm/llvm-project/pull/107129
Implement support for HLSL intrinsic select.
This would close issue #75377
>From 226ea652f160b22922e9582c5a5c53511042d735 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 28 Aug 2024 01:44:35 +
Subject:
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/107129
>From 3e0cd3c450eb4aa28742c4879733987e9e2692e7 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 28 Aug 2024 01:44:35 +
Subject: [PATCH 1/3] implement select intrinsic
---
clang/include/clang/Basic/Built
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/108121
>From 4a892930ab4d97b5621d8066b23c48c7278d14e0 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Fri, 6 Sep 2024 21:03:05 +
Subject: [PATCH 1/2] implement elementwise popcount to implement countbits
---
clang
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/108121
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -248,13 +248,14 @@ which is a term made up for HLSL. A cx-value is a
temporary value which may be
the result of a cast, and stores its value back to an lvalue when the value
expires.
-To represent this concept in Clang we introduce a new ``HLSLOutParamExpr``. An
-``HLSLOut
https://github.com/spall approved this pull request.
https://github.com/llvm/llvm-project/pull/106860
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
spall wrote:
> It is not correct to limit firstbithigh to 32 bit integers. There are a
> couple of reasons that might make one think that it is, but we do in fact
> want/need to support int16 and int64 here.
>
> 1. The [HLSL
> docs](https://learn.microsoft.com/en-us/windows/win32/direct3d
https://github.com/spall approved this pull request.
https://github.com/llvm/llvm-project/pull/108396
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111082
>From e9ed9f9a0415544781f8334b305eb3916fc0862c Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 23 Sep 2024 22:10:59 +
Subject: [PATCH 1/4] implement firstbithigh hlsl builtin
---
clang/include/clang/Ba
@@ -0,0 +1,37 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
spall wrote:
I removed the non-32 bit tests, exce
https://github.com/spall approved this pull request.
LGTM but I didn't look too closely at the tests.
https://github.com/llvm/llvm-project/pull/110802
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listin
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/111209
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111082
>From e9ed9f9a0415544781f8334b305eb3916fc0862c Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 23 Sep 2024 22:10:59 +
Subject: [PATCH 1/3] implement firstbithigh hlsl builtin
---
clang/include/clang/Ba
@@ -2625,6 +2645,8 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register
ResVReg,
return selectFmix(ResVReg, ResType, I);
case Intrinsic::spv_length:
return selectLength(ResVReg, ResType, I);
+ case Intrinsic::spv_degrees:
+return selectDegrees(ResVReg, Res
@@ -1643,6 +1646,23 @@ bool SPIRVInstructionSelector::selectLength(Register
ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
+bool SPIRVInstructionSelector::selectDegrees(Register ResVReg,
+ const SPIRVType *ResType,
+
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111082
>From 62af64102d96405d9a572a054ad4c2fa87ba8867 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 23 Sep 2024 22:10:59 +
Subject: [PATCH 1/4] implement firstbithigh hlsl builtin
---
clang/include/clang/Ba
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111082
>From 62af64102d96405d9a572a054ad4c2fa87ba8867 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 23 Sep 2024 22:10:59 +
Subject: [PATCH 1/5] implement firstbithigh hlsl builtin
---
clang/include/clang/Ba
https://github.com/spall created
https://github.com/llvm/llvm-project/pull/113189
Restricts hlsl countbits to always return a uint32.
Implements a lowering from llvm.ctpop which has an overloaded return type to
dxil cbits op which always returns uint32.
Closes #112779
>From f110f3167769d91dd8
@@ -705,66 +705,74 @@ float4 cosh(float4);
#ifdef __HLSL_ENABLE_16_BIT
_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_popcount)
-int16_t countbits(int16_t);
spall wrote:
When I asked Justin about this he pointed to this link:
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/113189
>From f110f3167769d91dd87b260b30c2a61cc754b619 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 16 Oct 2024 19:00:08 +
Subject: [PATCH 1/2] implement countbits correctly
---
clang/lib/Headers/hlsl/hlsl_
spall wrote:
> > > Despite all of this, DXC does indeed support 16- and 64-bit overloads, as
> > > seen here: https://hlsl.godbolt.org/z/qbc17xz35
> > > Note that the return type of the operation is not overloaded - all of the
> > > overloads of this function return uint.
> >
> >
> > Why is t
@@ -461,6 +461,67 @@ class OpLowerer {
});
}
+ [[nodiscard]] bool lowerCtpopToCBits(Function &F) {
+IRBuilder<> &IRB = OpBuilder.getIRB();
+Type *Int32Ty = IRB.getInt32Ty();
+
+return replaceFunction(F, [&](CallInst *CI) -> Error {
+ IRB.SetInsertPoint(
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111082
>From 62af64102d96405d9a572a054ad4c2fa87ba8867 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 23 Sep 2024 22:10:59 +
Subject: [PATCH 1/6] implement firstbithigh hlsl builtin
---
clang/include/clang/Ba
https://github.com/spall created
https://github.com/llvm/llvm-project/pull/111047
Get inout/out parameters working for HLSL Arrays.
Utilizes the fix from #109323, and corrects the assignment behavior slightly to
allow for Non-LValues on the RHS.
Closes #106917
>From c73ce3707e59242b8ccbb6757
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111047
>From c73ce3707e59242b8ccbb6757a290938c2d39e5e Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Tue, 17 Sep 2024 20:25:46 +
Subject: [PATCH 1/5] theoretically fix issue
---
clang/lib/Sema/SemaType.cpp | 4 ++
https://github.com/spall created
https://github.com/llvm/llvm-project/pull/111082
Implements elementwise firstbithigh hlsl builtin.
Implements firstbituhigh intrinsic for spirv and directx, which handles
unsigned integers
Implements firstbitshigh intrinsic for spirv and directx, which handles s
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111082
>From e9ed9f9a0415544781f8334b305eb3916fc0862c Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 23 Sep 2024 22:10:59 +
Subject: [PATCH 1/2] implement firstbithigh hlsl builtin
---
clang/include/clang/Ba
@@ -0,0 +1,37 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK: OpMemoryModel Logical GLSL450
+
+define noundef i32 @fi
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/111082
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
spall wrote:
> It is not correct to limit firstbithigh to 32 bit integers. There are a
> couple of reasons that might make one think that it is, but we do in fact
> want/need to support int16 and int64 here.
>
> 1. The [HLSL
> docs](https://learn.microsoft.com/en-us/windows/win32/direct3d
@@ -808,6 +835,20 @@ bool SPIRVInstructionSelector::selectExtInst(Register
ResVReg,
return false;
}
+bool SPIRVInstructionSelector::selectNAryOpWithSrcs(Register ResVReg,
+const SPIRVType *ResType,
+
@@ -424,7 +424,7 @@ Register SPIRVGlobalRegistry::getOrCreateCompositeOrNull(
LLT LLTy = LLT::scalar(64);
Register SpvVecConst =
CurMF->getRegInfo().createGenericVirtualRegister(LLTy);
-CurMF->getRegInfo().setRegClass(SpvVecConst, &SPIRV::iIDRegClass);
+
@@ -461,6 +461,67 @@ class OpLowerer {
});
}
+ [[nodiscard]] bool lowerCtpopToCBits(Function &F) {
+IRBuilder<> &IRB = OpBuilder.getIRB();
+Type *Int32Ty = IRB.getInt32Ty();
+
+return replaceFunction(F, [&](CallInst *CI) -> Error {
+ IRB.SetInsertPoint(
@@ -4690,8 +4690,9 @@ void CodeGenFunction::EmitCallArg(CallArgList &args,
const Expr *E,
return emitWritebackArg(*this, args, CRE);
}
- assert(type->isReferenceType() == E->isGLValue() &&
- "reference binding to unmaterialized r-value!");
+ assert(type->isArr
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/113189
>From 23d62026c8338e6ad92495cfcaa54ff1fa5d08f0 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 16 Oct 2024 19:00:08 +
Subject: [PATCH 1/5] implement countbits correctly
---
clang/lib/Headers/hlsl/hlsl_
@@ -0,0 +1,107 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK: OpMemoryModel Logical GLSL450
+
+define noundef i32 @f
https://github.com/spall closed https://github.com/llvm/llvm-project/pull/113189
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
spall wrote:
Waiting on #114482
https://github.com/llvm/llvm-project/pull/111082
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/111082
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -449,6 +449,15 @@ Register SPIRVGlobalRegistry::getOrCreateCompositeOrNull(
return Res;
}
+Register SPIRVGlobalRegistry::getOrCreateConstScalarOrVector(
+uint64_t Val, MachineInstr &I, SPIRVType *SpvType,
+const SPIRVInstrInfo &TII, bool ZeroAsNull) {
+ if (SpvTy
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111047
>From 0797f19cad4ca9cf605725de1ac838cccacda1fc Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Tue, 17 Sep 2024 20:25:46 +
Subject: [PATCH 1/6] theoretically fix issue
---
clang/lib/Sema/SemaType.cpp | 4 ++
@@ -37,13 +39,12 @@ define noundef i32 @firstbituhigh_i64(i64 noundef %a) {
entry:
; CHECK: [[O:%.*]] = OpBitcast %[[#]] %[[#]]
; CHECK: [[N:%.*]] = OpExtInst %[[#]] %[[#]] FindUMsb [[O]]
-; CHECK: [[M:%.*]] = OpVectorShuffle %[[#]] [[N]] [[N]] 0
-; CHECK: [[L:%.*]] = OpVectorS
@@ -2717,82 +2717,82 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
Register FBHReg = MRI->createVirtualRegister(GR.getRegClass(postCastT));
Result &= selectFirstBitHigh32(FBHReg, postCastT, I, bitcastReg, IsSigned);
- // 3. check if result of e
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111047
>From 0797f19cad4ca9cf605725de1ac838cccacda1fc Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Tue, 17 Sep 2024 20:25:46 +
Subject: [PATCH 1/6] theoretically fix issue
---
clang/lib/Sema/SemaType.cpp | 4 ++
@@ -85,6 +85,8 @@ def int_dx_umad : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>, LLV
def int_dx_normalize : DefaultAttrsIntrinsic<[LLVMMatchType<0>],
[llvm_anyfloat_ty], [IntrNoMem]>;
def int_dx_rsqrt : DefaultAttrsIntrinsic<[llvm_anyfloat_ty],
[LLVMMatchType<0
https://github.com/spall deleted
https://github.com/llvm/llvm-project/pull/112400
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -85,6 +85,8 @@ def int_dx_umad : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>, LLV
def int_dx_normalize : DefaultAttrsIntrinsic<[LLVMMatchType<0>],
[llvm_anyfloat_ty], [IntrNoMem]>;
def int_dx_rsqrt : DefaultAttrsIntrinsic<[llvm_anyfloat_ty],
[LLVMMatchType<0
@@ -461,6 +461,67 @@ class OpLowerer {
});
}
+ [[nodiscard]] bool lowerCtpopToCBits(Function &F) {
+IRBuilder<> &IRB = OpBuilder.getIRB();
+Type *Int32Ty = IRB.getInt32Ty();
+
+return replaceFunction(F, [&](CallInst *CI) -> Error {
+ IRB.SetInsertPoint(
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111047
>From 119def060924f13bd1fe07f6d73ce27a1b52ea12 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Tue, 17 Sep 2024 20:25:46 +
Subject: [PATCH 1/7] theoretically fix issue
---
clang/lib/Sema/SemaType.cpp | 4 ++
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111082
>From 6239941c302f616f87ed652151e828a8eae1054c Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 23 Sep 2024 22:10:59 +
Subject: [PATCH 1/7] implement firstbithigh hlsl builtin
---
clang/include/clang/Ba
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111082
>From 6239941c302f616f87ed652151e828a8eae1054c Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 23 Sep 2024 22:10:59 +
Subject: [PATCH 1/8] implement firstbithigh hlsl builtin
---
clang/include/clang/Ba
@@ -424,7 +424,7 @@ Register SPIRVGlobalRegistry::getOrCreateCompositeOrNull(
LLT LLTy = LLT::scalar(64);
Register SpvVecConst =
CurMF->getRegInfo().createGenericVirtualRegister(LLTy);
-CurMF->getRegInfo().setRegClass(SpvVecConst, &SPIRV::iIDRegClass);
+
@@ -2626,6 +2671,148 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
MIRBuilder);
}
+bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
+const
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/111082
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/113189
>From 12cac48dcc10ef9c5fccba2c22911f420298b98b Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 16 Oct 2024 19:00:08 +
Subject: [PATCH 1/3] implement countbits correctly
---
clang/lib/Headers/hlsl/hlsl_
@@ -4690,8 +4690,9 @@ void CodeGenFunction::EmitCallArg(CallArgList &args,
const Expr *E,
return emitWritebackArg(*this, args, CRE);
}
- assert(type->isReferenceType() == E->isGLValue() &&
- "reference binding to unmaterialized r-value!");
+ assert(type->isArr
@@ -0,0 +1,50 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -emit-llvm
-disable-llvm-passes -o - %s | FileCheck %s --enable-var-scope
+
+// CHECK-LABEL: define void {{.*}}arr_assign1
+// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
+// CHECK: [[Arr2:%.*]] = allo
@@ -0,0 +1,50 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -emit-llvm
-disable-llvm-passes -o - %s | FileCheck %s --enable-var-scope
+
+// CHECK-LABEL: define void {{.*}}arr_assign1
+// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
+// CHECK: [[Arr2:%.*]] = allo
@@ -0,0 +1,50 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -emit-llvm
-disable-llvm-passes -o - %s | FileCheck %s --enable-var-scope
+
+// CHECK-LABEL: define void {{.*}}arr_assign1
+// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
+// CHECK: [[Arr2:%.*]] = allo
https://github.com/spall approved this pull request.
https://github.com/llvm/llvm-project/pull/108849
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall approved this pull request.
Code LGTM; didn't look at the tests too closely.
https://github.com/llvm/llvm-project/pull/110187
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listin
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/109323
>From f4d72ce6faca5498f184069b7c5d22841a449e74 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 18 Sep 2024 22:19:07 +
Subject: [PATCH 1/3] enable array by value assignment
---
clang/include/clang/AST/C
https://github.com/spall created
https://github.com/llvm/llvm-project/pull/109323
Make Constant Arrays in HLSL assignable.
Closes #109043
>From b24aed9771a415a4dc896c48cfc0481574a0773c Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 18 Sep 2024 22:19:07 +
Subject: [PATCH 1/2] enabl
@@ -18824,6 +18824,40 @@ case Builtin::BI__builtin_hlsl_elementwise_isinf: {
retType, CGM.getHLSLRuntime().getSignIntrinsic(),
ArrayRef{Op0}, nullptr, "hlsl.sign");
}
+ // This should only be called when targeting DXIL
+ case Builtin::BI__builtin_hlsl_asuint
https://github.com/spall closed https://github.com/llvm/llvm-project/pull/108121
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall closed https://github.com/llvm/llvm-project/pull/109323
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
spall wrote:
This code only runs if the language option is HLSL right?
https://github.com/llvm/llvm-project/pull/108849
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/li
spall wrote:
If this builtin is for clang and not just HLSL should the semantics checking be
in this file and not 'SemaChecking'?
https://github.com/llvm/llvm-project/pull/108849
___
cfe-commits mailing list
cfe-comm
spall wrote:
Glad to approve after this gets updated then!
https://github.com/llvm/llvm-project/pull/108849
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-c
https://github.com/spall approved this pull request.
https://github.com/llvm/llvm-project/pull/113382
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -1762,6 +1765,37 @@ bool SPIRVInstructionSelector::selectSign(Register
ResVReg,
return Result;
}
+bool SPIRVInstructionSelector::selectWaveActiveCountBits(
+Register ResVReg, const SPIRVType *ResType, MachineInstr &I) const {
+ assert(I.getNumOperands() == 3);
+ as
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/111082
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/113189
>From 12cac48dcc10ef9c5fccba2c22911f420298b98b Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 16 Oct 2024 19:00:08 +
Subject: [PATCH 1/4] implement countbits correctly
---
clang/lib/Headers/hlsl/hlsl_
https://github.com/spall closed https://github.com/llvm/llvm-project/pull/111082
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/114847
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/108121
>From ebb4078d485559f70d79d3b10dc9f4ce401a3261 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Fri, 6 Sep 2024 21:03:05 +
Subject: [PATCH 1/3] implement elementwise popcount to implement countbits
---
clang
spall wrote:
I'm going to change the name of the Cast to HLSLFlatCast.
https://github.com/llvm/llvm-project/pull/118842
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall created
https://github.com/llvm/llvm-project/pull/118842
Implement HLSL Flat casting excluding splat cases
Partly closes #100609 and #100619
>From 2e932a57ccb992b856b58bec4c30c6b64f24f711 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Thu, 28 Nov 2024 16:23:57 +
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/118842
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/118842
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111047
>From 119def060924f13bd1fe07f6d73ce27a1b52ea12 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Tue, 17 Sep 2024 20:25:46 +
Subject: [PATCH 1/8] theoretically fix issue
---
clang/lib/Sema/SemaType.cpp | 4 ++
https://github.com/spall closed https://github.com/llvm/llvm-project/pull/111047
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
1 - 100 of 347 matches
Mail list logo
