================
@@ -808,6 +835,20 @@ bool SPIRVInstructionSelector::selectExtInst(Register
ResVReg,
return false;
}
+bool SPIRVInstructionSelector::selectNAryOpWithSrcs(Register ResVReg,
+ const SPIRVType *ResType,
+ MachineInstr &I,
+ std::vector<Register> Srcs,
+ unsigned Opcode) const {
+ auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opcode))
+ .addDef(ResVReg)
+ .addUse(GR.getSPIRVTypeID(ResType));
+ for (Register SReg : Srcs) {
+ MIB.addUse(SReg);
----------------
spall wrote:
Should I do that as part of this PR?
https://github.com/llvm/llvm-project/pull/111082
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