https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111082
>From e9ed9f9a0415544781f8334b305eb3916fc0862c Mon Sep 17 00:00:00 2001
From: Sarah Spall <sp...@planetbauer.com>
Date: Mon, 23 Sep 2024 22:10:59 +0000
Subject: [PATCH 1/4] implement firstbithigh hlsl builtin
---
clang/include/clang/Basic/Builtins.td | 6 +
clang/lib/CodeGen/CGBuiltin.cpp | 17 ++
clang/lib/CodeGen/CGHLSLRuntime.h | 2 +
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 72 +++++++++
clang/lib/Sema/SemaHLSL.cpp | 18 +++
.../CodeGenHLSL/builtins/firstbithigh.hlsl | 153 ++++++++++++++++++
.../BuiltIns/firstbithigh-errors.hlsl | 28 ++++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 2 +
llvm/include/llvm/IR/IntrinsicsSPIRV.td | 2 +
llvm/lib/Target/DirectX/DXIL.td | 24 +++
.../DirectX/DirectXTargetTransformInfo.cpp | 2 +
.../Target/SPIRV/SPIRVInstructionSelector.cpp | 14 ++
llvm/test/CodeGen/DirectX/firstbithigh.ll | 91 +++++++++++
.../CodeGen/DirectX/firstbitshigh_error.ll | 10 ++
.../CodeGen/DirectX/firstbituhigh_error.ll | 10 ++
.../SPIRV/hlsl-intrinsics/firstbithigh.ll | 37 +++++
16 files changed, 488 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/firstbithigh.ll
create mode 100644 llvm/test/CodeGen/DirectX/firstbitshigh_error.ll
create mode 100644 llvm/test/CodeGen/DirectX/firstbituhigh_error.ll
create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index a726a0ef4b4bd2..cc4630c281052d 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4751,6 +4751,12 @@ def HLSLDotProduct : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLFirstBitHigh : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_firstbithigh"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "void(...)";
+}
+
def HLSLFrac : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_elementwise_frac"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 43700ea9dd3cfd..6033dcffb3a6da 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18631,6 +18631,14 @@ static Intrinsic::ID
getDotProductIntrinsic(CGHLSLRuntime &RT, QualType QT) {
return RT.getUDotIntrinsic();
}
+Intrinsic::ID getFirstBitHighIntrinsic(CGHLSLRuntime &RT, QualType QT) {
+ if (QT->hasSignedIntegerRepresentation()) {
+ return RT.getFirstBitSHighIntrinsic();
+ }
+
+ return RT.getFirstBitUHighIntrinsic();
+}
+
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
const CallExpr *E,
ReturnValueSlot ReturnValue) {
@@ -18720,6 +18728,15 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
getDotProductIntrinsic(CGM.getHLSLRuntime(), VecTy0->getElementType()),
ArrayRef<Value *>{Op0, Op1}, nullptr, "hlsl.dot");
} break;
+ case Builtin::BI__builtin_hlsl_elementwise_firstbithigh: {
+
+ Value *X = EmitScalarExpr(E->getArg(0));
+
+ return Builder.CreateIntrinsic(
+ /*ReturnType=*/X->getType(),
+ getFirstBitHighIntrinsic(CGM.getHLSLRuntime(), E->getArg(0)->getType()),
+ ArrayRef<Value *>{X}, nullptr, "hlsl.firstbithigh");
+ }
case Builtin::BI__builtin_hlsl_lerp: {
Value *X = EmitScalarExpr(E->getArg(0));
Value *Y = EmitScalarExpr(E->getArg(1));
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.h
b/clang/lib/CodeGen/CGHLSLRuntime.h
index 6722d2c7c50a2b..03ddef95800e1a 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.h
+++ b/clang/lib/CodeGen/CGHLSLRuntime.h
@@ -88,6 +88,8 @@ class CGHLSLRuntime {
GENERATE_HLSL_INTRINSIC_FUNCTION(SDot, sdot)
GENERATE_HLSL_INTRINSIC_FUNCTION(UDot, udot)
GENERATE_HLSL_INTRINSIC_FUNCTION(WaveIsFirstLane, wave_is_first_lane)
+ GENERATE_HLSL_INTRINSIC_FUNCTION(FirstBitUHigh, firstbituhigh)
+ GENERATE_HLSL_INTRINSIC_FUNCTION(FirstBitSHigh, firstbitshigh)
//===----------------------------------------------------------------------===//
// End of reserved area for HLSL intrinsic getters.
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index c3ecfc7c90d433..afb7bd33374111 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -928,6 +928,78 @@ float3 exp2(float3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_exp2)
float4 exp2(float4);
+//===----------------------------------------------------------------------===//
+// firstbithigh builtins
+//===----------------------------------------------------------------------===//
+
+/// \fn T firstbithigh(T Val)
+/// \brief Returns the location of the first set bit starting from the highest
+/// order bit and working downward, per component.
+/// \param Val the input value.
+
+#ifdef __HLSL_ENABLE_16_BIT
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int16_t firstbithigh(int16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int16_t2 firstbithigh(int16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int16_t3 firstbithigh(int16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int16_t4 firstbithigh(int16_t4);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint16_t firstbithigh(uint16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint16_t2 firstbithigh(uint16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint16_t3 firstbithigh(uint16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint16_t4 firstbithigh(uint16_t4);
+#endif
+
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int firstbithigh(int);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int2 firstbithigh(int2);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int3 firstbithigh(int3);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int4 firstbithigh(int4);
+
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint firstbithigh(uint);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint2 firstbithigh(uint2);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint3 firstbithigh(uint3);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint4 firstbithigh(uint4);
+
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int64_t firstbithigh(int64_t);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int64_t2 firstbithigh(int64_t2);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int64_t3 firstbithigh(int64_t3);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+int64_t4 firstbithigh(int64_t4);
+
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint64_t firstbithigh(uint64_t);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint64_t2 firstbithigh(uint64_t2);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint64_t3 firstbithigh(uint64_t3);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
+uint64_t4 firstbithigh(uint64_t4);
+
//===----------------------------------------------------------------------===//
// floor builtins
//===----------------------------------------------------------------------===//
diff --git a/clang/lib/Sema/SemaHLSL.cpp b/clang/lib/Sema/SemaHLSL.cpp
index fbcba201a351a6..48ea1d4aab7a18 100644
--- a/clang/lib/Sema/SemaHLSL.cpp
+++ b/clang/lib/Sema/SemaHLSL.cpp
@@ -1874,6 +1874,24 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
break;
}
+ case Builtin::BI__builtin_hlsl_elementwise_firstbithigh: {
+ if (SemaRef.PrepareBuiltinElementwiseMathOneArgCall(TheCall))
+ return true;
+
+ const Expr *Arg = TheCall->getArg(0);
+ QualType ArgTy = Arg->getType();
+ QualType EltTy = ArgTy;
+
+ if (auto *VecTy = EltTy->getAs<VectorType>())
+ EltTy = VecTy->getElementType();
+
+ if (!EltTy->isIntegerType()) {
+ Diag(Arg->getBeginLoc(), diag::err_builtin_invalid_arg_type)
+ << 1 << /* integer ty */ 6 << ArgTy;
+ return true;
+ }
+ break;
+ }
case Builtin::BI__builtin_hlsl_select: {
if (SemaRef.checkArgCount(TheCall, 3))
return true;
diff --git a/clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
b/clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
new file mode 100644
index 00000000000000..9821b308e63521
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
@@ -0,0 +1,153 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s -DTARGET=dx
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
+// RUN: -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s -DTARGET=spv
+
+#ifdef __HLSL_ENABLE_16_BIT
+// CHECK-LABEL: test_firstbithigh_ushort
+// CHECK: call i16 @llvm.[[TARGET]].firstbituhigh.i16
+int test_firstbithigh_ushort(uint16_t p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_ushort2
+// CHECK: call <2 x i16> @llvm.[[TARGET]].firstbituhigh.v2i16
+uint16_t2 test_firstbithigh_ushort2(uint16_t2 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_ushort3
+// CHECK: call <3 x i16> @llvm.[[TARGET]].firstbituhigh.v3i16
+uint16_t3 test_firstbithigh_ushort3(uint16_t3 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_ushort4
+// CHECK: call <4 x i16> @llvm.[[TARGET]].firstbituhigh.v4i16
+uint16_t4 test_firstbithigh_ushort4(uint16_t4 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_short
+// CHECK: call i16 @llvm.[[TARGET]].firstbitshigh.i16
+int16_t test_firstbithigh_short(int16_t p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_short2
+// CHECK: call <2 x i16> @llvm.[[TARGET]].firstbitshigh.v2i16
+int16_t2 test_firstbithigh_short2(int16_t2 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_short3
+// CHECK: call <3 x i16> @llvm.[[TARGET]].firstbitshigh.v3i16
+int16_t3 test_firstbithigh_short3(int16_t3 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_short4
+// CHECK: call <4 x i16> @llvm.[[TARGET]].firstbitshigh.v4i16
+int16_t4 test_firstbithigh_short4(int16_t4 p0) {
+ return firstbithigh(p0);
+}
+#endif // __HLSL_ENABLE_16_BIT
+
+// CHECK-LABEL: test_firstbithigh_uint
+// CHECK: call i32 @llvm.[[TARGET]].firstbituhigh.i32
+uint test_firstbithigh_uint(uint p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_uint2
+// CHECK: call <2 x i32> @llvm.[[TARGET]].firstbituhigh.v2i32
+uint2 test_firstbithigh_uint2(uint2 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_uint3
+// CHECK: call <3 x i32> @llvm.[[TARGET]].firstbituhigh.v3i32
+uint3 test_firstbithigh_uint3(uint3 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_uint4
+// CHECK: call <4 x i32> @llvm.[[TARGET]].firstbituhigh.v4i32
+uint4 test_firstbithigh_uint4(uint4 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_ulong
+// CHECK: call i64 @llvm.[[TARGET]].firstbituhigh.i64
+uint64_t test_firstbithigh_ulong(uint64_t p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_ulong2
+// CHECK: call <2 x i64> @llvm.[[TARGET]].firstbituhigh.v2i64
+uint64_t2 test_firstbithigh_ulong2(uint64_t2 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_ulong3
+// CHECK: call <3 x i64> @llvm.[[TARGET]].firstbituhigh.v3i64
+uint64_t3 test_firstbithigh_ulong3(uint64_t3 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_ulong4
+// CHECK: call <4 x i64> @llvm.[[TARGET]].firstbituhigh.v4i64
+uint64_t4 test_firstbithigh_ulong4(uint64_t4 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_int
+// CHECK: call i32 @llvm.[[TARGET]].firstbitshigh.i32
+int test_firstbithigh_int(int p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_int2
+// CHECK: call <2 x i32> @llvm.[[TARGET]].firstbitshigh.v2i32
+int2 test_firstbithigh_int2(int2 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_int3
+// CHECK: call <3 x i32> @llvm.[[TARGET]].firstbitshigh.v3i32
+int3 test_firstbithigh_int3(int3 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_int4
+// CHECK: call <4 x i32> @llvm.[[TARGET]].firstbitshigh.v4i32
+int4 test_firstbithigh_int4(int4 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_long
+// CHECK: call i64 @llvm.[[TARGET]].firstbitshigh.i64
+int64_t test_firstbithigh_long(int64_t p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_long2
+// CHECK: call <2 x i64> @llvm.[[TARGET]].firstbitshigh.v2i64
+int64_t2 test_firstbithigh_long2(int64_t2 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_long3
+// CHECK: call <3 x i64> @llvm.[[TARGET]].firstbitshigh.v3i64
+int64_t3 test_firstbithigh_long3(int64_t3 p0) {
+ return firstbithigh(p0);
+}
+
+// CHECK-LABEL: test_firstbithigh_long4
+// CHECK: call <4 x i64> @llvm.[[TARGET]].firstbitshigh.v4i64
+int64_t4 test_firstbithigh_long4(int64_t4 p0) {
+ return firstbithigh(p0);
+}
\ No newline at end of file
diff --git a/clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
new file mode 100644
index 00000000000000..1912ab3ae806b3
--- /dev/null
+++ b/clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
@@ -0,0 +1,28 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm-only
-disable-llvm-passes -verify -verify-ignore-unexpected
+
+int test_too_few_arg() {
+ return firstbithigh();
+ // expected-error@-1 {{no matching function for call to 'firstbithigh'}}
+}
+
+int test_too_many_arg(int p0) {
+ return firstbithigh(p0, p0);
+ // expected-error@-1 {{no matching function for call to 'firstbithigh'}}
+}
+
+double test_int_builtin(double p0) {
+ return firstbithigh(p0);
+ // expected-error@-1 {{call to 'firstbithigh' is ambiguous}}
+}
+
+double2 test_int_builtin_2(double2 p0) {
+ return __builtin_hlsl_elementwise_firstbithigh(p0);
+ // expected-error@-1 {{1st argument must be a vector of integers
+ // (was 'double2' (aka 'vector<double, 2>'))}}
+}
+
+float test_int_builtin_3(float p0) {
+ return __builtin_hlsl_elementwise_firstbithigh(p0);
+ // expected-error@-1 {{1st argument must be a vector of integers
+ // (was 'float')}}
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsDirectX.td
b/llvm/include/llvm/IR/IntrinsicsDirectX.td
index 1adfcdc9a1ed2f..ed46d88645f043 100644
--- a/llvm/include/llvm/IR/IntrinsicsDirectX.td
+++ b/llvm/include/llvm/IR/IntrinsicsDirectX.td
@@ -86,4 +86,6 @@ def int_dx_rsqrt : DefaultAttrsIntrinsic<[llvm_anyfloat_ty],
[LLVMMatchType<0>]
def int_dx_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [],
[IntrConvergent]>;
def int_dx_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0,
llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;
def int_dx_step : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty,
LLVMMatchType<0>], [IntrNoMem]>;
+def int_dx_firstbituhigh : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>], [IntrNoMem]>;
+def int_dx_firstbitshigh : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>], [IntrNoMem]>;
}
diff --git a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
index 0567efd8a5d7af..3ca5e0e2046289 100644
--- a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
+++ b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
@@ -84,4 +84,6 @@ let TargetPrefix = "spv" in {
[IntrNoMem, Commutative] >;
def int_spv_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [],
[IntrConvergent]>;
def int_spv_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0,
llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;
+ def int_spv_firstbituhigh : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>], [IntrNoMem]>;
+ def int_spv_firstbitshigh : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>], [IntrNoMem]>;
}
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index 9aa0af3e3a6b17..4b315d53894174 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -564,6 +564,30 @@ def CBits : DXILOp<31, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
+def FBH : DXILOp<33, unary> {
+ let Doc = "Returns the location of the first set bit starting from "
+ "the highest order bit and working downward.";
+ let LLVMIntrinsic = int_dx_firstbituhigh;
+ let arguments = [OverloadTy];
+ let result = OverloadTy;
+ let overloads =
+ [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let stages = [Stages<DXIL1_0, [all_stages]>];
+ let attributes = [Attributes<DXIL1_0, [ReadNone]>];
+}
+
+def FBSH : DXILOp<34, unary> {
+ let Doc = "Returns the location of the first set bit from "
+ "the highest order bit based on the sign.";
+ let LLVMIntrinsic = int_dx_firstbitshigh;
+ let arguments = [OverloadTy];
+ let result = OverloadTy;
+ let overloads =
+ [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let stages = [Stages<DXIL1_0, [all_stages]>];
+ let attributes = [Attributes<DXIL1_0, [ReadNone]>];
+}
+
def FMax : DXILOp<35, binary> {
let Doc = "Float maximum. FMax(a,b) = a > b ? a : b";
let LLVMIntrinsic = int_maxnum;
diff --git a/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
b/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
index 1a59f04b214042..21a4daf2cde6d8 100644
--- a/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
+++ b/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
@@ -18,6 +18,8 @@ bool
llvm::DirectXTTIImpl::isTargetIntrinsicTriviallyScalarizable(
switch (ID) {
case Intrinsic::dx_frac:
case Intrinsic::dx_rsqrt:
+ case Intrinsic::dx_firstbituhigh:
+ case Intrinsic::dx_firstbitshigh:
return true;
default:
return false;
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 3917ad180b87fc..85602a8b4f6f7a 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -213,6 +213,8 @@ class SPIRVInstructionSelector : public InstructionSelector
{
bool selectPhi(Register ResVReg, const SPIRVType *ResType,
MachineInstr &I) const;
+ bool selectExtInst(Register ResVReg, const SPIRVType *RestType,
+ MachineInstr &I, GL::GLSLExtInst GLInst) const;
bool selectExtInst(Register ResVReg, const SPIRVType *ResType,
MachineInstr &I, CL::OpenCLExtInst CLInst) const;
bool selectExtInst(Register ResVReg, const SPIRVType *ResType,
@@ -751,6 +753,14 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectExtInst(Register ResVReg,
+ const SPIRVType *ResType,
+ MachineInstr &I,
+ GL::GLSLExtInst GLInst) const {
+ return selectExtInst(ResVReg, ResType, I,
+ {{SPIRV::InstructionSet::GLSL_std_450, GLInst}});
+}
+
bool SPIRVInstructionSelector::selectExtInst(Register ResVReg,
const SPIRVType *ResType,
MachineInstr &I,
@@ -2515,6 +2525,10 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register
ResVReg,
return selectExtInst(ResVReg, ResType, I, CL::rsqrt, GL::InverseSqrt);
case Intrinsic::spv_sign:
return selectSign(ResVReg, ResType, I);
+ case Intrinsic::spv_firstbituhigh:
+ return selectExtInst(ResVReg, ResType, I, GL::FindUMsb);
+ case Intrinsic::spv_firstbitshigh:
+ return selectExtInst(ResVReg, ResType, I, GL::FindSMsb);
case Intrinsic::spv_lifetime_start:
case Intrinsic::spv_lifetime_end: {
unsigned Op = IID == Intrinsic::spv_lifetime_start ? SPIRV::OpLifetimeStart
diff --git a/llvm/test/CodeGen/DirectX/firstbithigh.ll
b/llvm/test/CodeGen/DirectX/firstbithigh.ll
new file mode 100644
index 00000000000000..4a97ad6226149f
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/firstbithigh.ll
@@ -0,0 +1,91 @@
+; RUN: opt -S -scalarizer -dxil-op-lower
-mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
+
+; Make sure dxil operation function calls for firstbithigh are generated for
all integer types.
+
+define noundef i16 @test_firstbithigh_ushort(i16 noundef %a) {
+entry:
+; CHECK: call i16 @dx.op.unary.i16(i32 33, i16 %{{.*}})
+ %elt.firstbithigh = call i16 @llvm.dx.firstbituhigh.i16(i16 %a)
+ ret i16 %elt.firstbithigh
+}
+
+define noundef i16 @test_firstbithigh_short(i16 noundef %a) {
+entry:
+; CHECK: call i16 @dx.op.unary.i16(i32 34, i16 %{{.*}})
+ %elt.firstbithigh = call i16 @llvm.dx.firstbitshigh.i16(i16 %a)
+ ret i16 %elt.firstbithigh
+}
+
+define noundef i32 @test_firstbithigh_uint(i32 noundef %a) {
+entry:
+; CHECK: call i32 @dx.op.unary.i32(i32 33, i32 %{{.*}})
+ %elt.firstbithigh = call i32 @llvm.dx.firstbituhigh.i32(i32 %a)
+ ret i32 %elt.firstbithigh
+}
+
+define noundef i32 @test_firstbithigh_int(i32 noundef %a) {
+entry:
+; CHECK: call i32 @dx.op.unary.i32(i32 34, i32 %{{.*}})
+ %elt.firstbithigh = call i32 @llvm.dx.firstbitshigh.i32(i32 %a)
+ ret i32 %elt.firstbithigh
+}
+
+define noundef i64 @test_firstbithigh_ulong(i64 noundef %a) {
+entry:
+; CHECK: call i64 @dx.op.unary.i64(i32 33, i64 %{{.*}})
+ %elt.firstbithigh = call i64 @llvm.dx.firstbituhigh.i64(i64 %a)
+ ret i64 %elt.firstbithigh
+}
+
+define noundef i64 @test_firstbithigh_long(i64 noundef %a) {
+entry:
+; CHECK: call i64 @dx.op.unary.i64(i32 34, i64 %{{.*}})
+ %elt.firstbithigh = call i64 @llvm.dx.firstbitshigh.i64(i64 %a)
+ ret i64 %elt.firstbithigh
+}
+
+define noundef <4 x i32> @test_firstbituhigh_vec4_i32(<4 x i32> noundef %a) {
+entry:
+ ; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
+ ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unary.i32(i32 33, i32 [[ee0]])
+ ; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
+ ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unary.i32(i32 33, i32 [[ee1]])
+ ; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
+ ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unary.i32(i32 33, i32 [[ee2]])
+ ; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
+ ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unary.i32(i32 33, i32 [[ee3]])
+ ; CHECK: insertelement <4 x i32> poison, i32 [[ie0]], i64 0
+ ; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie1]], i64 1
+ ; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie2]], i64 2
+ ; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie3]], i64 3
+ %2 = call <4 x i32> @llvm.dx.firstbituhigh.v4i32(<4 x i32> %a)
+ ret <4 x i32> %2
+}
+
+define noundef <4 x i32> @test_firstbitshigh_vec4_i32(<4 x i32> noundef %a) {
+entry:
+ ; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
+ ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unary.i32(i32 34, i32 [[ee0]])
+ ; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
+ ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unary.i32(i32 34, i32 [[ee1]])
+ ; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
+ ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unary.i32(i32 34, i32 [[ee2]])
+ ; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
+ ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unary.i32(i32 34, i32 [[ee3]])
+ ; CHECK: insertelement <4 x i32> poison, i32 [[ie0]], i64 0
+ ; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie1]], i64 1
+ ; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie2]], i64 2
+ ; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie3]], i64 3
+ %2 = call <4 x i32> @llvm.dx.firstbitshigh.v4i32(<4 x i32> %a)
+ ret <4 x i32> %2
+}
+
+declare i16 @llvm.dx.firstbituhigh.i16(i16)
+declare i32 @llvm.dx.firstbituhigh.i32(i32)
+declare i64 @llvm.dx.firstbituhigh.i64(i64)
+declare <4 x i32> @llvm.dx.firstbituhigh.v4i32(<4 x i32>)
+
+declare i16 @llvm.dx.firstbitshigh.i16(i16)
+declare i32 @llvm.dx.firstbitshigh.i32(i32)
+declare i64 @llvm.dx.firstbitshigh.i64(i64)
+declare <4 x i32> @llvm.dx.firstbitshigh.v4i32(<4 x i32>)
diff --git a/llvm/test/CodeGen/DirectX/firstbitshigh_error.ll
b/llvm/test/CodeGen/DirectX/firstbitshigh_error.ll
new file mode 100644
index 00000000000000..22982a03e47921
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/firstbitshigh_error.ll
@@ -0,0 +1,10 @@
+; RUN: not opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s
2>&1 | FileCheck %s
+
+; DXIL operation firstbitshigh does not support double overload type
+; CHECK: invalid intrinsic signature
+
+define noundef double @firstbitshigh_double(double noundef %a) {
+entry:
+ %1 = call double @llvm.dx.firstbitshigh.f64(double %a)
+ ret double %1
+}
diff --git a/llvm/test/CodeGen/DirectX/firstbituhigh_error.ll
b/llvm/test/CodeGen/DirectX/firstbituhigh_error.ll
new file mode 100644
index 00000000000000..b611a96ffc2f9c
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/firstbituhigh_error.ll
@@ -0,0 +1,10 @@
+; RUN: not opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s
2>&1 | FileCheck %s
+
+; DXIL operation firstbituhigh does not support double overload type
+; CHECK: invalid intrinsic signature
+
+define noundef double @firstbituhigh_double(double noundef %a) {
+entry:
+ %1 = call double @llvm.dx.firstbituhigh.f64(double %a)
+ ret double %1
+}
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
new file mode 100644
index 00000000000000..e20a7a4cefe8ee
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
@@ -0,0 +1,37 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK: OpMemoryModel Logical GLSL450
+
+define noundef i32 @firstbituhigh_i32(i32 noundef %a) {
+entry:
+; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] FindUMsb %[[#]]
+ %elt.firstbituhigh = call i32 @llvm.spv.firstbituhigh.i32(i32 %a)
+ ret i32 %elt.firstbituhigh
+}
+
+define noundef i16 @firstbituhigh_i16(i16 noundef %a) {
+entry:
+; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] FindUMsb %[[#]]
+ %elt.firstbituhigh = call i16 @llvm.spv.firstbituhigh.i16(i16 %a)
+ ret i16 %elt.firstbituhigh
+}
+
+define noundef i32 @firstbitshigh_i32(i32 noundef %a) {
+entry:
+; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] FindSMsb %[[#]]
+ %elt.firstbitshigh = call i32 @llvm.spv.firstbitshigh.i32(i32 %a)
+ ret i32 %elt.firstbitshigh
+}
+
+define noundef i16 @firstbitshigh_i16(i16 noundef %a) {
+entry:
+; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] FindSMsb %[[#]]
+ %elt.firstbitshigh = call i16 @llvm.spv.firstbitshigh.i16(i16 %a)
+ ret i16 %elt.firstbitshigh
+}
+
+declare i16 @llvm.spv.firstbituhigh.i16(i16)
+declare i32 @llvm.spv.firstbituhigh.i32(i32)
+declare i16 @llvm.spv.firstbitshigh.i16(i16)
+declare i32 @llvm.spv.firstbitshigh.i32(i32)
>From 122a18a81d74413173af4f47b1fd1c419d01d12b Mon Sep 17 00:00:00 2001
From: Sarah Spall <sp...@planetbauer.com>
Date: Fri, 4 Oct 2024 01:22:58 +0000
Subject: [PATCH 2/4] make clang format happy
---
clang/lib/CodeGen/CGBuiltin.cpp | 10 +++++-----
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 2 +-
llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp | 10 +++++-----
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 6033dcffb3a6da..c1d17774551d1c 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18729,13 +18729,13 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
ArrayRef<Value *>{Op0, Op1}, nullptr, "hlsl.dot");
} break;
case Builtin::BI__builtin_hlsl_elementwise_firstbithigh: {
-
+
Value *X = EmitScalarExpr(E->getArg(0));
-
+
return Builder.CreateIntrinsic(
- /*ReturnType=*/X->getType(),
- getFirstBitHighIntrinsic(CGM.getHLSLRuntime(), E->getArg(0)->getType()),
- ArrayRef<Value *>{X}, nullptr, "hlsl.firstbithigh");
+ /*ReturnType=*/X->getType(),
+ getFirstBitHighIntrinsic(CGM.getHLSLRuntime(),
E->getArg(0)->getType()),
+ ArrayRef<Value *>{X}, nullptr, "hlsl.firstbithigh");
}
case Builtin::BI__builtin_hlsl_lerp: {
Value *X = EmitScalarExpr(E->getArg(0));
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index afb7bd33374111..58aee43f7e4c96 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -999,7 +999,7 @@ _HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
uint64_t3 firstbithigh(uint64_t3);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
uint64_t4 firstbithigh(uint64_t4);
-
+
//===----------------------------------------------------------------------===//
// floor builtins
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 85602a8b4f6f7a..b8229a7a72eeac 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -214,7 +214,7 @@ class SPIRVInstructionSelector : public InstructionSelector
{
MachineInstr &I) const;
bool selectExtInst(Register ResVReg, const SPIRVType *RestType,
- MachineInstr &I, GL::GLSLExtInst GLInst) const;
+ MachineInstr &I, GL::GLSLExtInst GLInst) const;
bool selectExtInst(Register ResVReg, const SPIRVType *ResType,
MachineInstr &I, CL::OpenCLExtInst CLInst) const;
bool selectExtInst(Register ResVReg, const SPIRVType *ResType,
@@ -754,11 +754,11 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg,
}
bool SPIRVInstructionSelector::selectExtInst(Register ResVReg,
- const SPIRVType *ResType,
- MachineInstr &I,
- GL::GLSLExtInst GLInst) const {
+ const SPIRVType *ResType,
+ MachineInstr &I,
+ GL::GLSLExtInst GLInst) const {
return selectExtInst(ResVReg, ResType, I,
- {{SPIRV::InstructionSet::GLSL_std_450, GLInst}});
+ {{SPIRV::InstructionSet::GLSL_std_450, GLInst}});
}
bool SPIRVInstructionSelector::selectExtInst(Register ResVReg,
>From ff4093af55df1abff89f652957a0cdda543ff2ed Mon Sep 17 00:00:00 2001
From: Sarah Spall <sp...@planetbauer.com>
Date: Fri, 4 Oct 2024 18:38:07 +0000
Subject: [PATCH 3/4] firstbithigh only supports 32 bit integers
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 45 --------
clang/lib/Sema/SemaHLSL.cpp | 2 +-
.../CodeGenHLSL/builtins/firstbithigh.hlsl | 102 +-----------------
.../BuiltIns/firstbithigh-errors.hlsl | 16 ++-
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 +-
llvm/include/llvm/IR/IntrinsicsSPIRV.td | 4 +-
llvm/lib/Target/DirectX/DXIL.td | 14 ++-
llvm/test/CodeGen/DirectX/firstbithigh.ll | 54 ++--------
.../SPIRV/hlsl-intrinsics/firstbithigh.ll | 16 ---
9 files changed, 36 insertions(+), 221 deletions(-)
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 58aee43f7e4c96..a037ffb0cd92a2 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -937,33 +937,6 @@ float4 exp2(float4);
/// order bit and working downward, per component.
/// \param Val the input value.
-#ifdef __HLSL_ENABLE_16_BIT
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-int16_t firstbithigh(int16_t);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-int16_t2 firstbithigh(int16_t2);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-int16_t3 firstbithigh(int16_t3);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-int16_t4 firstbithigh(int16_t4);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-uint16_t firstbithigh(uint16_t);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-uint16_t2 firstbithigh(uint16_t2);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-uint16_t3 firstbithigh(uint16_t3);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-uint16_t4 firstbithigh(uint16_t4);
-#endif
-
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
int firstbithigh(int);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
@@ -982,24 +955,6 @@ uint3 firstbithigh(uint3);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
uint4 firstbithigh(uint4);
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-int64_t firstbithigh(int64_t);
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-int64_t2 firstbithigh(int64_t2);
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-int64_t3 firstbithigh(int64_t3);
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-int64_t4 firstbithigh(int64_t4);
-
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-uint64_t firstbithigh(uint64_t);
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-uint64_t2 firstbithigh(uint64_t2);
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-uint64_t3 firstbithigh(uint64_t3);
-_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_firstbithigh)
-uint64_t4 firstbithigh(uint64_t4);
-
//===----------------------------------------------------------------------===//
// floor builtins
//===----------------------------------------------------------------------===//
diff --git a/clang/lib/Sema/SemaHLSL.cpp b/clang/lib/Sema/SemaHLSL.cpp
index 48ea1d4aab7a18..57ba09e770eda8 100644
--- a/clang/lib/Sema/SemaHLSL.cpp
+++ b/clang/lib/Sema/SemaHLSL.cpp
@@ -1885,7 +1885,7 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
if (auto *VecTy = EltTy->getAs<VectorType>())
EltTy = VecTy->getElementType();
- if (!EltTy->isIntegerType()) {
+ if (!EltTy->isIntegerType() || getASTContext().getTypeSize(EltTy) != 32) {
Diag(Arg->getBeginLoc(), diag::err_builtin_invalid_arg_type)
<< 1 << /* integer ty */ 6 << ArgTy;
return true;
diff --git a/clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
b/clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
index 9821b308e63521..534f1a78e2fae9 100644
--- a/clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
@@ -1,61 +1,11 @@
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN: dxil-pc-shadermodel6.3-library %s \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s -DTARGET=dx
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
+// RUN: spirv-unknown-vulkan-compute %s \
// RUN: -emit-llvm -disable-llvm-passes \
// RUN: -o - | FileCheck %s -DTARGET=spv
-#ifdef __HLSL_ENABLE_16_BIT
-// CHECK-LABEL: test_firstbithigh_ushort
-// CHECK: call i16 @llvm.[[TARGET]].firstbituhigh.i16
-int test_firstbithigh_ushort(uint16_t p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_ushort2
-// CHECK: call <2 x i16> @llvm.[[TARGET]].firstbituhigh.v2i16
-uint16_t2 test_firstbithigh_ushort2(uint16_t2 p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_ushort3
-// CHECK: call <3 x i16> @llvm.[[TARGET]].firstbituhigh.v3i16
-uint16_t3 test_firstbithigh_ushort3(uint16_t3 p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_ushort4
-// CHECK: call <4 x i16> @llvm.[[TARGET]].firstbituhigh.v4i16
-uint16_t4 test_firstbithigh_ushort4(uint16_t4 p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_short
-// CHECK: call i16 @llvm.[[TARGET]].firstbitshigh.i16
-int16_t test_firstbithigh_short(int16_t p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_short2
-// CHECK: call <2 x i16> @llvm.[[TARGET]].firstbitshigh.v2i16
-int16_t2 test_firstbithigh_short2(int16_t2 p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_short3
-// CHECK: call <3 x i16> @llvm.[[TARGET]].firstbitshigh.v3i16
-int16_t3 test_firstbithigh_short3(int16_t3 p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_short4
-// CHECK: call <4 x i16> @llvm.[[TARGET]].firstbitshigh.v4i16
-int16_t4 test_firstbithigh_short4(int16_t4 p0) {
- return firstbithigh(p0);
-}
-#endif // __HLSL_ENABLE_16_BIT
-
// CHECK-LABEL: test_firstbithigh_uint
// CHECK: call i32 @llvm.[[TARGET]].firstbituhigh.i32
uint test_firstbithigh_uint(uint p0) {
@@ -80,30 +30,6 @@ uint4 test_firstbithigh_uint4(uint4 p0) {
return firstbithigh(p0);
}
-// CHECK-LABEL: test_firstbithigh_ulong
-// CHECK: call i64 @llvm.[[TARGET]].firstbituhigh.i64
-uint64_t test_firstbithigh_ulong(uint64_t p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_ulong2
-// CHECK: call <2 x i64> @llvm.[[TARGET]].firstbituhigh.v2i64
-uint64_t2 test_firstbithigh_ulong2(uint64_t2 p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_ulong3
-// CHECK: call <3 x i64> @llvm.[[TARGET]].firstbituhigh.v3i64
-uint64_t3 test_firstbithigh_ulong3(uint64_t3 p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_ulong4
-// CHECK: call <4 x i64> @llvm.[[TARGET]].firstbituhigh.v4i64
-uint64_t4 test_firstbithigh_ulong4(uint64_t4 p0) {
- return firstbithigh(p0);
-}
-
// CHECK-LABEL: test_firstbithigh_int
// CHECK: call i32 @llvm.[[TARGET]].firstbitshigh.i32
int test_firstbithigh_int(int p0) {
@@ -127,27 +53,3 @@ int3 test_firstbithigh_int3(int3 p0) {
int4 test_firstbithigh_int4(int4 p0) {
return firstbithigh(p0);
}
-
-// CHECK-LABEL: test_firstbithigh_long
-// CHECK: call i64 @llvm.[[TARGET]].firstbitshigh.i64
-int64_t test_firstbithigh_long(int64_t p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_long2
-// CHECK: call <2 x i64> @llvm.[[TARGET]].firstbitshigh.v2i64
-int64_t2 test_firstbithigh_long2(int64_t2 p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_long3
-// CHECK: call <3 x i64> @llvm.[[TARGET]].firstbitshigh.v3i64
-int64_t3 test_firstbithigh_long3(int64_t3 p0) {
- return firstbithigh(p0);
-}
-
-// CHECK-LABEL: test_firstbithigh_long4
-// CHECK: call <4 x i64> @llvm.[[TARGET]].firstbitshigh.v4i64
-int64_t4 test_firstbithigh_long4(int64_t4 p0) {
- return firstbithigh(p0);
-}
\ No newline at end of file
diff --git a/clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
index 1912ab3ae806b3..b3ebcee05884ee 100644
--- a/clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
+++ b/clang/test/SemaHLSL/BuiltIns/firstbithigh-errors.hlsl
@@ -17,12 +17,20 @@ double test_int_builtin(double p0) {
double2 test_int_builtin_2(double2 p0) {
return __builtin_hlsl_elementwise_firstbithigh(p0);
- // expected-error@-1 {{1st argument must be a vector of integers
- // (was 'double2' (aka 'vector<double, 2>'))}}
+ // expected-error@-1 {{1st argument must be a vector of integers (was
'double2' (aka 'vector<double, 2>'))}}
}
float test_int_builtin_3(float p0) {
return __builtin_hlsl_elementwise_firstbithigh(p0);
- // expected-error@-1 {{1st argument must be a vector of integers
- // (was 'float')}}
+ // expected-error@-1 {{1st argument must be a vector of integers (was
'double')}}
+}
+
+int16_t test_int_builtin_4(int16_t p0) {
+ return firstbithigh(p0);
+ // expected-error@-1 {{call to 'firstbithigh' is ambiguous}}
+}
+
+int64_t test_int_builtin_5(int64_t p0) {
+ return __builtin_hlsl_elementwise_firstbithigh(p0);
+ // expected-error@-1 {{1st argument must be a vector of integers (was
'int64_t' (aka 'long'))}}
}
diff --git a/llvm/include/llvm/IR/IntrinsicsDirectX.td
b/llvm/include/llvm/IR/IntrinsicsDirectX.td
index ed46d88645f043..c35ea349e0c67c 100644
--- a/llvm/include/llvm/IR/IntrinsicsDirectX.td
+++ b/llvm/include/llvm/IR/IntrinsicsDirectX.td
@@ -86,6 +86,6 @@ def int_dx_rsqrt : DefaultAttrsIntrinsic<[llvm_anyfloat_ty],
[LLVMMatchType<0>]
def int_dx_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [],
[IntrConvergent]>;
def int_dx_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0,
llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;
def int_dx_step : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty,
LLVMMatchType<0>], [IntrNoMem]>;
-def int_dx_firstbituhigh : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>], [IntrNoMem]>;
-def int_dx_firstbitshigh : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>], [IntrNoMem]>;
+def int_dx_firstbituhigh :
DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>],
[llvm_anyint_ty], [IntrNoMem]>;
+def int_dx_firstbitshigh :
DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>],
[llvm_anyint_ty], [IntrNoMem]>;
}
diff --git a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
index 3ca5e0e2046289..088c2440cdb764 100644
--- a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
+++ b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
@@ -84,6 +84,6 @@ let TargetPrefix = "spv" in {
[IntrNoMem, Commutative] >;
def int_spv_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [],
[IntrConvergent]>;
def int_spv_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0,
llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;
- def int_spv_firstbituhigh : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>], [IntrNoMem]>;
- def int_spv_firstbitshigh : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[LLVMMatchType<0>], [IntrNoMem]>;
+ def int_spv_firstbituhigh :
DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>],
[llvm_anyint_ty], [IntrNoMem]>;
+ def int_spv_firstbitshigh :
DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>],
[llvm_anyint_ty], [IntrNoMem]>;
}
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index 4b315d53894174..e09dc1e0b0fba2 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -568,10 +568,9 @@ def FBH : DXILOp<33, unary> {
let Doc = "Returns the location of the first set bit starting from "
"the highest order bit and working downward.";
let LLVMIntrinsic = int_dx_firstbituhigh;
- let arguments = [OverloadTy];
- let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let arguments = [Int32Ty];
+ let result = Int32Ty;
+ let overloads = [];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
@@ -580,10 +579,9 @@ def FBSH : DXILOp<34, unary> {
let Doc = "Returns the location of the first set bit from "
"the highest order bit based on the sign.";
let LLVMIntrinsic = int_dx_firstbitshigh;
- let arguments = [OverloadTy];
- let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let arguments = [Int32Ty];
+ let result = Int32Ty;
+ let overloads = [];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
diff --git a/llvm/test/CodeGen/DirectX/firstbithigh.ll
b/llvm/test/CodeGen/DirectX/firstbithigh.ll
index 4a97ad6226149f..423683f2e300d5 100644
--- a/llvm/test/CodeGen/DirectX/firstbithigh.ll
+++ b/llvm/test/CodeGen/DirectX/firstbithigh.ll
@@ -1,59 +1,31 @@
; RUN: opt -S -scalarizer -dxil-op-lower
-mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
-; Make sure dxil operation function calls for firstbithigh are generated for
all integer types.
-
-define noundef i16 @test_firstbithigh_ushort(i16 noundef %a) {
-entry:
-; CHECK: call i16 @dx.op.unary.i16(i32 33, i16 %{{.*}})
- %elt.firstbithigh = call i16 @llvm.dx.firstbituhigh.i16(i16 %a)
- ret i16 %elt.firstbithigh
-}
-
-define noundef i16 @test_firstbithigh_short(i16 noundef %a) {
-entry:
-; CHECK: call i16 @dx.op.unary.i16(i32 34, i16 %{{.*}})
- %elt.firstbithigh = call i16 @llvm.dx.firstbitshigh.i16(i16 %a)
- ret i16 %elt.firstbithigh
-}
+; Make sure dxil operation function calls for firstbithigh are generated for
32 bit integer types.
define noundef i32 @test_firstbithigh_uint(i32 noundef %a) {
entry:
-; CHECK: call i32 @dx.op.unary.i32(i32 33, i32 %{{.*}})
+; CHECK: call i32 @dx.op.unary(i32 33, i32 %{{.*}})
%elt.firstbithigh = call i32 @llvm.dx.firstbituhigh.i32(i32 %a)
ret i32 %elt.firstbithigh
}
define noundef i32 @test_firstbithigh_int(i32 noundef %a) {
entry:
-; CHECK: call i32 @dx.op.unary.i32(i32 34, i32 %{{.*}})
+; CHECK: call i32 @dx.op.unary(i32 34, i32 %{{.*}})
%elt.firstbithigh = call i32 @llvm.dx.firstbitshigh.i32(i32 %a)
ret i32 %elt.firstbithigh
}
-define noundef i64 @test_firstbithigh_ulong(i64 noundef %a) {
-entry:
-; CHECK: call i64 @dx.op.unary.i64(i32 33, i64 %{{.*}})
- %elt.firstbithigh = call i64 @llvm.dx.firstbituhigh.i64(i64 %a)
- ret i64 %elt.firstbithigh
-}
-
-define noundef i64 @test_firstbithigh_long(i64 noundef %a) {
-entry:
-; CHECK: call i64 @dx.op.unary.i64(i32 34, i64 %{{.*}})
- %elt.firstbithigh = call i64 @llvm.dx.firstbitshigh.i64(i64 %a)
- ret i64 %elt.firstbithigh
-}
-
define noundef <4 x i32> @test_firstbituhigh_vec4_i32(<4 x i32> noundef %a) {
entry:
; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
- ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unary.i32(i32 33, i32 [[ee0]])
+ ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unary(i32 33, i32 [[ee0]])
; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
- ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unary.i32(i32 33, i32 [[ee1]])
+ ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unary(i32 33, i32 [[ee1]])
; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
- ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unary.i32(i32 33, i32 [[ee2]])
+ ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unary(i32 33, i32 [[ee2]])
; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
- ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unary.i32(i32 33, i32 [[ee3]])
+ ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unary(i32 33, i32 [[ee3]])
; CHECK: insertelement <4 x i32> poison, i32 [[ie0]], i64 0
; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie1]], i64 1
; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie2]], i64 2
@@ -65,13 +37,13 @@ entry:
define noundef <4 x i32> @test_firstbitshigh_vec4_i32(<4 x i32> noundef %a) {
entry:
; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
- ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unary.i32(i32 34, i32 [[ee0]])
+ ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unary(i32 34, i32 [[ee0]])
; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
- ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unary.i32(i32 34, i32 [[ee1]])
+ ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unary(i32 34, i32 [[ee1]])
; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
- ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unary.i32(i32 34, i32 [[ee2]])
+ ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unary(i32 34, i32 [[ee2]])
; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
- ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unary.i32(i32 34, i32 [[ee3]])
+ ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unary(i32 34, i32 [[ee3]])
; CHECK: insertelement <4 x i32> poison, i32 [[ie0]], i64 0
; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie1]], i64 1
; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie2]], i64 2
@@ -80,12 +52,8 @@ entry:
ret <4 x i32> %2
}
-declare i16 @llvm.dx.firstbituhigh.i16(i16)
declare i32 @llvm.dx.firstbituhigh.i32(i32)
-declare i64 @llvm.dx.firstbituhigh.i64(i64)
declare <4 x i32> @llvm.dx.firstbituhigh.v4i32(<4 x i32>)
-declare i16 @llvm.dx.firstbitshigh.i16(i16)
declare i32 @llvm.dx.firstbitshigh.i32(i32)
-declare i64 @llvm.dx.firstbitshigh.i64(i64)
declare <4 x i32> @llvm.dx.firstbitshigh.v4i32(<4 x i32>)
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
index e20a7a4cefe8ee..077a67d0f17b2d 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
@@ -10,13 +10,6 @@ entry:
ret i32 %elt.firstbituhigh
}
-define noundef i16 @firstbituhigh_i16(i16 noundef %a) {
-entry:
-; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] FindUMsb %[[#]]
- %elt.firstbituhigh = call i16 @llvm.spv.firstbituhigh.i16(i16 %a)
- ret i16 %elt.firstbituhigh
-}
-
define noundef i32 @firstbitshigh_i32(i32 noundef %a) {
entry:
; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] FindSMsb %[[#]]
@@ -24,14 +17,5 @@ entry:
ret i32 %elt.firstbitshigh
}
-define noundef i16 @firstbitshigh_i16(i16 noundef %a) {
-entry:
-; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] FindSMsb %[[#]]
- %elt.firstbitshigh = call i16 @llvm.spv.firstbitshigh.i16(i16 %a)
- ret i16 %elt.firstbitshigh
-}
-
-declare i16 @llvm.spv.firstbituhigh.i16(i16)
declare i32 @llvm.spv.firstbituhigh.i32(i32)
-declare i16 @llvm.spv.firstbitshigh.i16(i16)
declare i32 @llvm.spv.firstbitshigh.i32(i32)
>From 7265e563e818325c982e3ed19247b9d383d6bb9e Mon Sep 17 00:00:00 2001
From: Sarah Spall <sp...@planetbauer.com>
Date: Sat, 5 Oct 2024 00:06:05 +0000
Subject: [PATCH 4/4] address PR comments
---
clang/lib/CodeGen/CGBuiltin.cpp | 1 +
clang/lib/Sema/SemaHLSL.cpp | 2 ++
llvm/lib/Target/DirectX/DXIL.td | 4 ++--
.../Target/SPIRV/SPIRVInstructionSelector.cpp | 4 ++--
llvm/test/CodeGen/DirectX/firstbithigh.ll | 20 +++++++++----------
5 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index c1d17774551d1c..bc14fd0a93edeb 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18636,6 +18636,7 @@ Intrinsic::ID getFirstBitHighIntrinsic(CGHLSLRuntime
&RT, QualType QT) {
return RT.getFirstBitSHighIntrinsic();
}
+ assert(QT->hasUnsignedIntegerRepresentation());
return RT.getFirstBitUHighIntrinsic();
}
diff --git a/clang/lib/Sema/SemaHLSL.cpp b/clang/lib/Sema/SemaHLSL.cpp
index 57ba09e770eda8..eb25332ba701a6 100644
--- a/clang/lib/Sema/SemaHLSL.cpp
+++ b/clang/lib/Sema/SemaHLSL.cpp
@@ -1890,6 +1890,8 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
<< 1 << /* integer ty */ 6 << ArgTy;
return true;
}
+
+ TheCall->setType(ArgTy);
break;
}
case Builtin::BI__builtin_hlsl_select: {
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index e09dc1e0b0fba2..734c7527f672ff 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -564,7 +564,7 @@ def CBits : DXILOp<31, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def FBH : DXILOp<33, unary> {
+def FirstbitHi : DXILOp<33, unaryBits> {
let Doc = "Returns the location of the first set bit starting from "
"the highest order bit and working downward.";
let LLVMIntrinsic = int_dx_firstbituhigh;
@@ -575,7 +575,7 @@ def FBH : DXILOp<33, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def FBSH : DXILOp<34, unary> {
+def FirstbitSHi : DXILOp<34, unaryBits> {
let Doc = "Returns the location of the first set bit from "
"the highest order bit based on the sign.";
let LLVMIntrinsic = int_dx_firstbitshigh;
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index b8229a7a72eeac..20daef223b1c9c 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -2525,9 +2525,9 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register
ResVReg,
return selectExtInst(ResVReg, ResType, I, CL::rsqrt, GL::InverseSqrt);
case Intrinsic::spv_sign:
return selectSign(ResVReg, ResType, I);
- case Intrinsic::spv_firstbituhigh:
+ case Intrinsic::spv_firstbituhigh: // There is no CL equivalent of FindUMsb
return selectExtInst(ResVReg, ResType, I, GL::FindUMsb);
- case Intrinsic::spv_firstbitshigh:
+ case Intrinsic::spv_firstbitshigh: // There is no CL equivalent of FindSMsb
return selectExtInst(ResVReg, ResType, I, GL::FindSMsb);
case Intrinsic::spv_lifetime_start:
case Intrinsic::spv_lifetime_end: {
diff --git a/llvm/test/CodeGen/DirectX/firstbithigh.ll
b/llvm/test/CodeGen/DirectX/firstbithigh.ll
index 423683f2e300d5..20dcf56f9ad09d 100644
--- a/llvm/test/CodeGen/DirectX/firstbithigh.ll
+++ b/llvm/test/CodeGen/DirectX/firstbithigh.ll
@@ -4,14 +4,14 @@
define noundef i32 @test_firstbithigh_uint(i32 noundef %a) {
entry:
-; CHECK: call i32 @dx.op.unary(i32 33, i32 %{{.*}})
+; CHECK: call i32 @dx.op.unaryBits(i32 33, i32 %{{.*}})
%elt.firstbithigh = call i32 @llvm.dx.firstbituhigh.i32(i32 %a)
ret i32 %elt.firstbithigh
}
define noundef i32 @test_firstbithigh_int(i32 noundef %a) {
entry:
-; CHECK: call i32 @dx.op.unary(i32 34, i32 %{{.*}})
+; CHECK: call i32 @dx.op.unaryBits(i32 34, i32 %{{.*}})
%elt.firstbithigh = call i32 @llvm.dx.firstbitshigh.i32(i32 %a)
ret i32 %elt.firstbithigh
}
@@ -19,13 +19,13 @@ entry:
define noundef <4 x i32> @test_firstbituhigh_vec4_i32(<4 x i32> noundef %a) {
entry:
; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
- ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unary(i32 33, i32 [[ee0]])
+ ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits(i32 33, i32 [[ee0]])
; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
- ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unary(i32 33, i32 [[ee1]])
+ ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits(i32 33, i32 [[ee1]])
; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
- ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unary(i32 33, i32 [[ee2]])
+ ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits(i32 33, i32 [[ee2]])
; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
- ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unary(i32 33, i32 [[ee3]])
+ ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits(i32 33, i32 [[ee3]])
; CHECK: insertelement <4 x i32> poison, i32 [[ie0]], i64 0
; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie1]], i64 1
; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie2]], i64 2
@@ -37,13 +37,13 @@ entry:
define noundef <4 x i32> @test_firstbitshigh_vec4_i32(<4 x i32> noundef %a) {
entry:
; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
- ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unary(i32 34, i32 [[ee0]])
+ ; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits(i32 34, i32 [[ee0]])
; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
- ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unary(i32 34, i32 [[ee1]])
+ ; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits(i32 34, i32 [[ee1]])
; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
- ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unary(i32 34, i32 [[ee2]])
+ ; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits(i32 34, i32 [[ee2]])
; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
- ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unary(i32 34, i32 [[ee3]])
+ ; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits(i32 34, i32 [[ee3]])
; CHECK: insertelement <4 x i32> poison, i32 [[ie0]], i64 0
; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie1]], i64 1
; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie2]], i64 2
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