[clang] [llvm] [RISCV] Add Hazard3 CPU (PR #102452)

2024-08-16 Thread Luke Wren via cfe-commits
Wren6991 wrote: I think we are really compressing a three-tuple of something like `--`. For a two-tuple I prefer `rp2350-hazard3` over `raspberrypi-rp2350` because: * RP2350 is a SoC, not a CPU, so doesn't belong at the end of the tuple * RP2350 also has Cortex-M33s, so leaving `hazard3` out o

[clang] [llvm] [RISCV] Add Hazard3 Core as taped out for RP2350 (PR #102452)

2024-08-16 Thread Luke Wren via cfe-commits
@@ -108,6 +108,7 @@ Changes to the RISC-V Backend fill value) rather than NOPs. * Added Syntacore SCR4 and SCR5 CPUs: ``-mcpu=syntacore-scr4/5-rv32/64`` * ``-mcpu=sifive-p470`` was added. +* Added Hazard3 CPU: ``-mcpu=hazard3`` (32-bit only). Wren6991 wrote:

[clang] [llvm] [RISCV] Add Hazard3 Core as taped out for RP2350 (PR #102452)

2024-08-16 Thread Luke Wren via cfe-commits
@@ -402,6 +402,21 @@ // MCPU-SIFIVE-P670-SAME: "-target-feature" "+zvkt" // MCPU-SIFIVE-P670-SAME: "-target-abi" "lp64d" +// RUN: %clang -target riscv32 -### -c %s 2>&1 -mcpu=rp2350-hazard3 | FileCheck -check-prefix=MCPU-HAZARD3 %s +// MCPU-HAZARD3: "-target-cpu" "rp2350-haza

[clang] [llvm] [RISCV] Add Hazard3 Core as taped out for RP2350 (PR #102452)

2024-08-17 Thread Luke Wren via cfe-commits
@@ -402,6 +402,21 @@ // MCPU-SIFIVE-P670-SAME: "-target-feature" "+zvkt" // MCPU-SIFIVE-P670-SAME: "-target-abi" "lp64d" +// RUN: %clang -target riscv32 -### -c %s 2>&1 -mcpu=rp2350-hazard3 | FileCheck -check-prefix=MCPU-HAZARD3 %s +// MCPU-HAZARD3: "-target-cpu" "rp2350-haza

[clang] [llvm] [RISCV] Add Hazard3 Core as taped out for RP2350 (PR #102452)

2024-08-17 Thread Luke Wren via cfe-commits
@@ -402,6 +402,21 @@ // MCPU-SIFIVE-P670-SAME: "-target-feature" "+zvkt" // MCPU-SIFIVE-P670-SAME: "-target-abi" "lp64d" +// RUN: %clang -target riscv32 -### -c %s 2>&1 -mcpu=rp2350-hazard3 | FileCheck -check-prefix=MCPU-HAZARD3 %s +// MCPU-HAZARD3: "-target-cpu" "rp2350-haza