Author: dinar
Date: Fri Jun 16 07:09:52 2017
New Revision: 305551
URL: http://llvm.org/viewvc/llvm-project?rev=305551&view=rev
Log:
Expand vector oparation to as IR constants, PR28129.
Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/avx-builtins.c
Modified: cfe/trunk
@@ -257,7 +257,7 @@ class ImmCheck {
}
class Inst ft, list ch, MemEltType met> {
+ list ft, list ch, MemEltType met =
MemEltTyDefault> {
dtemirbulatov wrote:
I am not sure about propose of this change "met = MemEltTyDefault"? The last
parameter i
https://github.com/dtemirbulatov approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/71707
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https://github.com/dtemirbulatov created
https://github.com/llvm/llvm-project/pull/72272
Thing change add builtins for SME2:
sclamp.single.x2
uclamp.single.x2
fclamp.single.x2
sclamp.single.x4
uclamp.single.x4
fclamp.single.x4
Patch by: Hassnaa Hamdi
>From 3baa1da7fac4
@@ -0,0 +1,242 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+
+// REQUIRES: aarch64-registered-target
+
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve
-target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72827
>From 7aa69c9cb936b3883de7922f72ed9417be5a16f5 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 20 Nov 2023 07:04:18 +
Subject: [PATCH 1/2] [AArch64][SME2] Add PEXT, PSEL builtins for SME2
https://github.com/dtemirbulatov created
https://github.com/llvm/llvm-project/pull/74720
Add builtin: 'svreinterpret_b' to cast from svcount_t to svbool_t.
Add builtin: 'svreinterpret_c' to cast from svbool_t to svcount_t.
Patch by: Hassnaa Hamdi
>From 837a5240ab812eb609bd1db446035a21f42d22
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72827
>From 7aa69c9cb936b3883de7922f72ed9417be5a16f5 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 20 Nov 2023 07:04:18 +
Subject: [PATCH 1/3] [AArch64][SME2] Add PEXT, PSEL builtins for SME2
https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/74100
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https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/74720
>From 837a5240ab812eb609bd1db446035a21f42d22e3 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 7 Dec 2023 14:46:11 +
Subject: [PATCH 1/2] [AArch64][SME2] Add builtins to cast svbool from/to
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72827
>From 7aa69c9cb936b3883de7922f72ed9417be5a16f5 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 20 Nov 2023 07:04:18 +
Subject: [PATCH 1/4] [AArch64][SME2] Add PEXT, PSEL builtins for SME2
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/74720
>From e54baef2fe3f6249464ba55dcd18809a5018b146 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 7 Dec 2023 14:46:11 +
Subject: [PATCH 1/2] [AArch64][SME2] Add builtins to cast svbool from/to
https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/74720
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https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72827
>From ae1b183325c08ec8eb1cb82977591563410c0361 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 20 Nov 2023 07:04:18 +
Subject: [PATCH 1/5] [AArch64][SME2] Add PEXT, PSEL builtins for SME2
https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/72827
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https://github.com/dtemirbulatov created
https://github.com/llvm/llvm-project/pull/72487
This change enables FCLAMP, FCLAMP_BF16, CNTP builtins for SME2 target.
>From dc691934814029de64494272697d562ddb86dfee Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 16 Nov 2023 07:21:17 +000
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72487
>From dc691934814029de64494272697d562ddb86dfee Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 16 Nov 2023 07:21:17 +
Subject: [PATCH 1/2] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72487
>From dc691934814029de64494272697d562ddb86dfee Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 16 Nov 2023 07:21:17 +
Subject: [PATCH 1/3] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72487
>From dc691934814029de64494272697d562ddb86dfee Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 16 Nov 2023 07:21:17 +
Subject: [PATCH 1/4] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2
https://github.com/dtemirbulatov created
https://github.com/llvm/llvm-project/pull/72827
This change enables PEXT, PSEL builtins for SME2 target.
>From 7aa69c9cb936b3883de7922f72ed9417be5a16f5 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 20 Nov 2023 07:04:18 +
Subject: [PAT
dtemirbulatov wrote:
LGTM.
https://github.com/llvm/llvm-project/pull/70809
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https://github.com/dtemirbulatov approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/70809
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https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72487
>From 6e2c1015c6cf6b226bc9e28c563167e07b9c4074 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 16 Nov 2023 07:21:17 +
Subject: [PATCH] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2
Th
https://github.com/dtemirbulatov edited
https://github.com/llvm/llvm-project/pull/72487
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https://github.com/dtemirbulatov created
https://github.com/llvm/llvm-project/pull/75325
Add SQRSHRN, UQRSHRN, SQRSHRUN builtins for SME2, SVE2p1.
>From 83d1e213a5dce7621f8f87668a4ab1f15306fc5b Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Wed, 13 Dec 2023 11:28:06 +
Subject: [PA
https://github.com/dtemirbulatov created
https://github.com/llvm/llvm-project/pull/75326
Patch by: Kerry McLaughlin
>From 2b0d280b59e244600ebc4b8373ab5494b88942df Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Wed, 13 Dec 2023 12:00:11 +
Subject: [PATCH] [AArch64][SME2] Add built
https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/75326
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https://github.com/dtemirbulatov approved this pull request.
LGTM, with David's request to rename acle_sme2_* acle_sme2_vector_* tests in
clang/test/CodeGen/aarch64-sme2-intrinsics
https://github.com/llvm/llvm-project/pull/74841
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@@ -0,0 +1,78 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
dtemirbulatov wrote:
Hmm, I could only see aarch64_sve_sqcvtn_x2 tests here, can you add
aarch64_sve_sqcvtn_x4 as well?
https://github.com/llvm/llvm-project/pull/754
@@ -0,0 +1,78 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
dtemirbulatov wrote:
oh, sorry, I see now.
https://github.com/llvm/llvm-project/pull/75454
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cf
https://github.com/dtemirbulatov approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/75454
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https://github.com/dtemirbulatov edited
https://github.com/llvm/llvm-project/pull/75454
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https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72487
>From 6e2c1015c6cf6b226bc9e28c563167e07b9c4074 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 16 Nov 2023 07:21:17 +
Subject: [PATCH 1/2] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72487
>From 6e2c1015c6cf6b226bc9e28c563167e07b9c4074 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 16 Nov 2023 07:21:17 +
Subject: [PATCH 1/3] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2
@@ -315,6 +315,223 @@ let TargetGuard = "sme2" in {
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone,
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
}
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+ def SVMLA_MULTI_VG
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72487
>From 6e2c1015c6cf6b226bc9e28c563167e07b9c4074 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Thu, 16 Nov 2023 07:21:17 +
Subject: [PATCH 1/4] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2
https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/72487
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dtemirbulatov wrote:
> Should these builtins be `IsStreamingCompatible` until we add
> `IsStreamingOrSVE2p1`?
yes, it looks like this is the case. LGTM.
https://github.com/llvm/llvm-project/pull/75821
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https://github.com/dtemirbulatov approved this pull request.
https://github.com/llvm/llvm-project/pull/75821
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@@ -315,6 +315,219 @@ let TargetGuard = "sme2" in {
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone,
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
}
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+ def SVMLA_MULTI_VG
https://github.com/dtemirbulatov edited
https://github.com/llvm/llvm-project/pull/75584
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@@ -315,6 +315,219 @@ let TargetGuard = "sme2" in {
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone,
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
}
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+ def SVMLA_MULTI_VG
@@ -315,6 +315,219 @@ let TargetGuard = "sme2" in {
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone,
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
}
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+ def SVMLA_MULTI_VG
@@ -315,6 +315,219 @@ let TargetGuard = "sme2" in {
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone,
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
}
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+ def SVMLA_MULTI_VG
@@ -315,6 +315,219 @@ let TargetGuard = "sme2" in {
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone,
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
}
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+ def SVMLA_MULTI_VG
@@ -315,6 +315,219 @@ let TargetGuard = "sme2" in {
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone,
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
}
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+ def SVMLA_MULTI_VG
@@ -313,6 +313,72 @@ let TargetGuard = "sme2" in {
def SVBMOPA : Inst<"svbmopa_za32[_{d}]_m", "viPPdd", "iUi", MergeNone,
"aarch64_sme_bmopa_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNo
@@ -1,10 +1,17 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: aarch64-registered-target
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S
-O1 -Werror -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1
@@ -1859,19 +1859,28 @@ def SVBGRP : SInst<"svbgrp[_{d}]", "ddd",
"UcUsUiUl", MergeNone, "aarch64_sv
def SVBGRP_N : SInst<"svbgrp[_n_{d}]", "dda", "UcUsUiUl", MergeNone,
"aarch64_sve_bgrp_x">;
}
+let TargetGuard = "sve2p1|sme" in {
dtemirbulatov wrote:
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/72272
>From 11d7759523aa7d8c7f581da176f2e4e5a03f76ca Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Tue, 14 Nov 2023 15:25:45 +
Subject: [PATCH] [AArch64][SME2] Enable CLAMP multi-vector builtins for
https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/72272
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https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/73188
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https://github.com/dtemirbulatov created
https://github.com/llvm/llvm-project/pull/74100
Patch by: Kerry McLaughlin
>From 68fdadc7fc5c6541ac56cab0240d24df3f003eb0 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Fri, 1 Dec 2023 16:27:42 +
Subject: [PATCH] [AArch64][SME2] Add _x2/_x
https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/74066
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https://github.com/llvm/llvm-project/pull/74100
>From f1fb62ba84d94d2e63efa97e2a3d98c633509589 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Fri, 1 Dec 2023 16:27:42 +
Subject: [PATCH 1/2] [AArch64][SME2] Add _x2/_x4 svqrshr builtins.
Patc
https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/75584
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https://github.com/dtemirbulatov closed
https://github.com/llvm/llvm-project/pull/75737
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https://github.com/dtemirbulatov created
https://github.com/llvm/llvm-project/pull/76712
…ltins.
Patch-by: Caroline Concatto
>From d21c30bb3d655ab66e1ecb2f9b26dc441ca8928a Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Tue, 2 Jan 2024 12:01:17 +
Subject: [PATCH] [AArch64][SME2]
dtemirbulatov wrote:
I missed that implemtation in https://github.com/llvm/llvm-project/pull/75958,
Closing then.
https://github.com/llvm/llvm-project/pull/76712
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dtemirbulatov wrote:
LGTM.
https://github.com/llvm/llvm-project/pull/77097
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https://github.com/dtemirbulatov approved this pull request.
https://github.com/llvm/llvm-project/pull/77097
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https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/79842
>From af323998a63a72f569d543cf5167d5d28e784682 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 29 Jan 2024 14:43:13 +
Subject: [PATCH 1/9] [Clang][AArch64] Warn when calling
streaming/non-
@@ -7531,19 +7531,15 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
// vector lengths may be different.
if (CallerFD && Context.getTargetInfo().hasFeature("sme") && !IsBuiltin) {
ArmStreamingType CallerFnType = getArmStreamingFnType(Cal
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/79842
>From af323998a63a72f569d543cf5167d5d28e784682 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 29 Jan 2024 14:43:13 +
Subject: [PATCH 01/10] [Clang][AArch64] Warn when calling
streaming/no
@@ -3717,6 +3717,16 @@ def err_sme_definition_using_za_in_non_sme_target :
Error<
"function using ZA state requires 'sme'">;
def err_sme_definition_using_zt0_in_non_sme2_target : Error<
"function using ZT0 state requires 'sme2'">;
+def warn_sme_streaming_pass_return_vl_to_
@@ -7513,6 +7516,30 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
-
@@ -7513,6 +7516,30 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
@@ -7513,6 +7516,30 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
@@ -7513,6 +7516,30 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
@@ -7513,6 +7516,30 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
dtemirbulatov wrote:
Done.
https://github.com/llvm/llvm-project/pull/79842
__
@@ -7513,6 +7516,30 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
@@ -7513,6 +7516,30 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
@@ -7516,28 +7516,23 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
-auto *CallerFD = dyn_cast(CurContext);
-bool IsCalleeStreaming =
-(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
-bool Is
@@ -3723,8 +3723,8 @@ def warn_sme_streaming_pass_return_vl_to_non_streaming :
Warning<
" different">,
InGroup, DefaultIgnore;
def warn_sme_locally_streaming_has_vl_args_returns : Warning<
- "passing/returning a VL-dependent argument from a function"
- " arm_locally_stre
@@ -1390,6 +1390,9 @@ def MultiGPU: DiagGroup<"multi-gpu">;
// libc and the CRT to be skipped.
def AVRRtlibLinkingQuirks : DiagGroup<"avr-rtlib-linking-quirks">;
+// A warning group AArch64 related to SME function attribues.
dtemirbulatov wrote:
Done.
https:
@@ -3717,6 +3717,16 @@ def err_sme_definition_using_za_in_non_sme_target :
Error<
"function using ZA state requires 'sme'">;
def err_sme_definition_using_zt0_in_non_sme2_target : Error<
"function using ZT0 state requires 'sme2'">;
+def warn_sme_streaming_pass_return_vl_to_
@@ -1,5 +1,6 @@
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-fsyntax-only -verify %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-fsyntax-only -verify=expected-cpp -x c++ %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gn
https://github.com/dtemirbulatov edited
https://github.com/llvm/llvm-project/pull/79842
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@@ -3717,6 +3717,30 @@ def err_sme_definition_using_za_in_non_sme_target :
Error<
"function using ZA state requires 'sme'">;
def err_sme_definition_using_zt0_in_non_sme2_target : Error<
"function using ZT0 state requires 'sme2'">;
+def warn_sme_streaming_caller_pass_args_t
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/79842
>From af323998a63a72f569d543cf5167d5d28e784682 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 29 Jan 2024 14:43:13 +
Subject: [PATCH 1/3] [Clang][AArch64] Warn when calling
streaming/non-
@@ -1,5 +1,6 @@
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-fsyntax-only -verify %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-fsyntax-only -verify=expected-cpp -x c++ %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gn
@@ -7513,6 +7516,44 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+if (FD && CallerFD && Context.getTargetInfo().hasFeature("sme") &&
+!FD->getBuiltinID()) {
+ // If the cal
@@ -7513,6 +7516,44 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+if (FD && CallerFD && Context.getTargetInfo().hasFeature("sme") &&
+!FD->getBuiltinID()) {
+ // If the cal
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/79842
>From af323998a63a72f569d543cf5167d5d28e784682 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 29 Jan 2024 14:43:13 +
Subject: [PATCH 1/4] [Clang][AArch64] Warn when calling
streaming/non-
@@ -3717,6 +3717,30 @@ def err_sme_definition_using_za_in_non_sme_target :
Error<
"function using ZA state requires 'sme'">;
def err_sme_definition_using_zt0_in_non_sme2_target : Error<
"function using ZT0 state requires 'sme2'">;
+def warn_sme_streaming_caller_pass_args_t
https://github.com/dtemirbulatov updated
https://github.com/llvm/llvm-project/pull/79842
>From af323998a63a72f569d543cf5167d5d28e784682 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov
Date: Mon, 29 Jan 2024 14:43:13 +
Subject: [PATCH 1/5] [Clang][AArch64] Warn when calling
streaming/non-
@@ -7513,6 +7516,38 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+if (FD && CallerFD && Context.getTargetInfo().hasFeature("sme") &&
dtemirbulatov wrote:
Done.
https:
@@ -7513,6 +7516,38 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+if (FD && CallerFD && Context.getTargetInfo().hasFeature("sme") &&
+!FD->getBuiltinID()) {
+ // If the cal
@@ -3717,6 +3717,30 @@ def err_sme_definition_using_za_in_non_sme_target :
Error<
"function using ZA state requires 'sme'">;
def err_sme_definition_using_zt0_in_non_sme2_target : Error<
"function using ZT0 state requires 'sme2'">;
+def warn_sme_streaming_caller_pass_args_t
@@ -3717,6 +3717,30 @@ def err_sme_definition_using_za_in_non_sme_target :
Error<
"function using ZA state requires 'sme'">;
def err_sme_definition_using_zt0_in_non_sme2_target : Error<
"function using ZT0 state requires 'sme2'">;
+def warn_sme_streaming_caller_pass_args_t
@@ -445,3 +448,54 @@ void conflicting_state_attrs_preserves_out_zt0(void)
__arm_preserves("zt0") __ar
// expected-cpp-error@+2 {{conflicting attributes for state 'zt0'}}
// expected-error@+1 {{conflicting attributes for state 'zt0'}}
void conflicting_state_attrs_preserves_inou
https://github.com/dtemirbulatov approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/77936
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https://github.com/dtemirbulatov edited
https://github.com/llvm/llvm-project/pull/77936
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@@ -814,6 +820,49 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+class SMEAttributes {
+public:
+ bool IsStreaming = false;
+ bool IsStreamingCompatible = false;
+ bool HasNewZA = f
https://github.com/dtemirbulatov requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/77936
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@@ -7513,6 +7516,36 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
@@ -7513,6 +7516,36 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+auto *CallerFD = dyn_cast(CurContext);
+bool IsCalleeStreaming =
+(ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask);
+bool IsC
@@ -12230,12 +12230,22 @@ bool Sema::CheckFunctionDeclaration(Scope *S,
FunctionDecl *NewFD,
}
// Check if the function definition uses any AArch64 SME features without
- // having the '+sme' feature enabled.
+ // having the '+sme' feature enabled and warn user if sme l
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