================ @@ -1,10 +1,17 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme -target-feature +sme2 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s ---------------- dtemirbulatov wrote:
According to https://developer.arm.com/documentation/ddi0602/2022-09/SVE-Instructions/PSEL--Predicate-select-between-predicate-register-or-all-false-?lang=en , I think that we should enable `-target-feature +sme` and `-target-feature +sve2p1 ` and remove `-target-feature +sme2` in order to produce PSEL instruction. https://github.com/llvm/llvm-project/pull/72827 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
