https://github.com/adam-yang closed
https://github.com/llvm/llvm-project/pull/113394
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https://github.com/s-perron approved this pull request.
https://github.com/llvm/llvm-project/pull/113394
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https://github.com/bogner approved this pull request.
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https://github.com/joaosaffran commented:
LGTM
https://github.com/llvm/llvm-project/pull/113394
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@@ -83,12 +83,210 @@ entry:
ret i64 %0
}
-declare half @llvm.dx.clamp.f16(half, half, half)
-declare float @llvm.dx.clamp.f32(float, float, float)
-declare double @llvm.dx.clamp.f64(double, double, double)
-declare i16 @llvm.dx.clamp.i16(i16, i16, i16)
-declare i32 @llvm.dx.
@@ -83,12 +83,210 @@ entry:
ret i64 %0
}
-declare half @llvm.dx.clamp.f16(half, half, half)
-declare float @llvm.dx.clamp.f32(float, float, float)
-declare double @llvm.dx.clamp.f64(double, double, double)
-declare i16 @llvm.dx.clamp.i16(i16, i16, i16)
-declare i32 @llvm.dx.
https://github.com/farzonl approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/113394
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@@ -40,8 +40,9 @@ def int_dx_cast_handle : Intrinsic<[llvm_any_ty],
[llvm_any_ty]>;
def int_dx_all : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty],
[IntrNoMem]>;
def int_dx_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty],
[IntrNoMem]>;
-def int_dx_clamp : Defaul
@@ -2559,6 +2559,12 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register
ResVReg,
} break;
case Intrinsic::spv_saturate:
return selectSaturate(ResVReg, ResType, I);
+ case Intrinsic::spv_fclamp:
+return selectExtInst(ResVReg, ResType, I, CL::fclamp, GL::FCla
@@ -0,0 +1,130 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
adam-yang wrote:
clamp-vec is now gone. The vec
@@ -18661,14 +18661,30 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *OpMax = EmitScalarExpr(E->getArg(2));
QualType Ty = E->getArg(0)->getType();
-bool IsUnsigned = false;
if (auto *VecTy = Ty->getAs())
Ty = VecTy->getElemen
@@ -40,8 +40,9 @@ def int_dx_cast_handle : Intrinsic<[llvm_any_ty],
[llvm_any_ty]>;
def int_dx_all : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty],
[IntrNoMem]>;
def int_dx_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty],
[IntrNoMem]>;
-def int_dx_clamp : Defaul
@@ -0,0 +1,130 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
farzonl wrote:
Thats a artifact of the early d
@@ -2559,6 +2559,12 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register
ResVReg,
} break;
case Intrinsic::spv_saturate:
return selectSaturate(ResVReg, ResType, I);
+ case Intrinsic::spv_fclamp:
+return selectExtInst(ResVReg, ResType, I, CL::fclamp, GL::FCla
https://github.com/adam-yang updated
https://github.com/llvm/llvm-project/pull/113394
>From 8cf5032a5580b97c4c4965e577374f627fbe0643 Mon Sep 17 00:00:00 2001
From: Adam Yang <31109344+adam-y...@users.noreply.github.com>
Date: Mon, 14 Oct 2024 16:35:45 -0700
Subject: [PATCH 1/5] Added the intrins
@@ -0,0 +1,130 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
adam-yang wrote:
I'm just following what was do
@@ -1,133 +1,143 @@
// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library %s \
// RUN: -fnative-half-type -emit-llvm -disable-llvm-passes -o - | \
-// RUN: FileCheck %s --check-prefixes=CHECK,NATIVE_HALF
+// RUN: FileCheck %s --check-prefixes=CHE
https://github.com/adam-yang updated
https://github.com/llvm/llvm-project/pull/113394
>From 8cf5032a5580b97c4c4965e577374f627fbe0643 Mon Sep 17 00:00:00 2001
From: Adam Yang <31109344+adam-y...@users.noreply.github.com>
Date: Mon, 14 Oct 2024 16:35:45 -0700
Subject: [PATCH 1/6] Added the intrins
@@ -0,0 +1,130 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
farzonl wrote:
What is the reason for having a
@@ -1,133 +1,143 @@
// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library %s \
// RUN: -fnative-half-type -emit-llvm -disable-llvm-passes -o - | \
-// RUN: FileCheck %s --check-prefixes=CHECK,NATIVE_HALF
+// RUN: FileCheck %s --check-prefixes=CHE
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/113394
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https://github.com/farzonl edited
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@@ -2559,6 +2559,12 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register
ResVReg,
} break;
case Intrinsic::spv_saturate:
return selectSaturate(ResVReg, ResType, I);
+ case Intrinsic::spv_fclamp:
+return selectExtInst(ResVReg, ResType, I, CL::fclamp, GL::FCla
https://github.com/farzonl deleted
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@@ -18661,14 +18661,30 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *OpMax = EmitScalarExpr(E->getArg(2));
QualType Ty = E->getArg(0)->getType();
-bool IsUnsigned = false;
if (auto *VecTy = Ty->getAs())
Ty = VecTy->getElemen
@@ -18661,14 +18661,30 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *OpMax = EmitScalarExpr(E->getArg(2));
QualType Ty = E->getArg(0)->getType();
-bool IsUnsigned = false;
if (auto *VecTy = Ty->getAs())
Ty = VecTy->getElemen
llvmbot wrote:
@llvm/pr-subscribers-llvm-ir
@llvm/pr-subscribers-clang-codegen
Author: Adam Yang (adam-yang)
Changes
Fixes #88052
- Added the following intrinsics:
- `int_spv_uclamp`
- `int_spv_sclamp`
- `int_spv_fclamp`
- Update the clamp.hlsl unit tests to include SPIRV
- Added th
llvmbot wrote:
@llvm/pr-subscribers-backend-spir-v
Author: Adam Yang (adam-yang)
Changes
Fixes #88052
- Added the following intrinsics:
- `int_spv_uclamp`
- `int_spv_sclamp`
- `int_spv_fclamp`
- Update the clamp.hlsl unit tests to include SPIRV
- Added the SPIRV specific tests
---
https://github.com/adam-yang ready_for_review
https://github.com/llvm/llvm-project/pull/113394
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https://github.com/adam-yang updated
https://github.com/llvm/llvm-project/pull/113394
>From 8cf5032a5580b97c4c4965e577374f627fbe0643 Mon Sep 17 00:00:00 2001
From: Adam Yang <31109344+adam-y...@users.noreply.github.com>
Date: Mon, 14 Oct 2024 16:35:45 -0700
Subject: [PATCH 1/4] Added the intrins
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https://github.com/adam-yang created
https://github.com/llvm/llvm-project/pull/113394
Fixes #88052
- Added the following intrinsics:
- `int_spv_uclamp`
- `int_spv_sclamp`
- `int_spv_fclamp`
- Update the clamp.hlsl unit tests to include SPIRV
- Added the SPIRV specific tests
>From 8cf5032
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