Dear [EMAIL PROTECTED],
Please note that the only mention of a return status on the man page
is under -q. Please make a separate section RETURN STATUS or whatever,
like many other man pages.
regarding the Info,
> "Manoj" == Manoj Srivastava <[EMAIL PROTECTED]> writes:
Manoj> File: make.info,
> Version: 3.80-4
> $ cat Makefile
> a: /proc
> :
> $ make
> make: Warning: File `/proc' has modification time 2.4e+04 s in the future
> :
> make: warning: Clock skew detected. Your build may be incomplete.
>
> You see, I wanted a file that means 'now', but recent versions of make
> make t
No bug address on man page.
In Info index:
* Automatic:: How to use automatic variables in the
commands of implicit rules.
--should be
* Automatic variables:: ...
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[EMAIL PROTE
In Info, Automatic gets
Possible completions are:
Automatic Automatic Prerequisites
However when we arrive at the 'Automatic' page, we are surprised to
see it calls itself Automatic Variables. So it should be called
Automatic Variables everywhere, I'd say.
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$ cat Makefile
a: [EMAIL PROTECTED]
a.b:
$ make -n
make: *** No rule to make target `.b', needed by `a'. Stop.
But don't we know that $@ = a already at that point?
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In Info, one cannot find how to change PATH in a Makefile.
PATH=/usr/sbin:$(PATH) won't do without spelling out PATH.
The best one can do is once on each line:
P=PATH=/usr/sbin:$$PATH
a:
$P; which faubackup
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[EMAIL PROTE
The Double-Colon Rules Info page needs an example snippet.
I think I figured out a use just from reading the documentation however:
bus8.htm:: #always check for a fresher version
wget -N http://www.fybus.com.tw/bus8.htm
fybus.w3m:bus8.htm
w3m -cols 99 -dump $? > $@
Or an even more
In the info index, these cannot be jumped to with m etc.
* :: rules (double-colon): Double-Colon.
* := <1>:Setting.
* :=:Flavors.
probably because they use Info's colon without quoting or something.
Paul> I don't see how this is a good example of how to use double-colon rules.
Well, with no examples to build from, of course all users can do is
wildly guess.
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Parallel Execution
GNU `make' knows how to execute several commands at once. Normally,
`make' will execute only one command at a time, waiting for it to
finish before executing the next. However, the `-j' or `--jobs' option
tells `make' to execute many commands simultaneously.
Wel
TARGETS : NORMAL-PREREQUISITES | ORDER-ONLY-PREREQUISITES
Well, you got me there. Without examples, we have trouble grasping
how to utilize what this Info page is talking about.
Obviously the authors must have learned about make from something that
we can't find on our Debian system. Probably
The Phony Targets Info node mentions parallel builds, but I don't see
any "&" symbol meaning parallel jobs, nor a make -j. So the node
should clarify it is talking about a different type of parallelism.
P.S., in emacs use show-trailing-whitespace to see trailing blanks
near the bottom of that Info
The messages on submakes aren't perfect.
make[1]: Entering directory `/tmp'
make[1]: Leaving directory `/tmp'
You mean "starting submake 1" and especially "ending submake[1]".
In fact, if one did
bla:
make a& make b&
then they would both be [1], so maybe even mention PID's.
__
Do add an examples showing when
$ make -j x y
and
$ make x& make y& wait
are equivalent, and when they are not.
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Paul> Sometimes features are advanced enough that providing a simple example
Well still, a few-liner showing how
a: b|c
differs from
a: b c
wouldn't hurt.
Paul> under a public license.
I meant you guys must be reading an O'Reilly book or hung out in Bell
Labs or something. There's no way I coul
Paul> I guess I still don't understand Dan's comment, though.
Well for me, make calling several make&'s all in the same directory, I
see lots of messages about how they are entering and leaving that
directory, when in fact they never set foot outside that directory,
and what they really were tryin
Anyways,
$ make x& make y& wait
cannot always be rewritten with -j.
$ make -j[whatever number] x y
will act differently except for special cases of x and y;
probably when both x and y have no dependencies.
Anyways, with -j examples added to the manual, we would get on the
right track about how to
Ok, I guess what I mean by
>> will act differently
is that the internal order of execution is at least different, though
like you say, with properly written Makefiles, the end result should
be the same---which is all that matters---OK. Anyways Howard's
<[EMAIL PROTECTED]> would be great tutorial ma
In the info menu, reading the page at LINE A, it seems to lead into
the tree at LINE B or something. Maybe move LINE A into the LINE B set
or something.
Writing the Commands in Rules
* Echoing:: How to control when commands are echoed.
* Execution:: How comma
Enhance the example in Info:
equivalently, this (*note Summary of Options: Options Summary.):
subsystem:
$(MAKE) -C subdir
by also showing the best way to do this if one has more than one
directory he wants to operate on, e.g., ./dir1, ./dir2 (not ./dir1/dir2)
__
I have discovered how to not put spaces in lines sent to the shell like
a:
echo x\
y
which will normally print "a b". You just do
a:
echo x$(\
)y
The Makefile also stays tidy. This is such a hot discovery that I
"demand" you put something like it into the manual!
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`-s'
`--silent'
`--quiet'
Silent operation; do not print the commands as they are executed.
*Note Command Echoing: Echoing.
Yes well you had better add a note that even though you might have used
make -s insert_rods > master_reactor
for years, when one day it becomes part of a recursive
I recall I used to be able to get away with declaration after the
fact, on line 3 instead of 1:
#B=/erer
a: $B
B=/erer
but nowadays (GNU Make 3.80) I must have it before it is used. Or
maybe it has always been that way.
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Not sure if the Make documentation gives alternatives to using e.g.,
latest.txt: * */* */*/* */*/*/* */*/*/*/* */*/*/*/*/* ...; commands
Perhaps
latest:; find . -newer latest.txt
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The documentation on comments seems to be concentrated on the info
page reading
* `#' in a line of a makefile starts a "comment". It and the rest
OK, but mention how to make a make comment here
bla:
perl -we 'print "Dont want to see ugliness $(C like this comment) here"'
Show what one
Wasteful trailing blanks spotted on one Info page, with cat -e|colrm 21
name1 := $(word
$
include inc.mk$
$
name2 := $(word
$
all:$
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$ make wwwf
: erere
! test -w /
make: !: Command not found
make: *** [wwwf] Error 127
Hold on, both : and ! are shell built-ins. Make doesn't know about
"!"? Sigh, must use sh -c '!'
OK, ! is a reserved word, not a builtin.
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I am downgrading make from 3.80+3.81.b4-1 to 3.80-11
You guys have a new backslash-newline deal that is breaking 1000 of my
scripts. E.g.,
make
perl -pwle '\
BEGIN{print "#jidanni ~root/config auto changed"}\
s/^server pool.ntp.org/#jidanni off $&/;\
END{print "#
Any other surprises planned?
No I can't just change to " from '.
No I don't want to change all my inlines to PERLFUNC=.
OK, I found a style that will work in the old and new make:
krap:
perl -wle 'print 1;'\
'exit(0);'
I now see why python has those future warning messages.
> D
Wait, I find I need to do
bla:
perl -wlne 'if(/^Get:/)[EMAIL PROTECTED];splice(@e,0,3);'"\
"'$$_=join(q{ },@e)}print' zzz
to make it work with both old and new make.
Assuming I don't want to look into the contents, and instead just
modify the front and back of each line.
_
In Info "5.2 Command Execution", be sure the best way of all to avoid
newline accidents:
qz:
perl -we 'print 1$(\
)23'
Works in both make of today and yesterday at least.
Also this: "You may split a long line by inserting a backslash followed
by a newline, but this is not required,
Actually, the problem is on line 73, but make says 71:
$ make jidanni.html
Makefile:71: *** unterminated variable reference. Stop.
$ nl -ba Makefile |sed 70,74!d
70 jidanni.html:~/jidanni.txt.gz
71 > $@
72 echo -e 'http://www.w3.org/TR/html4/strict.dtd";>\n\$(
74
The manual doesn't say how to deal with filenames with colons in them.
$ ls
a e:f
$ cat Makefile
a:e:f
bla
P.S., in the Info index, lines with :: are unchoosable:
byte-code: No such node or anchor: rule, double-colon (
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>> P.S., in the Info index, lines with :: are unchoosable:
>> byte-code: No such node or anchor: rule, double-colon (
EZ> Please give an example of such an index entry in the Make manual (or
EZ> any other manual).
In the make concept index, I hit RET upon
* :: rules (double-colon):
EZ> CC: bug-make@gnu.org
EZ> Anyway, that index entry is invalid: the Texinfo manual forbids index
EZ> entries that have 2 colons in a row. I suggest to report this to the
EZ> Make maintainer.
Didn't we already CC: bug-make@gnu.org ?
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In 5.1.1 Splitting Command Lines, at
Sometimes you want to split a long line inside of single quotes, but
you don't want the backslash-newline to appear in the quoted content.
This is often the case when passing scripts to languages such as Perl,
where extraneous backslashes in
One can set SHELL, but there's no way to get rid of the "-c" in case one
wants too. E.g., one wants to make SHELL=mysql as an experiment etc.
mysql would need a -e, etc.
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>> One can set SHELL, but there's no way to get rid of the "-c" in case one
>> wants too. E.g., one wants to make SHELL=mysql as an experiment etc.
>> mysql would need a -e, etc.
EZ> Doesn't it work to customize shell-file-name and shell-command-switch?
EZ> If not, please report which Emacs functi
Just reading the man and Info pages about what -ns will do isn't clear
from the -n and -s descriptions. Add something.
Also there is no switch to just get a list of targets that will
attempt to be made.
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Gentlemen, I have discovered an excellent way to comment out parts of
lines in makefiles. Be sure you document it somewhere.
All one needs to do is wrap a $( . ) around the code to be commented:
gp:timez1
echo 'set xdata time;set timefmt "%s";$(set format x "%m/%d";\
set timef
$ cat Makefile
.PRECIOUS:.%.time
%.t:.%.time;
.%.time:%
bla bla bla
$ ls -1
Makefile
霧峰-桐林(有經朝陽科技大學) - Wufeng-Tonglin (Via Zhaoyang Technical University)
Well, no amount of quoting will enable me to
$ make '霧峰-桐林(有經朝陽科技大學) - Wufeng-Tonglin (Via Zhaoyang Technical University)'.t
make: *** N
Certainly you could give slightly different messages instead of the
same "I don't know, don't bother me" style message below. Just like we
tell little Johnny "No, but you are getting warmer" instead of just "No".
$ ls
Makefile
$ cat Makefile
%.aa:%.bb
: bla
make u
make: *** No rule to m
Doesn't look like I will get anywhere with filenames with colons in them:
mkallexisting:.???.t .*[:-]*.t .Current_events.t
Makefile:107: *** multiple target patterns. Stop
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In (info "(make) Wildcard Examples")
Wildcard expansion does not happen when you define a variable. Thus,
if you write this:
objects = *.o
then the value of the variable 'objects' is the actual string '*.o'.
However, if you use the value of 'objects' in a target
Idea: --only-make-prerequisites
So
$ make --only-make-prerequisites netsift
would only make myconfdir/$J.pre myconfdir/$J.cf
and stop before the second line of
netsift:myconfdir/$J.pre myconfdir/$J.cf
cat zz > yy
ln q r /etc
--only-make-prerequisites is for folks that want to chec
(info "(make) Automatic Variables") has
'$<' The name of the first prerequisite...
'$?' The names of all the prerequisites that are newer than the target...
'$^' The names of all the prerequisites, with spaces between them...
'$+' This is like '$^', but prerequisites listed more than once are...
'
(info "(make) Rule Syntax") says
The first recipe line may appear on the line after the
prerequisites, with a tab character, or may appear on the same line,
with a semicolon. Either way, the effect is the same.
However,
$ cat Makefile
B:; :; Z
C:
:
Z
$ make B
:
(info "(make) Text Functions") says
'$(subst FROM,TO,TEXT)'
Performs a textual replacement on the text TEXT: each occurrence of
FROM is replaced by TO. The result is substituted for the function
call. For example,
$(subst ee,EE,feet on the street)
produces the val
In (info "(make) Concept Index"), these three items,
* :: rules (double-colon): Double-Colon.(line 6)
* ::=: Flavors. (line 56)
* ::= <1>: Setting. (line 6)
just jump to the first page
I have an idea for something --debug=all won't tell the user.
Have a command that reads in a makefile and outputs the makefile saying
what each part evaluated to.
I.e., what
(info "(make) Parsing Makefiles")
(info "(make) Makefile Contents")
think.
That way the user wouldn't need to ask around w
> "DG" == Dmitry Goncharov writes:
DG> i'd use -p and -n switches.
Thanks. But that still doesn't tell me what the last three lines of my
sample file are interpreted as.
We read
(info "(make) Double-Colon")
but there are no examples shown.
So we have a hard time proceeding.
Please add examples.
In (info "(make) File Name Functions")
be sure to move the paragraph I have marked with X's,
AFTER the example.
'$(notdir NAMES...)'
Extracts all but the directory-part of each file name in NAMES. If
the file name contains no slash, it is left unchanged. Otherwise,
everything thr
$ cat Makefile
%.all.kmz: $(addsuffix .kml, $(addsuffix .$*.lines,0 1) $(addsuffix
.$*.labels,0 1))
ls $*
$ make nnn.all.kmz
Here, upon reaching the colon, the make program already has all the
information it needs to set $* to "nnn".
Alas, it waits until the "ls" line to get around to fin
$ echo \#!/usr/bin/python > k
$ chmod +x k
$ ./k
bash: ./k: cannot execute: required file not found
Bash should really mention what file it is talking about.
$ echo 'x:k; ./$<' > Makefile
$ make
./k
make: ./k: No such file or directory
make: *** [Makefile:1: x] Error 127
$ ls ./k
./k
Make is wor
Regarding
'$(word N,TEXT)'
'$(wordlist S,E,TEXT)'
Maybe allow negative values too, to count from the back of
the list, like perl.
The man and Info pages say different things:
To print the data base without trying to remake any files, use 'make -qp'.
To print the data base without trying to remake any files, use make -p
-f/dev/null.
Also they should mention how to print the database in non-jumbled order.
GNU Make 4.3
(info "(make) Pattern Match") mentions % and $*.
It seems it would be quite useful to remove the artificial limit of a
single %. Then one could use e.g.,
%{1}.x.%{2}.y:%{1}.b.%{2}.c
... $*{1} ... $*{2} #or however they should be written
Sure, "just move your %{1} and %{2} next to each oth
Make warns
warning: overriding recipe for target 'x'
warning: ignoring old recipe for target 'x'
and make also has '--warn-undefined-variables'.
but how about adding '--warn-redefined-variables' too?
(info "(make) Chained Rules") says
The second difference is that if 'make' _does_ create B in order to
update something else, it deletes B later on after it is no longer
needed. Therefore, an intermediate file which did not exist before
'make' also does not exist after 'make
Manual says:
You can list the target pattern of an implicit rule (such as '%.o')
as a prerequisite of the special target '.PRECIOUS' to preserve
intermediate files made by implicit rules whose target patterns match
that file's name; see *note Interrupts::.
Well say which of
.PRECIOUS:
Thanks. OK, the manual should say that
>> .PRECIOUS: %.o
will usually work,
>> .PRECIOUS: *.o
will never work, (unless the file really has an asterisk in its name)
and
>> .PRECIOUS: file.o
will always work.
Regarding
https://www.gnu.org/software/make/manual/html_node/Foreach-Function.html
I have spent hours and hours trying to figure out what you are trying to
say.
Yes I understand the sh, and perl "for" functions just fine.
The problem apparently is your example,
dirs := a b c d
files := $
Make is all about prerequisites.
Well, what about postrequisites?
The documentation should address those too.
OK, show in the manual that one would need at least
two rules, as they would need to be expressed as prerequisites...
Perhaps (info "(make) Echoing") should mention what will happen when
both -s and -n are given on the command line.
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In (info "(make) Appending")
Often it is useful to add more text to the value of a variable already
defined. You do this with a line containing '+=', like this:
objects += another.o
This takes the value of the variable 'objects', and adds the text
'another.o' to it
(info "(make) Environment") says
When 'make' runs a recipe, variables defined in the makefile are
placed into the environment of each shell.
Not true.
KK = 22
p:
env|grep -c KK
gives 0!
This allows you to pass
values to sub-'make' invocations (*note Recursive Use of 'm
> "PS" == Paul Smith writes:
PS> The right way to do this, as with any other variable you want to assign
PS> to itself (PATH is not special), is to use simply-expanded variables
PS> (:=)
PS> PATH := $(PATH):../v4
Ah so on (info "(make) Appending")
Using '+=' is similar to:
objec
(info "(make) Overriding") says
Each time you run 'make', you can override this value if you wish.
For example, if you say 'make CFLAGS='-g -O'', each C compilation
will...
Wouldn't "make CFLAGS='-g -O'" be clearer?
Also add an example of if one should write
make -s CFLAGS='-g -O'
or
mak
On (info "(make) Interrupts") be sure to give an example,
as one finds
.PRECIOUS: %.csv #works
.PRECIOUS: *.csv #doesn't
also it needs to be high up in the Makefile, not on e.g., the last line.
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Sometimes the user just wants -n to always just print, despite the
little $(MAKE) landmines buried deep in a Makefile. (info "(make)
Instead of Execution")
Yes, he doesn't want to worry that the code will explode in his face,
calling up Moscow on the hotline, etc.
Thus I hereby propose that you p
On (info "(make) Automatic Variables") after
'$<'
The name of the first prerequisite. If the target got its recipe
from an implicit rule, this will be the first prerequisite added by
the implicit rule (*note Implicit Rules::).
Please add:
For instead e.g., the fourth prerequ
On (info "(make) Automatic Variables")
please mention which of
M:/dev/null /dev/zero
: $?
: $+
: $^
: $|
are guaranteed to preserve the order. I.e.,
/dev/null /dev/zero not
/dev/zero /dev/null.
and which all bets are off.
Also maybe when people read about
(Info-in
Maybe implement $(reverse)
A = a b c d e
x:
echo $(reverse, $A)
Would give
e d c b a
or at least at
(Info-search "reverse")
This macro simply reverses its arguments:
reverse = $(2) $(1)
foo = $(call reverse,a,b)
mention how to reverse a whole list.
_
> "EW" == Edward Welbourne writes:
EW> Alternatively, simply mention under $< that it's equivalent to
EW> $(word 1,$^) - from which the reasonable reader my interpolate
EW> the rest.
Indeed, and if properly hyperlinked, one click and the user can also
find out about $(wordlist).
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(info "(make) Environment") should mention how equivalent
$ a=b make #and
$ make a=b
are to each other.
See also http://debbugs.gnu.org/29270
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> "EW" == Edward Welbourne writes:
EW> They're not quite equivalent, although an example like the one you give
EW> may be a good one for the documentation to explore in explaining what
EW> the difference is.
Yes that is what I hope will be done.
_
I was hoping somebody who knows the differences would add to the
section. I barely know how to use make.
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In (info "(make) Error Messages")
'warning: overriding recipe for target `XXX''
'warning: ignoring old recipe for target `XXX''
GNU 'make' allows only one recipe to be specified per target
(except for double-colon rules). If you give a recipe for a target
which already has been def
Yes hmm, perhaps just like the 'warnings(3perl)' man page,
one could do different grades, e.g.,
.FATAL_WARNINGS: ALL
etc. And there could be both command line options, and phony targets,
so people could use either one as they pleased.
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Maybe this should produce a warning
$ cat Makefile
m: /tmp/ky
m: /tmp/ky
m: /tmp/ky
m: /tmp/ky
echo ...
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(info "(make) Chained Rules") is great, but it lacks code snippet
examples.
It mentions several features, but all with English prose.
It needs some hard code examples.
And those examples should be independent of those built in for C
compilers, etc.
rm bla.bla # See, bla.bla got re
make: Circular poledata/台中區處pole.csv <- poledata/台中區處pole.csv dependency
dropped.
Great. But please say which line number(s) you are talking about!
Some Makefiles may have many mostly identical lines.
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> "EZ" == Eli Zaretskii writes:
EZ> What version of Make do you have there? The latest versions already
EZ> report the line numbers together with errors.
make --version
GNU Make 4.2.1
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> "EW" == Edward Welbourne writes:
EW> The command-line option would save the need to edit the make-file to be
EW> ready to be used this way, which would be welcome when the make-files
EW> aren't familiar (especially if they're auto-generated and numerous).
Or part of a giant read-only tree,
On (info "(make) Echoing") mention what happens when both -n and -s are
(yes, uselessly) given. (-n wins.)
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I thought targets
A:$D/$(addsuffix .kmz, $L $N)
B:$D/$L.kmz $D/$N.kmz
should do the same.
$ cat makefile
D=X_X_X_X
N=noise
L=light
A:$D/$(addsuffix .kmz, $L $N)
B:$D/$L.kmz $D/$N.kmz
%.kmz:%.kml; minizip -o $@ $?
%.kml:%.kml0; fgrep -v '?xml' $? > $@
%.kml0: n input.txt; mode=$* ./n input.txt > $@
OK you're right. But why is what is on line A influencing this when we
are trying to make B?
$ cat makefile
D=X_X_X_X
N=noise
L=light
A:$D/$(addsuffix .kmz, $L $N)
B:$D/$L.kmz $D/$N.kmz
%.kmz:%.kml; minizip -o $@ $?
%.kml:%.kml0; fgrep -v '?xml' $? > $@
%.kml0: n input.txt; mode=$* ./n input.txt >
Hmmm, well on
https://www.gnu.org/software/make/manual/html_node/Chained-Rules.html
they often say "mentioned in the makefile".
They need to say once: "yes, anywhere in the entire makefile, (except
within comments.)"
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In (info "(make) Concept Index") these three lines
* :: rules (double-colon): Double-Colon.
* ::=: Flavors.
* ::= <1>: Setting.
are not linked.
GNU Make 4.2.1
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>>>>> "EZ" == Eli Zaretskii writes:
>> From: 積丹尼 Dan Jacobson
>> Date: Mon, 15 Apr 2019 21:21:26 +0800
>>
>> In (info "(make) Concept Index") these three lines
>> * :: rules (double-colon): Double-Colon.
OK, on (info "(make) Automatic Variables") has
after
'$<'
The name of the first prerequisite. If the target got its recipe
from an implicit rule, this will be the first prerequisite added by
the implicit rule (*note Implicit Rules::).
add:
To get the name of the second etc. pre
(info "(make) Automatic Variables")
should hyperlink to
(info "(make) Prerequisite Types")
at each place it mentions "order-only prerequisites". Or at least the
first time.
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On (info "(make) Prerequisite Types") it says
There are actually two different types of prerequisites understood by
GNU 'make': normal prerequisites such as described in the previous
section, and "order-only" prerequisites.
So one thinks "Ah, this (two different...) must be specific to GN
(info "(make) Echoing") perhaps should mention what happens when -s and
-n are combined.
Let's take Makefile:
alzu:; echo $@
Blibco:; echo $@
Norfowitz; echo $@
nillsburg; echo $@
Well let's say we want to run all the capital letter items.
We could use
$ make Blibco Norfowitz
but that isn't as smart as
$ make --all-targets-matching-regexp '^[A-Z].*' #Or instead these kinds or
regexp
On the make man page,
-B, --always-make
Unconditionally make all targets.
seems to mean for Makefile
a:; echo $@
b:; echo $@
c:; echo $@
$ make -B
should make all three.
Therefore the wording should be more like the INFO page.
GNU Make 4.3
> "PD" == Pete Dietl writes:
PD> Perhaps a better option would be to make an option to list all
PD> targets.
That would just be e.g.,
perl -nwle 'print for /^\w+:/g;'
PD> Then one can grep to select ones in any which way.
Well OK, I guess all this won't be needing make to add such features
Some -n output is just echoed commands.
Some of it is actually echoed and executed commands.
Document exactly how to tell the difference,
or document that there is no way.
(info "(make) MAKE Variable") still just says
The special feature makes this do what you want: whenever a recipe
line of a rule contains the variable 'MAKE', the flags '-t', '-n' and
'-q' do not apply to that line. Recipe lines containing 'MAKE' are
executed normally despite th
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