Instead of only asserting in the case of the SMU wait time is not what
we expect, add the SMU timeout check and try again.
Signed-off-by: Rodrigo Siqueira
---
.../display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c | 11 ---
.../drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c| 6
Remove break after return since it will never be reached.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
via DMUB
Lewis Huang (1):
drm/amd/display: Only allow dig mapping to pwrseq in new asic
Nicholas Kazlauskas (1):
drm/amd/display: Fix S4 hang polling on HW power up done for VBIOS
DMCUB
Rodrigo Siqueira (6):
drm/amd/display: Remove break after return
drm/amd/display: Initialize variable
The file rv1_clk_mgr_clk.c is not used and for this reason useless. Drop
the unnecessary file.
Signed-off-by: Rodrigo Siqueira
---
.../dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c| 79 ---
1 file changed, 79 deletions(-)
delete mode 100644
drivers/gpu/drm/amd/display/dc/clk_mgr
Set a default value for target_div.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc
The function dcn32_build_wm_range_table call DC_FP_START/END. Drop the
unnecessary FPU guard.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32
lize_drm_device()
Cc: Stable
Reviewed-by: Aurabindo Pillai
Acked-by: Rodrigo Siqueira
Signed-off-by: Wayne Lin
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 37 +--
1 file changed, 18 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
entered, and also to check for 2-lane versuse 4-lane
mode.
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: George Shen
---
.../display/dc/dcn32/dcn32_dio_link_encoder.c | 85 ++-
.../display/dc/dcn32/dcn32_dio_link_encoder.h | 5 ++
2 files changed, 71
https://gitlab.freedesktop.org/drm/amd/-/issues/3122
Reviewed-by: Anthony Koo
Acked-by: Rodrigo Siqueira
Signed-off-by: Lewis Huang
---
.../drm/amd/display/dc/dce/dce_panel_cntl.c | 1 +
.../amd/display/dc/dcn301/dcn301_panel_cntl.c | 1 +
.../amd/display/dc/dcn31/dcn31_panel_cntl.c
From: Nicholas Kazlauskas
[Why]
VBIOS DMCUB firmware doesn't set the dal_fw bit and we end up hanging
waiting for HW power up done because of it.
[How]
Simplify the path and allow mailbox_rdy to be a functional check when
we detect VBIOS firmware.
Reviewed-by: Charlene Liu
Acked-by: Ro
add pointers in the plane state, stream, and
pointers in the stream state to the dc_scratch state and backup and
restore these so the minimal transition can take place successfully.
Reviewed-by: Wenjing Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/core/d
From: Alvin Lee
Subvp bugs related to 8K60 have been fixed, so remove the limit that
blocks 8K60 timings from enabling SubVP.
Reviewed-by: Nevenko Stupar
Reviewed-by: Chaitanya Dhere
Acked-by: Rodrigo Siqueira
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/dml/dcn32
Acked-by: Rodrigo Siqueira
Signed-off-by: Swapnil Patel
---
.../drm/amd/display/dc/dml2/dml2_translation_helper.c| 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c
b/drivers/gpu/drm/amd/display/dc/dml2
r optimization again. All these pipe transitions happen
automatically and quietly when the conditions are met without any visual
impacts to the user.
Reviewed-by: Martin Leung
Acked-by: Rodrigo Siqueira
Signed-off-by: Wenjing Liu
---
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.
From: Ethan Bitnun
Prevent logs during a prepare_bandwidth call to ensure log accuracy.
Reviewed-by: Alvin Lee
Acked-by: Rodrigo Siqueira
Signed-off-by: Ethan Bitnun
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Aric Cyr
[Why]
Nanosec stats can overflow on long running systems potentially causing
statistic logging issues.
[How]
Use 64bit types for nanosec stats to ensure no overflow.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/modules/inc/mod_stats.h
A long time ago, the slab header was added to multiple files in DC. We
also included it in the os_types.h, which is included in many of those
DC files. At this point, there is no need to insert the slab.h header in
multiple files, so this commit drops those includes.
Signed-off-by: Rodrigo
From: Aric Cyr
This version brings along the following:
- Re-enable windowed MPO support for DCN32/321
- Improvements in the subvp feature
- Code clean up
- USB4 fixes
Acked-by: Rodrigo Siqueira
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1
In 2022, we got a great patchset from a GSoC project introducing unit
tests to the amdgpu display. Since version 3, this effort was put on
hold, and now I'm attempting to revive it. I'll add part of the original
cover letter at the bottom of this cover letter, but you can read all
the original mess
From: Tales Aparecida
The fixed31_32 library performs a lot of the mathematical operations
involving fixed-point arithmetic and the conversion of integers to
fixed-point representation.
This unit tests intend to assure the proper functioning of the basic
mathematical operations of fixed-point ar
From: Isabella Basso
This adds tests to the bit encoding format verification functions on the
file. They're meant to be simpler so as to provide a proof of concept on
testing DML code.
Change since v4:
- Use DRM_AMD_DC_FP guard for FPU tests
Signed-off-by: Isabella Basso
Signed-off-by: Maíra C
From: Maíra Canal
KUnit unifies the test structure and provides helper tools that simplify
the development of tests. Basic use case allows running tests as regular
processes, which makes easier to run unit tests on a development machine
and to integrate the tests in a CI system.
This commit intr
From: Maíra Canal
The display_mode_vba library deals with hundreds of display parameters
and sometimes does it in odd ways. The addition of unit tests intends to
assure the quality of the code delivered by HW engineers and, also make
it possible to refactor the code decreasing concerns about addi
From: Maíra Canal
The display_mode_vba_20 deals with hundreds of display parameters for
the DCN20 and sometimes does it in odd ways. The addition of unit tests
intends to assure the quality of the code delivered by HW engineers and,
also make it possible to refactor the code decreasing concerns a
From: Magali Lemes
This commit adds unit tests to the functions dcn20_cap_soc_clocks and
dcn21_update_bw_bounding_box from dcn20/dcn20_fpu.
Signed-off-by: Magali Lemes
Signed-off-by: Maíra Canal
---
.../gpu/drm/amd/display/test/kunit/Makefile | 3 +-
.../test/kunit/dc/dml/dcn20/dcn20_fpu_
From: Maíra Canal
Add a unit test to the SubVP feature in order to avoid possible
regressions and ensure code robustness. In particular, this new test
validates the expected parameters when using 4k144 and 4k240 displays.
Signed-off-by: Maíra Canal
Co-developed-by: Rodrigo Siqueira
Reported
From: Maíra Canal
Explain how to run the KUnit tests present in the AMDGPU's Display
Core and clarify which architectures and tools can be used to run
the tests. Moreover, explains how to add new tests to the existing
tests.
Signed-off-by: Maíra Canal
---
.../gpu/amdgpu/display/display-test.rs
e sink ext caps(HDR,OLED...etc)
Cc: sta...@vger.kernel.org # 6.5.x
Cc: Hamza Mahfooz
Cc: Tsung-hua Lin
Cc: Chris Chi
Cc: Harry Wentland
Tested-by: Daniel Wheeler
Reviewed-by: Sun peng Li
Acked-by: Rodrigo Siqueira
Signed-off-by: Ivan Lipski
---
drivers/gpu/drm/amd/display
):
drm/amd/display: Add a function for checking tmds mode
Eric Bernstein (1):
drm/amd/display: Update FMT settings for 4:2:0
Mikita Lipski (1):
drm/amd/display: Fix PSR command version passed
Nicholas Kazlauskas (1):
drm/amd/display: Pass sequential ONO bit to DMCUB boot options
Rodrigo
From: Sung Joon Kim
Need to update the power sequence to help prevent potential issues like
multi-display or multi-plane.
Reviewed-by: Duncan Ma
Acked-by: Rodrigo Siqueira
Signed-off-by: Sung Joon Kim
---
drivers/gpu/drm/amd/display/dc/hwss/Makefile | 2 +-
.../drm/amd/display/dc/hwss
From: Sung Joon Kim
To reduce the complexity of pipe resource allocation for different
use-cases, now we search for any free pipe sequentially rather than from
bottom up.
Reviewed-by: Wenjing Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: Sung Joon Kim
---
.../dc/resource/dcn32
From: Chris Park
[Why]
DVI is TMDS signal like HDMI but without audio. Current signal check
does not correctly reflect DVI clock programming.
[How]
Define a new signal check for TMDS that includes DVI to HDMI TMDS
programming.
Reviewed-by: Dillon Varone
Acked-by: Rodrigo Siqueira
Signed-off
default to TOPLEFT to maintain same
behaviour as without offset support.
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
Signed-off-by: Samson Tam
---
drivers/gpu/drm/amd/display/dc/dc.h | 3 +++
drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 7 +++
2 files changed, 10 insertions
From: Charlene Liu
Limit the code change for ips enable to reduce the impact for now. Also
exit_ips first before dc_power_down to avoid 0x9f.
Reviewed-by: Chris Park
Acked-by: Rodrigo Siqueira
Signed-off-by: Charlene Liu
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 7 ++-
1 file
From: Nicholas Kazlauskas
[Why]
IPS ono sequence ordering differs based on the ASIC.
[How]
Detect the ASIC ID revision and set the boot option accordingly. Feed
it through the DCN35 DMUB functions.
Reviewed-by: Sung joon Kim
Acked-by: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
with correct derefrence
operations.
Reviewed-by: Aurabindo Pillai
Acked-by: Rodrigo Siqueira
Signed-off-by: Chaitanya Dhere
---
drivers/gpu/drm/amd/display/dc/core/dc_state.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core
Update headers by removing two unecessary headers and include a new one.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 1 +
drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c| 3 ---
.../gpu/drm/amd/display/dc/dcn30
From: Sung Joon Kim
[why]
IPS FSM requires Z10 flag to be enabled to do save and restore the
registers properly.
[how]
Enable Z10 and use the correct function to determine Z10 capability
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
Signed-off-by: Sung Joon Kim
---
.../gpu
Move the scl_data.format to be close to other similar parts.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd
The chip ID DEVICE_ID_NV_13FE is not meaningful and represents a legacy
way of dealing with chip ID. This commit uses dc_version instead of
chip_id and also DCN_VERSION_2_01 instead of DEVICE_ID_NV_13FE.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 2
From: "Bitnun, Ethan"
The previous assumption that there will be an optimize_bandwidth call
following every prepare_bandwidth call was incorrect and caused small
inaccuracies in logging, as some info was only updated in later prepare
calls.
Signed-off-by: Ethan Bitnun
Reviewed-b
ION_1.
Signed-off-by: Mikita Lipski
Reviewed-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 01c75b66e8f1..8eefba757da4 100644
--- a/dr
This commit updates some comments to be more precise and adds another
small comment to some other parts to improve the code readability.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 10 +-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
From: Anthony Koo
Update dmub_cmd to manipulate SDP control in replay FSM, add command
for panel_cntl, expand link rate enum, and increase the reserve byte.
Acked-by: Rodrigo Siqueira
Signed-off-by: Anthony Koo
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 53 ++-
1
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index ee6493a9a79c..5c7e4884cac2 100644
--- a
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c
b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c
index a046664e2031..c1959672df50 100644
This commit groups many parts of the code that are redundant or not used
and drops all of them.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h| 1 -
.../gpu/drm/amd/display/dc/dce/dce_i2c_hw.c| 3 ---
.../amd/display/dc/dcn10/dcn10_link_encoder.h | 6
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc_types.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h
b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 614d7c27c759..0f66d00ef80f 100644
--- a/drivers/gpu/drm/amd/display/dc
This commit remove some unused code and also rename one of the define.
Signed-off-by: Rodrigo Siqueira
---
.../drm/amd/display/dc/dcn10/dcn10_stream_encoder.h| 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10
From: Eric Bernstein
[Why] Update FMT_CONTROL settings based on HW spec
[How] Update FMT settings for 4:2:0
Signed-off-by: Eric Bernstein
Reviewed-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c | 9 -
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h | 2
From: Sung Joon Kim
Rework part of the modifications made to the power sequence and resource
allocation logic.
Reviewed-by: Xi (Alex) Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: Sung Joon Kim
---
.../amd/display/dc/hwss/dcn351/dcn351_init.c | 8 ++---
.../dc/resource/dcn351
Add some missing registers expansion in the dcn201_link_encoder file.
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/dcn201/dcn201_link_encoder.h| 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn201
From: Aric Cyr
This version brings along following fixes:
* Expand dmub_cmd operations.
* Update DVI configuration.
* Modify power sequence.
* Enable Z10 flag for IPS.
* Multiple code cleanups.
Acked-by: Rodrigo Siqueira
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2
Fill ring buffer before offload.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
b/drivers/gpu/drm/amd/display/dc/dcn20
This reverts commit 5aba567a2988400d4e01d44493c84bed92820d8d.
The original patch introduces cursor gamma issue to multiple
Linux compositors. For this reason this commit reverts this change.
Cc: Melissa Wen
Cc: Harry Wentland
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc
Reported-by: Stephen Rothwell
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dcn-blocks.rst | 15 ---
1 file changed, 15 deletions(-)
diff --git a/Documentation/gpu/amdgpu/display/dcn-blocks.rst
b/Documentation/gpu/amdgpu/display/dcn-blocks.rst
index 118aeb9fd2b4.
mple kernel-doc to ensure that ':internal:' does not
have any warning.
Cc: Alex Deucher
Reported-by: Stephen Rothwell
Link:
https://lore.kernel.org/dri-devel/20240715085918.68f5e...@canb.auug.org.au/
Signed-off-by: Rodrigo Siqueira
---
.../gpu/amdgpu/display/dcn-blocks.rst
where the same file path was
duplicated multiple times to a different set of blocks. This commit
addresses this issue by using the correct file path.
Cc: Alex Deucher
Reported-by: Stephen Rothwell
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dcn-blocks.rst | 8 ---
ion/gpu/amdgpu/display/display-manager.rst:3:
WARNING: Duplicate C declaration, also defined at
gpu/amdgpu/display/dcn-blocks:3.
Declaration is '.. c:enum:: mpcc_alpha_blend_mode'.
I tested it on amd-staging-drm-next.
Cc: Alex Deucher
Cc: Stephen Rothwell
Thanks
Siqueira
Rodrigo S
adding a simple kernel-doc to a struct
in the opp.h and the dpp.h files.
Cc: Alex Deucher
Reported-by: Stephen Rothwell
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 22 -
drivers/gpu/drm/amd/display/dc/inc/hw/opp.h | 15 ++
2
The dchubbub.h and hubp.h do not have any meaningful documentation; for
this reason, this commit removes those files from the dcn-blocks
documentation.
Cc: Alex Deucher
Reported-by: Stephen Rothwell
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dcn-blocks.rst | 6
ifiers'
option in the dcn-blocks to avoid duplication with the previous use of
this function doc in the display-manager file. Finally, replaces the
deprecated ':function:' in favor of ':identifiers:'.
Cc: Alex Deucher
Reported-by: Stephen Rothwell
Signed-off-by: Rodrigo S
or dp tunneling
Nicholas Kazlauskas (3):
drm/amd/display: Request 0MHz dispclk for zero display case
drm/amd/display: Add seamless boot support for more DIG operation
modes
drm/amd/display: Use gpuvm_min_page_size_kbytes for DML2 surfaces
Rodrigo Siqueira (9):
drm/amd/display: Re-order e
- unchanged from when it was first
introduced - to properly identify the HUBP instance from the OTG
instance, rather than just assume direct mapping.
Signed-off-by: Leo Li
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 36
cern, since any register access will kick
hw out of idle optimizations. But we'll do it early for correctness.
Signed-off-by: Leo Li
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 12 +---
1 file changed, 9 i
any state so the
real clock value ends up as 1200Mhz - the maximum.
[How]
Set to 0 instead of the minimum value in the state array.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Duncan Ma
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c | 2 +-
1 file
From: Chris Park
[Why]
When only 4 I2C is declared, two dummies are required to correctly map
GPIO port.
[How]
Add one more I2C dummy entry to match GPIO port.
Signed-off-by: Chris Park
Reviewed-by: Alvin Lee
Signed-off-by: Rodrigo Siqueira
---
.../display/dc/gpio/dcn401/hw_factory_dcn401
From: Bhuvanachandra Pinninti
Moved files to respective folders to improve DIO code.
Signed-off-by: Bhuvanachandra Pinninti
Reviewed-by: Martin Leung
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/Makefile| 1 -
drivers/gpu/drm/amd/display/dc/dcn301/Makefile
From: Alvin Lee
Use debug option for disabling unbounded req in DML21
Signed-off-by: Alvin Lee
Reviewed-by: Austin Zheng
Signed-off-by: Rodrigo Siqueira
---
.../drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c | 5 +
1 file changed, 5 insertions(+)
diff --git
a/drivers/gpu/drm
rity.
Signed-off-by: Alex Hung
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/resource/dcn32/dcn32_resource_helpers.c| 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.
From: Alex Hung
[WHAT & HOW]
dc_link is null checked previously in the same function, indicating it
might be null as reported by Coverity.
This fixes 1 FORWARD_NULL issue reported by Coverity.
Signed-off-by: Alex Hung
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Rodrigo Siqu
From: Charlene Liu
[why]
immediate_disable_crtc does not reset ODM. if switching to disable_crtc
which will disable ODM as well. i.e. need to restore ODM mem cfg at
reenable it at end of w/a.
Signed-off-by: Charlene Liu
Reviewed-by: Xi (Alex) Liu
Signed-off-by: Rodrigo Siqueira
From: Alex Hung
[WHAT & HOW]
dc_state_get_stream_status can return null, and therefore null must be
checked before stream_status is used.
This fixes 1 NULL_RETURNS issue reported by Coverity.
Signed-off-by: Alex Hung
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Rodrigo Siqueira
---
dri
From: Tom Chung
[Why & How]
Add a missing PSR state to make the dmub_psr_get_state() return a
correct PSR state.
Signed-off-by: Tom Chung
Reviewed-by: Sun peng Li
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc_types.h | 1 +
drivers/gpu/drm/amd/display/dc
From: Charlene Liu
[why]
dmubfw added a new event type, update amdgpu to avoid "notify type 6
invalid"
Signed-off-by: Charlene Liu
Reviewed-by: Chris Park
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
1 file changed, 1 insertion(+)
nto self-refresh mode.
[How]
Reset the VRR config during resume to force update the VRR config later.
Fixes: f8ebe6341a6a ("drm/amd/display: Reset freesync config before update new
state")
Signed-off-by: Tom Chung
Reviewed-by: Sun peng Li
Signed-off-by: Rodrigo Siqueira
---
driver
From: Ilya Bakoulin
Need to use cm3_helper function with DCN401 to avoid cases where high
RGB component values can get set to zero if using the TF curve generated
by cm_helper.
Signed-off-by: Ilya Bakoulin
Reviewed-by: Alvin Lee
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/hwss
ot to continue.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Duncan Ma
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 12 ++--
.../dc/dio/dcn35/dcn35_dio_stream_encoder.c | 19 +++
.../amd/display/dc/inc/hw/stream_encoder.h| 1
INTEGER_OVERFLOW issues reported by Coverity.
Signed-off-by: Alex Hung
Reviewed-by: Wenjing Liu
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 2 +-
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c | 3 ++-
drivers/gpu/drm/amd/display
From: Cruise
The DP tunnel AUX reply is received through Outbox1. Print the Outbox1
status if an issue occurs.
Signed-off-by: Cruise
Reviewed-by: Nicholas Kazlauskas
Reviewed-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 3
From: Hansen Dsouza
Add new enable and disable functions based on DCCG spec.
Signed-off-by: Hansen Dsouza
Reviewed-by: Muhammad Ahmed
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 212 ++
1 file changed, 212 insertions(+)
diff --git a
From: Alex Hung
Functions get_per_method_common_meta and get_expanded_strategy_list can
return null and thus it is necessary to check their returned values
before dereferencing.
This fixes 3 NULL_RETURNS issues reported by Coverity.
Signed-off-by: Alex Hung
Reviewed-by: Rodrigo Siqueira
structures to
propagate the new/correct value. Fixes issue
Signed-off-by: Daniel Sa
Reviewed-by: Alvin Lee
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
ff-by: Nicholas Kazlauskas
Reviewed-by: Jun Lei
Signed-off-by: Rodrigo Siqueira
---
.../display/dc/dml2/dml2_translation_helper.c | 20 +--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c
b/drivers/gpu/dr
From: Meenakshikumar Somasundaram
[Why]
Aux transfer retries path does not support dp tunneling.
[How]
Based on ddc pin check, aux will be issued in legacy path or dmub.
Signed-off-by: Meenakshikumar Somasundaram
Reviewed-by: Eric Yang
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm
SPL has a control field for controlling the two pixels per container
that is not in use yet. This commit adds a proper initialization for
this feature.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc_spl_translate.c | 1 +
1 file changed, 1
From: Cruise
The link index wasn't updated for the AUX reply notification. Get link
index based on DPIA instance for AUX reply notification.
Signed-off-by: Cruise
Reviewed-by: Meenakshikumar Somasundaram
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_stat.
f-by: Alex Hung
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c | 2 +-
.../gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
a/drivers
Move the lb_memory_config close to the pixel format enums to improve the
code readability.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/spl/dc_spl_types.h | 32 +--
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a
From: Hansen Dsouza
Add new enable and disable functions based on DCCG spec.
Signed-off-by: Hansen Dsouza
Reviewed-by: Muhammad Ahmed
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 54 ++-
1 file changed, 53 insertions(+), 1 deletion
ssed. This commit replaces the old dm_execute_dmub_cmd with
dc_wake_and_execute_dmub_cmd.
Fixes: c2cec7a872b6 ("drm/amd/display: Wake DMCUB before sending a command for
replay feature")
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dce/dmub
his fixes 1 REVERSE_INULL issue reported by Coverity.
Signed-off-by: Alex Hung
Reviewed-by: Rodrigo Siqueira
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
.../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
From: Sung Lee
[WHY]
Cursor position code had improper offsets in scaled modes.
[HOW]
Adjust cursor scaling to account for cursor offsets properly.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Sung Lee
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/hubp/dcn401
From: Alvin Lee
P-State force programming is handled entirely by FW in FAMS2. Remove
any programming from driver side to prevent incorrect programming from
driver side (which may override FW programming)
Signed-off-by: Alvin Lee
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Rodrigo Siqueira
Initialize the field dcc_meta_propagation_delay_us with 10 ms.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401
Add missing register programming for mcache in DCN401.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/resource
DCN_MINIMUM_DISPCLK_Khz and DCN_MINIMUM_DPPCLK_Khz is declared twice.
This commit removes that duplication.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm
Add missing debug registers for DCN32.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
b
From: Aric Cyr
This version brings along the following:
- SPL improvements.
- Address coverity issues.
- DML2 fixes.
- Code cleanup.
- DIO and DCCG refactor.
- Improve the PSR state.
Signed-off-by: Aric Cyr
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm
Remove function pointers that were never used.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/inc/hw/transform.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/transform.h
b/drivers/gpu/drm
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