Adding the BO and it's mapping is VM specific code, we should initialize
that directly in amdgpu_vm_init() and not call any helper to delegate
the work.
Especially don't call from the VM code into the virt code and back into
the VM code.
If you really want to keep that in amdgpu_virt. an alt
We don't need the validate buffer and even when you need it putting it
into the VM structure is illegal, because it can be used by more than
one thread at the same time.
This leaves only the csa_bo_va in the amdgpu_vm_virt structure and
having a structure with only one field is rather pointles
Am 10.01.2017 um 04:03 schrieb Liu, Monk:
> + /* virtual MC address of CSA & GDS for each VM */
> + uint64_t vm_csa_addr;
> + uint64_t vm_gds_addr;
That should be constant, shouldn't it?
[ML] do you mean "const uint64_t vm_csa_addr" ? of cause not if that's
your point ... compil
then what about "amdgpu_vm_bo_map" ? we need call it first before call
"amdgpu_vm_bo_update" in "amdgpu_bo_vm_update_pte" , correct ? otherwise we
even not create PT bo for the CSA ...
Do you suggest that rip out of amdgpu_map_csa() routine totally, and manually
call "amdgpu_vm_bo_map" as well
This patch series will enable AMD GPU virtualization and wires it
into amdgpu modules.
Changes in V2:
1. define new high level interface for non-asic specific;
2. add asic specific file to support specific asic;
3. not include KIQ patch as it has been merged into kernel;
4. not include CSA patch a
Add high level interfaces that is not relate to specific asic. So
asic files just need to implement the interfaces to support
virtualization.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 57
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
During virtual runtime, need to send command to kiq ring to
read/write GPU registers. Add two interface to support the two
actions.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 2 ++
2 files changed, 4 insertions(+)
Implement emit_rreg/wreg function for kiq ring.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c| 37
2 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/a
VI has asic specific virt support, which including mailbox and
golden registers init.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 3 +
drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c| 592 +
For gpu vf device, first need to request full gpu access before
accessing gpu registers, and release full gpu access after the
access is done.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 6 ++
2 files
Virtual display is default setting for virtualization, enable it.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index f32a789..5
Virtualization don't need the dc, disable it.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 03d28a1..a6d828c 100644
Add new flag to define gpu runtime that is out of full gpu access.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index a6524bb.
Call VI virtualization functions if device is Vf.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/vi.c | 34 --
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index dc0d4
Current job timeout setting is not fit for virtualization, so it
will cause job timeout sometimes. Add workaround for this when
timeout happen.
Signed-off-by: Monk Liu
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --gi
Hi Alex,
>>> This will set the caps on Polaris10 as well? Intended?
Rex: Yes, Currently, New didt messages were only supported on Polaris11.
Best Regards
Rex
-Original Message-
From: Deucher, Alexander
Sent: Monday, January 09, 2017 10:12 PM
To: Zhu, Rex; amd-gfx@lists.freedesktop.
For virtualization, it is must for driver to use KIQ to access
registers when it is out of GPU full access mode.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c |
NAH, for AI/VI the gds_addr is the bottom half of CSA area (8kb), but we don't
know for later chips ...
I prefer keep a member field in the struct for flexibility ...
regards with put those member into amdgpu_vm structure, if you really prefer
that way I'm fine by moving them, not too importa
Yeah, make sense
thanks
BR Monk
发件人: Nils Wallménius
发送时间: 2017年1月10日 15:56:36
收件人: Liu, Monk
抄送: amd-gfx@lists.freedesktop.org
主题: Re: [PATCH 6/7] drm/amdgpu:alloc/dealloc csa accordingly
Hi Monk, a comment below.
Den 9 jan. 2017 9:07 fm skrev "Monk Liu"
Xiangliang,
the comments of yours is a little inappropriate, please change the comments to
something like:
amdgpu_gpu_reset() only works on bare-metal case and for SRIOV many inside it
need re-work to adapt to VF device
so currently just don't do it.
发件人: am
and implement CSA functions in this file
Change-Id: Ife0eff7b13b8b5946f005a39f6ecb8db1cb72c38
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 ++
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/dr
for SRIOV usage, CSA is only used per device and each
VM will map on it.
Change-Id: Ibc63d87be59d7d89b96117e4d1b7e970a872580d
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 105 +++
drivers/gpu
Change-Id: I110af93c4f17ab18d1be199c6ebe9ee965483a66
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 6 ++
drivers/gpu/drm/amd/amdgpu/vi.c
allocate/deallocate static CSA per device
and map CSA per VM
no need to unmap CSA when VM die.
*** BLURB HERE ***
Monk Liu (3):
drm/amdgpu:new field members for SRIOV
drm/amdgpu:add new file for SRIOV
drm/amdgpu:invoke CSA functions
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +-
dri
free bo_va and put fence right before VM finish
Change-Id: I56967e424c888c0df0b12c522e6720a1d11ab790
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/
can fix Bug 191281: vce ib test failed.
when vce idle, set vce clock gate, so the clock
in vce domain will be disabled.
when need to encode, disable vce clock gate,
enable the clocks to vce engine.
Change-Id: Ic60eced7be0c1e09faca596d39ebdfde244657a2
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/a
Do you suggest that rip out of amdgpu_map_csa() routine totally,
Yes, mapping the CSA is not something specific to virtualization, so we
shouldn't put that into amdgpu_virt.c.
and manually call "amdgpu_vm_bo_map" as well as "amdgpu_vm_bo_update"
in sequence in "amdgpu_vm_bo_update" ?
No, du
NAH, for AI/VI the gds_addr is the bottom half of CSA area (8kb), but
we don't know for later chips ...
In this case we shouldn't store the offset anywhere, but rather just
calculate it in the chip specific code from the CSA address when it is
needed.
I prefer keep a member field in the str
Am 10.01.2017 um 11:00 schrieb Xiangliang Yu:
For virtualization, it is must for driver to use KIQ to access
registers when it is out of GPU full access mode.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6
Am 10.01.2017 um 11:00 schrieb Xiangliang Yu:
Add high level interfaces that is not relate to specific asic. So
asic files just need to implement the interfaces to support
virtualization.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 57 ++
Unrelated to the patch, but what editor and settings do you use?
See this code for example
+ reg = REG_SET_FIELD(reg, MAILBOX_CONTROL,
+TRN_MSG_VALID, val ? 1 : 0);
The indentation seems to be incorrect.
Not much of a problem, but if we add this like it i
Am 10.01.2017 um 11:00 schrieb Xiangliang Yu:
Current job timeout setting is not fit for virtualization, so it
will cause job timeout sometimes. Add workaround for this when
timeout happen.
Signed-off-by: Monk Liu
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |
Am 10.01.2017 um 14:20 schrieb Yu, Xiangliang:
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Tuesday, January 10, 2017 9:16 PM
To: Yu, Xiangliang ; amd-
g...@lists.freedesktop.org
Subject: Re: [V2 06/11] drm/amdgpu/virt: implement VI virt operation
interf
> -Original Message-
> From: Christian König [mailto:deathsim...@vodafone.de]
> Sent: Tuesday, January 10, 2017 9:12 PM
> To: Yu, Xiangliang ; amd-
> g...@lists.freedesktop.org
> Subject: Re: [V2 05/11] drm/amdgpu/virt: add high level interfaces for virt
>
> Am 10.01.2017 um 11:00 schrieb
> -Original Message-
> From: Christian König [mailto:deathsim...@vodafone.de]
> Sent: Tuesday, January 10, 2017 9:16 PM
> To: Yu, Xiangliang ; amd-
> g...@lists.freedesktop.org
> Subject: Re: [V2 06/11] drm/amdgpu/virt: implement VI virt operation
> interfaces
>
> Unrelated to the patch, b
> -Original Message-
> From: Christian König [mailto:deathsim...@vodafone.de]
> Sent: Tuesday, January 10, 2017 9:19 PM
> To: Yu, Xiangliang ; amd-
> g...@lists.freedesktop.org
> Cc: Liu, Monk
> Subject: Re: [V2 11/11] drm/amdgpu: do not reset gpu for virtualization
>
> Am 10.01.2017 um 1
Program HardMin based on the vce_arbiter.ecclk
if ecclk is 0, disable ECLK DPM 0. Otherwise VCE
could hang if switching SCLK from DPM 0 to 6/7
Change-Id: Ied5b1630a0322678601cf5744bd1ba6b3b42ca23
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 24 -
> -Original Message-
> From: Christian König [mailto:deathsim...@vodafone.de]
> Sent: Tuesday, January 10, 2017 9:30 PM
> To: Yu, Xiangliang ; amd-
> g...@lists.freedesktop.org
> Subject: Re: [V2 06/11] drm/amdgpu/virt: implement VI virt operation
> interfaces
>
> Am 10.01.2017 um 14:20 sc
Am 10.01.2017 um 14:33 schrieb Yu, Xiangliang:
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Tuesday, January 10, 2017 9:12 PM
To: Yu, Xiangliang ; amd-
g...@lists.freedesktop.org
Subject: Re: [V2 05/11] drm/amdgpu/virt: add high level interfaces for virt
> -Original Message-
> From: Christian König [mailto:deathsim...@vodafone.de]
> Sent: Tuesday, January 10, 2017 9:09 PM
> To: Yu, Xiangliang ; amd-
> g...@lists.freedesktop.org
> Subject: Re: [V2 04/11] drm/amdgpu/virt: use kiq to access registers
>
> Am 10.01.2017 um 11:00 schrieb Xiangli
Am 10.01.2017 um 14:43 schrieb Yu, Xiangliang:
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Tuesday, January 10, 2017 9:30 PM
To: Yu, Xiangliang ; amd-
g...@lists.freedesktop.org
Subject: Re: [V2 06/11] drm/amdgpu/virt: implement VI virt operation
interf
Am 10.01.2017 um 15:01 schrieb Yu, Xiangliang:
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Tuesday, January 10, 2017 9:09 PM
To: Yu, Xiangliang ; amd-
g...@lists.freedesktop.org
Subject: Re: [V2 04/11] drm/amdgpu/virt: use kiq to access registers
Am 10
> -Original Message-
> From: Christian König [mailto:deathsim...@vodafone.de]
> Sent: Tuesday, January 10, 2017 10:08 PM
> To: Yu, Xiangliang ; amd-
> g...@lists.freedesktop.org
> Subject: Re: [V2 04/11] drm/amdgpu/virt: use kiq to access registers
>
> Am 10.01.2017 um 15:01 schrieb Yu, Xi
> -Original Message-
> From: Christian König [mailto:deathsim...@vodafone.de]
> Sent: Tuesday, January 10, 2017 10:06 PM
> To: Yu, Xiangliang ; amd-
> g...@lists.freedesktop.org
> Subject: Re: [V2 06/11] drm/amdgpu/virt: implement VI virt operation
> interfaces
>
> Am 10.01.2017 um 14:43 s
> -Original Message-
> From: Christian König [mailto:deathsim...@vodafone.de]
> Sent: Tuesday, January 10, 2017 9:59 PM
> To: Yu, Xiangliang ; amd-
> g...@lists.freedesktop.org
> Subject: Re: [V2 05/11] drm/amdgpu/virt: add high level interfaces for virt
>
> Am 10.01.2017 um 14:33 schrieb
Ack. Just give Harry a few days to do the require work to make sure everything
still work with our other OS / environments.
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Dave
Airlie
Sent: Monday, January 9, 2017 6:34 PM
To: amd-gfx@lists.f
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Yu, Xiangliang
> Sent: Tuesday, January 10, 2017 8:36 AM
> To: Christian König; amd-gfx@lists.freedesktop.org
> Cc: Liu, Monk
> Subject: RE: [V2 11/11] drm/amdgpu: do not reset gpu for virtual
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Tuesday, January 10, 2017 5:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 01/11] drm/amdgpu/ring: add two interfaces to support r/w
> regi
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Tuesday, January 10, 2017 5:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 03/11] drm/amdgpu/virt: add runtime flag
>
> Add new flag to de
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Tuesday, January 10, 2017 5:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 02/11] drm/amdgpu/gfx8: implement emit_rreg/wreg function
>
> I
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Tuesday, January 10, 2017 5:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 05/11] drm/amdgpu/virt: add high level interfaces for virt
>
>
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Tuesday, January 10, 2017 5:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 06/11] drm/amdgpu/virt: implement VI virt operation interfaces
>
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Tuesday, January 10, 2017 5:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 07/11] drm/amdgpu: request/release full gpu access if device is
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Tuesday, January 10, 2017 5:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 08/11] drm/amdgpu/vi: add support virtualization
>
> Call VI vi
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Tuesday, January 10, 2017 5:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 09/11] drm/amdgpu/virt: enable virtual display
>
> Virtual disp
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Tuesday, January 10, 2017 5:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 10/11] drm/amdgpu/virt: disable dc
>
> Virtualization don't nee
> -Original Message-
> From: Deucher, Alexander
> Sent: Tuesday, January 10, 2017 11:35 PM
> To: Yu, Xiangliang ; amd-
> g...@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: RE: [V2 02/11] drm/amdgpu/gfx8: implement emit_rreg/wreg
> function
>
> > -Original Message-
> > From
On 2017-01-10 10:20 AM, Cheng, Tony wrote:
Ack. Just give Harry a few days to do the require work to make sure everything
still work with our other OS / environments.
Reviewed-by: Harry Wentland
You should see this land in Alex's public tree in a few days.
Harry
-Original Message---
Reviewed-by: Harry Wentland
On 2017-01-09 08:36 PM, Edward O'Callaghan wrote:
Reviewed-by: Edward O'Callaghan
On 01/10/2017 09:35 AM, Dave Airlie wrote:
From: Dave Airlie
These aren't needed, and aren't really used in too many places.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/amd/d
Hi Ray,
Small nit but I saw this in the output
+ {AMD_CG_SUPPORT_GFX_CGTS, "Graphics Coarse Grain Tree Shader Light
Sleep"},
+ {AMD_CG_SUPPORT_GFX_CGTS_LS, "Graphics Coarse Grain Tree Shader Light
Sleep"},
The first you probably want to remove "Light Sleep" from otherwise the out
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Tuesday, January 10, 2017 8:28 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH] drm/amd/powerplay: refine vce dpm update code on Cz.
>
> Program HardMi
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Tuesday, January 10, 2017 6:43 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH] drm/amd/powerplay: fix vce cg logic error.
>
> can fix Bug 191281: vce
Fixes: 9e8590861e9 ('drm/amdgpu: add parse clock gating state')
Reported-by: Tom StDenis
Signed-off-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu/am
*** BLURB HERE ***
Monk Liu (3):
drm/amdgpu:new field members for SRIOV
drm/amdgpu:add new file for SRIOV
drm/amdgpu:invoke CSA functions
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |
and implement CSA functions in this file
Change-Id: Ife0eff7b13b8b5946f005a39f6ecb8db1cb72c38
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 8
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/a
> + fence_get(f);
> + amdgpu_ring_commit(ring);
> + mutex_unlock(&adev->virt.lock);
> +
> + r = fence_wait(f, false);
> + fence_put(f);
Why do you grab and release an extra fence reference here?
Christian.
[ML] e.g. without those grab/release pare, if fence is signaled right
Change-Id: I528c2f324830aaa21ab8d8250bc80a2a6bab33bd
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 11 +++
drivers/gpu/drm/amd/amdgpu/vi
for SRIOV usage, CSA is only used per device and each
VM will map on it.
Change-Id: Ibc63d87be59d7d89b96117e4d1b7e970a872580d
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 95
drivers/gpu/
> + mutex_lock(&adev->virt.lock);
> + amdgpu_ring_alloc(ring, 32);
> + amdgpu_ring_emit_hdp_flush(ring);
> + amdgpu_ring_emit_rreg(ring, reg);
> + amdgpu_ring_emit_hdp_invalidate(ring);
> + amdgpu_fence_emit(ring, &f);
> + fence_get(f);
> + amdgpu_ring_commit(ring);
Change-Id: I1495894d01ca10e5d496e71f5d4b1a93a12336f3
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index e3bad82d..0ac4983 100644
-
need to clear bit31-29 in GRBM_GFX_INDEX,
then the program can be valid.
Change-Id: I6f59b4fd53b4a1ea00c60139924cfaffd0cfe968
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 25 -
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/drivers/gp
Change-Id: I9fcdb4bc69e5f5c80eadb1e5fd31570802b0ce70
Signed-off-by: Flora Cui
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 23 +--
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index
On Wed, Jan 11, 2017 at 03:01:12AM +0800, StDenis, Tom wrote:
> Hi Ray,
>
>
> Small nit but I saw this in the output
>
>
> + {AMD_CG_SUPPORT_GFX_CGTS, "Graphics Coarse Grain Tree Shader Light
> Sleep"},
> + {AMD_CG_SUPPORT_GFX_CGTS_LS, "Graphics Coarse Grain Tree Shader Light
>
Hi all,
two fixes for locking issues that I noticed.
The first one is something that I actually encountered live; it probably
only matters when lock debugging is enabled, but obviously needs to be fixed
anyway.
The second one I only noticed upon reading the code -- I haven't seen it
fail live ye
From: Nicolai Hähnle
Unlock the resv lock only if we were the ones to lock it in the first
place.
Signed-off-by: Nicolai Hähnle
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/dri
From: Nicolai Hähnle
ttm_bo_init checks that the reservation object is locked. This is
the caller's responsibility when resv != NULL. Otherwise, the inline
reservation object of the newly allocated buffer is used and must
explicitly be locked. Using a trylock is fine, since nobody else
has a refe
this series is,
Reviewed-by: Edward O'Callaghan
On 01/11/2017 06:31 PM, Nicolai Hähnle wrote:
> Hi all,
>
> two fixes for locking issues that I noticed.
>
> The first one is something that I actually encountered live; it probably
> only matters when lock debugging is enabled, but obviously need
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