[PATCH] drm/amdgpu: Remove unnecessary register program in SRIOV

2022-10-31 Thread Peng Ju Zhou
Remove unnecessary register program in SRIOV Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c index ff738e9725ee..6aa02d835ecb

[PATCH v2] drm/amdgpu: Enable second VCN for certain Navy Flounder.

2022-01-05 Thread Peng Ju Zhou
Certain Navy Flounder cards have 2 VCNs, enable it. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

[PATCH] drm/amdgpu: Enable second VCN for certain Navi2x.

2022-01-05 Thread Peng Ju Zhou
Certain navi2x cards have 2 VCNs, enable it. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index

[PATCH] drm/amdgpu: Add MB_REQ_MSG_READY_TO_RESET response when VF get FLR notification.

2021-08-09 Thread Peng Ju Zhou
: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 2 ++ drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c index b48e68f46a5c..a35e6d87e537 100644 --- a

[PATCH v2] drm/amdgpu: Extend full access wait time in guest

2021-08-08 Thread Peng Ju Zhou
From: Victor Zhao - Extend wait time and add retry, currently 6s * 2times - Change timing algorithm Signed-off-by: Victor Zhao Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers

[PATCH] drm/amdgpu: Extend full access wait time in guest

2021-08-08 Thread Peng Ju Zhou
From: Victor Zhao - Extend wait time and add retry, currently 3s * 4times - Change timing algorithm Signed-off-by: Victor Zhao Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers

[PATCH] drm/amdgpu: Add driver version

2021-08-03 Thread Peng Ju Zhou
From: David M Nieto This sysfs is only defined in DKMS drivers it exposes the internal AMDGPU version Signed-off-by: David M Nieto Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2659 +++- 1 file changed, 941 insertions(+), 1718 deletions

[PATCH] drm/amdgpu: add done BO list

2021-08-03 Thread Peng Ju Zhou
From: David M Nieto backport of "add a list in VM for BOs in the done state" Signed-off-by: David M Nieto Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1196 +++- 1 file changed, 561 insertions(+), 635 deletions(-) diff --git a/drive

[PATCH v2] drm/amd/amdgpu: Recovery vcn instance iterate.

2021-07-13 Thread Peng Ju Zhou
The previous logic is recording the amount of valid vcn instances to use them on SRIOV, it is a hard task due to the vcn accessment is based on the index of the vcn instance. Check if the vcn instance enabled before do instance init. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu

[PATCH] drm/amd/amdgpu: Recovery vcn instance iterate.

2021-07-12 Thread Peng Ju Zhou
environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 25 + 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c index c3580de3ea9c..954ab7e76926 100644

[PATCH v5] drm/amdgpu: Restore msix after FLR

2021-07-07 Thread Peng Ju Zhou
From: "Emily.Deng" After FLR, the msix will be cleared, so need to re-enable it. Signed-off-by: Emily.Deng Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/am

[PATCH v4] drm/amdgpu: Restore msix after FLR

2021-07-02 Thread Peng Ju Zhou
From: "Emily.Deng" After FLR, the msix will be cleared, so need to re-enable it. Signed-off-by: Emily.Deng Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgp

[PATCH v3] drm/amdgpu: Restore msix after FLR

2021-06-25 Thread Peng Ju Zhou
From: "Emily.Deng" After FLR, the msix will be cleared, so need to re-enable it. Signed-off-by: Emily.Deng Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgp

[PATCH v2] drm/amdgpu: Restore msix after FLR

2021-06-24 Thread Peng Ju Zhou
From: "Emily.Deng" After FLR, the msix will be cleared, so need to re-enable it. Signed-off-by: Emily.Deng Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgp

[PATCH] SWDEV-254814 drm/amdgpu: Restore msix after FLR

2021-06-23 Thread Peng Ju Zhou
From: "Emily.Deng" After FLR, the msix will be cleared, so need to re-enable it. Signed-off-by: Emily.Deng --- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu

[PATCH v3] drm/amd/amdgpu: Use IP discovery data to determine VCN enablement instead of MMSCH

2021-06-17 Thread Peng Ju Zhou
From: Bokun Zhang In the past, we use MMSCH to determine whether a VCN is enabled or not. This is not reliable since after a FLR, MMSCH may report junk data. It is better to use IP discovery data. Signed-off-by: Bokun Zhang Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu

[PATCH v2] drm/amd/amdgpu: Use IP discovery data to determine VCN enablement instead of MMSCH

2021-06-15 Thread Peng Ju Zhou
From: Bokun Zhang In the past, we use MMSCH to determine whether a VCN is enabled or not. This is not reliable since after a FLR, MMSCH may report junk data. It is better to use IP discovery data. Signed-off-by: Bokun Zhang Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu

[PATCH] drm/amdgpu: Fixing "Indirect register access for Navi12 sriov" for vega10

2021-06-07 Thread Peng Ju Zhou
The NV12 and VEGA10 share the same interface W/RREG32_SOC15*, the callback functions in these macros may not be defined, so NULL pointer must be checked but not in macro __WREG32_SOC15_RLC__, fixing the lock of NULL pointer check. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu

[PATCH 2/2] drm/amd/amdgpu: add instance_number check in amdgpu_discovery_get_ip_version

2021-06-03 Thread Peng Ju Zhou
, the original amdgpu_discovery_get_ip_version cannot correct reflects the result and returns false information Signed-off-by: Bokun Zhang Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h | 2 +- 2 files changed

[PATCH 1/2] drm/amd/amdgpu: Use IP discovery data to determine VCN enablement instead of MMSCH

2021-06-03 Thread Peng Ju Zhou
From: Bokun Zhang In the past, we use MMSCH to determine whether a VCN is enabled or not. This is not reliable since after a FLR, MMSCH may report junk data. It is better to use IP discovery data. Signed-off-by: Bokun Zhang Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/vcn_v3_0

[PATCH] drm/amdgpu: Change IP init sequence to support PSP program IH_RB_CNTL on NV12 SRIOV

2021-05-25 Thread Peng Ju Zhou
To enable PSP program IH_RB_CNTL, the PSP IP should be initialized before IH IP, otherwise, it will hit psp NULL pointer. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/nv.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c

[PATCH v5 09/10] drm/amdgpu: Use PSP to program IH_RB_CNTL* registers

2021-05-17 Thread Peng Ju Zhou
use psp to program IH_RB_CNTL* if indirect access for ih enabled in SRIOV environment. Signed-off-by: Victor Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 19 +-- drivers/gpu/drm/amd/amdgpu/nv.c| 2 +- 2 files changed, 18 insertions(+), 3

[PATCH v5 10/10] drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV

2021-05-17 Thread Peng Ju Zhou
KMD should not program these registers, the value were defined in the host, so skip them in the SRIOV environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v5 08/10] drm/amdgpu: Modify MMHUB register access from MMIO to RLCG in file mmhub_v2*

2021-05-17 Thread Peng Ju Zhou
From: pengzhou In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: pengzhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 37 + 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/

[PATCH v5 07/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file amdgpu_gmc.c

2021-05-17 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 9 +++-- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 25 + 2 files changed, 24 insertions

[PATCH v5 06/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file nv.c

2021-05-17 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/nv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu

[PATCH v5 05/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file sdma_v5*

2021-05-17 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 78 ++ 1 file changed, 42 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v5 03/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file kfd_v10*

2021-05-17 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 42 +-- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v5 04/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file soc15.c

2021-05-17 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm

[PATCH v5 01/10] drm/amdgpu: Indirect register access for Navi12 sriov

2021-05-17 Thread Peng Ju Zhou
o PSP. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h| 4 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 78 +-- drivers/gpu/drm/amd/amdgpu/gfx_v

[PATCH v5 02/10] drm/amdgpu: Modify GC register access from MMIO to RLCG in file gfx_v10*

2021-05-17 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 32 +- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v4 14/16] drm/amdgpu: Skip the program of GRBM_CAM* in SRIOV

2021-05-14 Thread Peng Ju Zhou
KMD should not the program these registers, so skip them in the SRIOV environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index

[PATCH v4 16/16] drm/amdgpu: Update gfx_v9 rlcg interface

2021-05-14 Thread Peng Ju Zhou
the interface on gfx v10 updated, the gfx v9 and v10 share the same interface, update v9's interface. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 9 + 2 files changed, 6 insertions(+), 5 dele

[PATCH v4 11/16] drm/amdgpu: Modify MMHUB register access from MMIO to RLCG in file mmhub_v2*

2021-05-14 Thread Peng Ju Zhou
From: pengzhou In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: pengzhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 37 + 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/

[PATCH v4 12/16] drm/amdgpu: Use PSP to program IH_RB_CNTL* registers

2021-05-14 Thread Peng Ju Zhou
use psp to program IH_RB_CNTL* if indirect access for ih enabled in SRIOV environment. Signed-off-by: Victor Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 19 +-- drivers/gpu/drm/amd/amdgpu/nv.c| 2 +- 2 files changed, 18 insertions(+), 3

[PATCH v4 13/16] drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV

2021-05-14 Thread Peng Ju Zhou
KMD should not program these registers, the value were defined in the host, so skip them in the SRIOV environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v4 15/16] drm/amdgpu: Refine the error report when flush tlb.

2021-05-14 Thread Peng Ju Zhou
there are 2 hubs to flush in the gmc, to make it easier to debug when hub flush failed, refine the logs. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers

[PATCH v4 10/16] drm/amdgpu: Modify GC register access from MMIO to RLCG in file amdgpu_gmc.c

2021-05-14 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 9 +++-- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 25 + 2 files changed, 24 insertions

[PATCH v4 09/16] drm/amdgpu: Modify GC register access from MMIO to RLCG in file nv.c

2021-05-14 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/nv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu

[PATCH v4 08/16] drm/amdgpu: Modify GC register access from MMIO to RLCG in file sdma_v5*

2021-05-14 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 78 ++ 1 file changed, 42 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v4 02/16] drm/amdgpu: Indirect register access for Navi12 sriov - SOC15 macro

2021-05-14 Thread Peng Ju Zhou
Change RLCG/SOC15 register access interface to triage GC/MMHUB access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 31 --- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v4 05/16] drm/amdgpu: Modify GC register access from MMIO to RLCG in file gfx_v10*

2021-05-14 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 32 +- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v4 06/16] drm/amdgpu: Modify GC register access from MMIO to RLCG in file kfd_v10*

2021-05-14 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 42 +-- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v4 07/16] drm/amdgpu: Modify GC register access from MMIO to RLCG in file soc15.c

2021-05-14 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm

[PATCH v4 04/16] drm/amdgpu: Indirect register access for Navi12 sriov - GFX v10

2021-05-14 Thread Peng Ju Zhou
Change RLCG/SOC15 register access interface to triage GC/MMHUB access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h | 4 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 78 - 2 files changed, 39 insertions(+), 43 deletions

[PATCH v4 01/16] drm/amdgpu: Indirect register access for Navi12 sriov - new internal macro

2021-05-14 Thread Peng Ju Zhou
Change RLCG/SOC15 register access interface to triage GC/MMHUB access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h b/drivers/gpu/drm/amd

[PATCH v4 03/16] drm/amdgpu: Indirect register access for Navi12 sriov - RLC interface

2021-05-14 Thread Peng Ju Zhou
Change RLCG/SOC15 register access interface to triage GC/MMHUB access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/soc15_common.h | 46 ++- 2 files changed, 20 insertions(+), 27 deletions

[PATCH v3 12/13] drm/amdgpu: Refine the error report when flush tlb.

2021-05-08 Thread Peng Ju Zhou
there are 2 hubs to flush in the gmc, to make it easier to debug when hub flush failed, refine the logs. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers

[PATCH v3 13/13] drm/amdgpu: Update gfx_v9 rlcg interface

2021-05-08 Thread Peng Ju Zhou
the interface on gfx v10 updated, the gfx v9 and v10 share the same interface, update v9's interface. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 9 +--

[PATCH v3 09/13] drm/amdgpu: Use PSP to program IH_RB_CNTL* registers

2021-05-08 Thread Peng Ju Zhou
use psp to program IH_RB_CNTL* if indirect access for ih enabled in SRIOV environment. Signed-off-by: Victor Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 19 +-- drivers/gpu/drm/amd/amdgpu/nv.c| 2 +- 2 files changed, 18 insertions(+), 3

[PATCH v3 05/13] drm/amdgpu: Modify GC register access from MMIO to RLCG in file sdma_v5*

2021-05-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 78 ++ 1 file changed, 42 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v3 06/13] drm/amdgpu: Modify GC register access from MMIO to RLCG in file nv.c

2021-05-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/nv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu

[PATCH v3 10/13] drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV

2021-05-08 Thread Peng Ju Zhou
KMD should not program these registers, the value were defined in the host, so skip them in the SRIOV environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v3 11/13] drm/amdgpu: Skip the program of GRBM_CAM* in SRIOV

2021-05-08 Thread Peng Ju Zhou
KMD should not the program these registers, so skip them in the SRIOV environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index

[PATCH v3 08/13] drm/amdgpu: Modify MMHUB register access from MMIO to RLCG in file mmhub_v2*

2021-05-08 Thread Peng Ju Zhou
From: pengzhou In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: pengzhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 37 + 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/

[PATCH v3 07/13] drm/amdgpu: Modify GC register access from MMIO to RLCG in file amdgpu_gmc.c

2021-05-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 9 +++-- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 25 + 2 files changed, 24 insertions

[PATCH v3 01/13] drm/amdgpu: Indirect register access for Navi12 sriov

2021-05-08 Thread Peng Ju Zhou
Change RLCG/SOC15 register access interface to triage GC/MMHUB access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h | 4 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 78

[PATCH v3 04/13] drm/amdgpu: Modify GC register access from MMIO to RLCG in file soc15.c

2021-05-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm

[PATCH v3 02/13] drm/amdgpu: Modify GC register access from MMIO to RLCG in file gfx_v10*

2021-05-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 32 +- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v3 03/13] drm/amdgpu: Modify GC register access from MMIO to RLCG in file kfd_v10*

2021-05-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 42 +-- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v2 12/12] drm/amdgpu: Refine the error report when flush tlb.

2021-04-29 Thread Peng Ju Zhou
there are 2 hubs to flush in the gmc, to make it easier to debug when hub flush failed, refine the logs. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers

[PATCH v2 11/12] drm/amdgpu: Skip the program of GRBM_CAM* in SRIOV

2021-04-29 Thread Peng Ju Zhou
KMD should not the program these registers, so skip them in the SRIOV environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index

[PATCH v2 10/12] drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV

2021-04-29 Thread Peng Ju Zhou
KMD should not program these registers, the value were defined in the host, so skip them in the SRIOV environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v2 09/12] drm/amdgpu: Use PSP to program IH_RB_CNTL* registers

2021-04-29 Thread Peng Ju Zhou
use psp to program IH_RB_CNTL* if indirect access for ih enabled in SRIOV environment. Signed-off-by: Victor Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 19 +-- drivers/gpu/drm/amd/amdgpu/nv.c| 2 +- 2 files changed, 18 insertions(+), 3

[PATCH v2 08/12] drm/amdgpu: Modify MMHUB register access from MMIO to RLCG in file mmhub_v2*

2021-04-29 Thread Peng Ju Zhou
From: pengzhou In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: pengzhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 37 + 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/

[PATCH v2 07/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file amdgpu_gmc.c

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 9 +++-- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 25 + 2 files changed, 24 insertions

[PATCH v2 06/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file nv.c

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/nv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu

[PATCH v2 05/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file sdma_v5*

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 78 ++ 1 file changed, 42 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v2 04/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file soc15.c

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm

[PATCH v2 03/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file kfd_v10*

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 42 +-- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH v2 01/12] drm/amdgpu: Indirect register access for Navi12 sriov

2021-04-29 Thread Peng Ju Zhou
Change RLCG/SOC15 register access interface to triage GC/MMHUB access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h | 4 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 68 -- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 109

[PATCH v2 02/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file gfx_v10*

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 12/12] drm/amdgpu: Refine the error report when flush tlb.

2021-04-29 Thread Peng Ju Zhou
there are 2 hubs to flush in the gmc, to make it easier to debug when hub flush failed, refine the logs. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers

[PATCH 11/12] drm/amdgpu: Skip the program of GRBM_CAM* in SRIOV

2021-04-29 Thread Peng Ju Zhou
KMD should not the program these registers, so skip them in the SRIOV environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index

[PATCH 10/12] drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV

2021-04-29 Thread Peng Ju Zhou
KMD should not program these registers, the value were defined in the host, so skip them in the SRIOV environment. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 09/12] drm/amdgpu: Use PSP to program IH_RB_CNTL* registers

2021-04-29 Thread Peng Ju Zhou
use psp to program IH_RB_CNTL* if indirect access for ih enabled in SRIOV environment. Signed-off-by: Victor Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 19 +-- drivers/gpu/drm/amd/amdgpu/nv.c| 2 +- 2 files changed, 18 insertions(+), 3

[PATCH 08/12] drm/amdgpu: Modify MMHUB register access from MMIO to RLCG in file mmhub_v2*

2021-04-29 Thread Peng Ju Zhou
From: pengzhou In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: pengzhou --- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 37 + 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/

[PATCH 07/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file amdgpu_gmc.c

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 9 +++-- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 25 + 2 files changed, 24 insertions

[PATCH 06/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file nv.c

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/nv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu

[PATCH 05/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file sdma_v5*

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 78 ++ 1 file changed, 42 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 04/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file soc15.c

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm

[PATCH 03/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file kfd_v10*

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 42 +-- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 02/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file gfx_v10*

2021-04-29 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 01/12] drm/amdgpu: Indirect register access for Navi12 sriov

2021-04-29 Thread Peng Ju Zhou
Change RLCG/SOC15 register access interface to triage GC/MMHUB access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h | 4 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 68 -- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 109

[PATCH] drm/amdgpu: Rename the flags to eliminate ambiguity v2

2021-04-28 Thread Peng Ju Zhou
The flags vf_reg_access_* may cause confusion, rename the flags to make it more clear. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu

[PATCH] drm/amdgpu: Rename the flags to to eliminate ambiguity

2021-04-28 Thread Peng Ju Zhou
The flags vf_reg_access_* may cause confusion, rename the flags to make it more clear. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu

[PATCH 3/8] drm/amdgpu: Change GC(SDMA) register access from MMIO to RLCG

2021-04-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 78 ++ 1 file changed, 42 insertions(+), 36 deletions

[PATCH 2/8] drm/amdgpu: Change GC(KFD/GFX) register access from MMIO to RLCG

2021-04-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 38 ++-- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 205

[PATCH 8/8] drm/amdgpu: Use PSP to program IH_RB_CNTL* registers

2021-04-08 Thread Peng Ju Zhou
use psp to program IH_RB_CNTL* if indirect access for ih enabled in SRIOV environment. Signed-off-by: Victor Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 19 +-- drivers/gpu/drm/amd/amdgpu/nv.c| 2 +- 2 files changed, 18 insertions(+), 3

[PATCH 7/8] drm/amdgpu: Change GC(GFX) register access from MMIO to RLCG

2021-04-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions

[PATCH 5/8] drm/amdgpu: Change GC(GMC/GFXHUB/..) register access from MMIO to RLCG

2021-04-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4 +- drivers

[PATCH 6/8] drm/amdgpu: Change GC(GFXHUB) register access from MMIO to RLCG

2021-04-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 36 1 file changed, 18 insertions(+), 18 deletions

[PATCH 4/8] drm/amdgpu: Change GC(GFX/GFXHUB) register access from MMIO to RLCG

2021-04-08 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 38

[PATCH 1/8] drm/amdgpu: change MMHUB register access from MMIO to RLCG

2021-04-08 Thread Peng Ju Zhou
From: pengzhou In SRIOV environment, KMD should access MMHUB registers with RLCG if MMHUB indirect access bit enabled. Change MMHUB register access from MMIO to RLCG. Signed-off-by: pengzhou --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 12 ++-- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 3

[PATCH 7/8] drm/amdgpu: Change GC register access from MMIO to RLCG

2021-04-07 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions

[PATCH 8/8] drm/amdgpu: Use PSP to program IH_RB_CNTL* registers

2021-04-07 Thread Peng Ju Zhou
use psp to program IH_RB_CNTL* if indirect access for ih enabled in SRIOV environment. Signed-off-by: Victor Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 19 +-- drivers/gpu/drm/amd/amdgpu/nv.c| 2 +- 2 files changed, 18 insertions(+), 3

[PATCH 6/8] drm/amdgpu: Change GC register access from MMIO to RLCG

2021-04-07 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 36 1 file changed, 18 insertions(+), 18 deletions

[PATCH 5/8] drm/amdgpu: Change GC register access from MMIO to RLCG

2021-04-07 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4 +- drivers

[PATCH 4/8] drm/amdgpu: Change GC register access from MMIO to RLCG

2021-04-07 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 38

[PATCH 3/8] drm/amdgpu: Change GC(SDMA) register access from MMIO to RLCG

2021-04-07 Thread Peng Ju Zhou
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Change GC register access from MMIO to RLCG. Signed-off-by: Peng Ju Zhou --- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 78 ++ 1 file changed, 42 insertions(+), 36 deletions

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