[AMD Official Use Only - General]
HI Tim
-Original Message-
From: Huang, Tim
Sent: Friday, May 10, 2024 2:37 PM
To: Zhang, Jesse(Jie) ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Zhang, Jesse(Jie) ; Zhang,
Jesse(Jie)
Subject: RE: [PATCH 09/22] drm/amd/p
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: Jesse Zhang
> Sent: Friday, May 10, 2024 10:51 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jesse(Jie) ; Zhang, Jesse(
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: amd-gfx On Behalf Of Jesse
> Zhang
> Sent: Friday, May 10, 2024 10:51 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jess
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: amd-gfx On Behalf Of Jesse
> Zhang
> Sent: Friday, May 10, 2024 10:51 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jes
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: amd-gfx On Behalf Of Jesse
> Zhang
> Sent: Friday, May 10, 2024 10:51 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jess
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: Jesse Zhang
> Sent: Friday, May 10, 2024 10:51 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jesse(Jie) ; Zhang, Jesse(
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: Jesse Zhang
> Sent: Friday, May 10, 2024 10:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jesse(Jie) ; Zhang, Jesse(
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: amd-gfx On Behalf Of Jesse
> Zhang
> Sent: Friday, May 10, 2024 10:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jes
[AMD Official Use Only - General]
Hi Jesse,
> -Original Message-
> From: amd-gfx On Behalf Of Jesse
> Zhang
> Sent: Friday, May 10, 2024 10:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jesse(Jie) ; Zhang, Jesse(Jie)
>
>
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: amd-gfx On Behalf Of Jesse
> Zhang
> Sent: Friday, May 10, 2024 10:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jes
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: amd-gfx On Behalf Of Jesse
> Zhang
> Sent: Friday, May 10, 2024 10:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jes
[AMD Official Use Only - General]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: amd-gfx On Behalf Of Jesse
> Zhang
> Sent: Friday, May 10, 2024 10:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jes
[AMD Official Use Only - General]
Reviewed-by: Tim Huang
> -Original Message-
> From: amd-gfx On Behalf Of Jesse
> Zhang
> Sent: Friday, May 10, 2024 10:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jesse(Jie) ; Zhang,
[AMD Official Use Only - General]
Reviewed-by: Yifan Zhang
Best Regards,
Yifan
-Original Message-
From: amd-gfx On Behalf Of Jesse Zhang
Sent: Friday, May 10, 2024 10:51 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Huang, Tim ; Zhang, Jesse(Jie)
[AMD Official Use Only - General]
Reviewed-by: Yifan Zhang
Best Regards,
Yifan
-Original Message-
From: amd-gfx On Behalf Of Jesse Zhang
Sent: Friday, May 10, 2024 10:51 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Huang, Tim ; Zhang, Jesse(Jie)
;
This patch rectifies mistake in previous commit:
'drm/amdkfd: mark GFX12 system and peer GPU memory mappings as MTYPE_NC'.
Signed-off-by: Sreekant Somasekharan
---
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 3 ++-
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 1 +
2 files changed, 3 insertions(+), 1 de
Remove bo NULL check in amdgpu/gmc_v12_0.c:gmc_v12_0_get_vm_pte() function
to fix smatch warning:
'drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c:518 gmc_v12_0_get_vm_pte()
warn: variable dereferenced before check 'bo' (see line 500)'
Signed-off-by: Sreekant Somasekharan
Suggested-by: Dan Carpenter
---
[AMD Official Use Only - General]
Please add following information into commit message.
Fixes: ca55f459f5ad ("drm/amd/pm: add the fine grain tuning function for
Renoir")
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: amd-gfx On Behalf Of Jesse Zhang
Sent: Frida
On 5/9/2024 16:50, Pratap Nirujogi wrote:
Add the isp driver in amdgpu to support ISP device on the APUs that
supports ISP IP block. ISP hw block is used for camera front-end, pre
and post processing operations.
Signed-off-by: Pratap Nirujogi
Reviewed-by: Mario Limonciello
---
Changes made i
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: amd-gfx On Behalf Of Jesse Zhang
Sent: Friday, May 10, 2024 10:51 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Huang, Tim ; Zhang, Jesse(Jie)
; Z
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: amd-gfx On Behalf Of Jesse Zhang
Sent: Friday, May 10, 2024 10:50 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Huang, Tim ; Zhang, Jesse(Jie)
; Z
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
-Original Message-
From: amd-gfx On Behalf Of Jesse Zhang
Sent: Friday, May 10, 2024 10:50 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Huang, Tim ; Zhang, Jesse(Jie)
; Zhang, Jesse(Jie)
Sub
[Public]
> -Original Message-
> From: Limonciello, Mario
> Sent: Friday, May 10, 2024 3:18 AM
> To: Linux regressions mailing list ; Wentland,
> Harry
> ; Lin, Wayne
> Cc: ly...@redhat.com; imre.d...@intel.com; Leon Weiß bochum.de>; sta...@vger.kernel.org; dri-de...@lists.freedesktop.o
On Thu, 9 May 2024 at 09:00, Alex Deucher wrote:
>
> Hi Dave, Sima,
>
> Fixes for 6.9.
>
> The following changes since commit dd5a440a31fae6e459c0d627162825505361:
>
> Linux 6.9-rc7 (2024-05-05 14:06:01 -0700)
>
> are available in the Git repository at:
>
> https://gitlab.freedesktop.org/a
This greater-than-or-equal-to-zero comparison of an unsigned value is always
true. fpriv->xcp_id >= 0U
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gp
For invalid clk types, return -EINVAL to check the return.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu
For invalid clk types, return -EINVAL to check the return.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/
Dividing expression num_xcc_per_xcp which may be zero has undefined behavior.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
Function hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr) returns a
negative number
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c
b/dri
Filter invalid aca error types before performing a shift operation.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
index
This less-than-zero comparison of an unsigned value is never true. type < 0U
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
Execution cannot reach this statement: case POWER_STATE_TYPE_BALAN.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c
b/drivers/gpu/drm/amd/pm/legacy-dpm/legacy
This less-than-zero comparison of an unsigned value is never true. feature < 0U
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn
The same code is executed when the condition err is true or false,
because the code in the if-then branch and after the if statement is identical
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/g
This code cannot be reached: return sysfs_emit(buf, "UNK)
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index a5f970fec242..f8ed886
The switch governing value clk_type cannot be SMU_GFXCLK and SMU_SCLK.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_
This code cannot be reached: return "UNKNOWN";.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 9a946f0e015c..109f471ff315 100644
-
Set smu work laod mask may fail, so check return.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/
Check for specific indexes that may be invalid values.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_
Set smu work laod mask may fail, so check return.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_p
Set smu work laod mask may fail, so check return.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/
Check for specific indexes that may be invalid values.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/
Check the amdgpu_hive_info *hive that maybe is NULL.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 37820dd03cab..5a648a657dc6 1
check ring allocate success before emit preempt ib
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
index 0b5af1c50461..7
if ras_manager obj null, don't print NBIO err data
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index fe18df10daaa..26e588
check the pointer hive before use.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 77f6fd50002a..00fe3c2d54
On 5/10/2024 9:41 AM, Wang, Yang(Kevin) wrote:
> [AMD Official Use Only - General]
>
> Ok, I miss this patch #2.
>
> And please merge swsmu parts in patch#1 to patch#2. (patch #1 : powerplay,
> patch #2: swsmu)
Thanks, will fix this when push.
Regards,
Ma Jun
>
> Reviewed-by: Yang Wang
>
[AMD Official Use Only - General]
Ok, I miss this patch #2.
And please merge swsmu parts in patch#1 to patch#2. (patch #1 : powerplay,
patch #2: swsmu)
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Ma, Jun
Sent: Friday, May 10, 2024 9:00 AM
To: Wang, Yang(Kevin
On 5/9/2024 9:01 PM, Wang, Yang(Kevin) wrote:
> [AMD Official Use Only - General]
>
> please fix similar issues in other xxx_ppt.c file together? e. g:
> navi10_ppt.c, etc
>
Fix codes for navi10,vega20, etc. are in the patch 2 of this serial.
Regards,
Ma Jun
> Best Regards,
> Kevin
> -
[AMD Official Use Only - General]
Hi Mario / Alex,
Please see inline for below comment, others I addressed and submitted patch v3.
RE: I think this is the wrong place for this isp_ip_block and also it should be
named differently. Maybe it should be named isp_ip_block_v4_1 and then in a
d
On Thu, May 9, 2024 at 6:02 PM David (Ming Qiang) Wu wrote:
>
> Based on the documentation the maximum resolustion should
> be 16384x16384.
>
> Signed-off-by: David (Ming Qiang) Wu
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/soc24.c | 2 +-
> 1 file changed, 1 insertion(+), 1 de
On Thu, May 9, 2024 at 6:03 PM David Wu wrote:
>
> Hi Alex,
>
> Well - the dev_info has 2 "amdgpu"s.
>
> [ 67.227121] amdgpu :43:00.0: amdgpu: JPEG decode is enabled in VM mode
>
> In practice we use "drm" to grep the GPU info for VCN and JPEG support.
> So I believe the DRM_INFO is the best
We are incorrectly passing the first XCC's MQD when
updating CU masks for other XCCs in the partition. Fix
this by passing the MQD for the XCC currently being
updated with CU mask to update_cu_mask function.
Fixes: fc6efed2c728 ("drm/amdkfd: Update CU masking for GFX 9.4.3")
Signed-off-by: Mukul J
Hi Alex,
Well - the dev_info has 2 "amdgpu"s.
[ 67.227121] amdgpu :43:00.0: amdgpu: JPEG decode is enabled
in VM mode
In practice we use "drm" to grep the GPU info for VCN and JPEG support.
So I believe the DRM_INFO is the best and it is used by most of the
amdgpu code with excepti
Add the isp driver in amdgpu to support ISP device on the APUs that
supports ISP IP block. ISP hw block is used for camera front-end, pre
and post processing operations.
Signed-off-by: Pratap Nirujogi
---
Changes made in v3:
- Remove unwanted header files
- Remove suprious lines, duplicate e
ISP hw block is supported in some of the AMD GPU versions, add support
to discover ISP IP in amdgpu_discovery.
Reviewed-by: Mario Limonciello
Signed-off-by: Pratap Nirujogi
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
drivers/gpu/
Enable ISP for ISP V4.1.0 and V4.1.1 in amdgpu_discovery.
Reviewed-by: Mario Limonciello
Signed-off-by: Pratap Nirujogi
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 22 +++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/dri
Add Reviewed-by tag and address review comments on patch-2.
Changes made:
- Add Reviewed-by tag on patch-1 and 3.
- Remove unwanted header files
- Remove suprious lines, duplicate error prints
- Fix multi-line comment style
Pratap Nirujogi (3):
drm/amd/amdgpu: Add ISP support to amdgpu_disc
Based on the documentation the maximum resolustion should
be 16384x16384.
Signed-off-by: David (Ming Qiang) Wu
---
drivers/gpu/drm/amd/amdgpu/soc24.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c
b/drivers/gpu/drm/amd/amdgpu/soc24.c
index
On Thu, May 9, 2024 at 5:31 PM David Wu wrote:
>
> Hi Alex,
>
> Thanks for the suggestion!
> What I am thinking is "DRM_DEV_INFO" should not be the one we want - as it is
> more like a debug message.
>
> [drm:jpeg_v5_0_0_hw_init [amdgpu]] JPEG decode initialized successfully.
>
> instead I prefer
Hi Alex,
Thanks for the suggestion!
What I am thinking is "DRM_DEV_INFO" should not be the one we want - as
it is more like a debug message.
[drm:jpeg_v5_0_0_hw_init [amdgpu]] JPEG decode initialized successfully.
instead I prefer to use this format:
"amdgpu :43:00.0: amdgpu: JPEG deco
On Thu, May 9, 2024 at 4:57 PM David (Ming Qiang) Wu wrote:
>
> amdgpu jpeg kernel message is different than others such as vcn:
> [drm:jpeg_v5_0_0_hw_init [amdgpu]] JPEG decode initialized successfully.
>
> This patch is to make them consistent.
>
> The message after the change is:
> [drm] JP
amdgpu jpeg kernel message is different than others such as vcn:
[drm:jpeg_v5_0_0_hw_init [amdgpu]] JPEG decode initialized successfully.
This patch is to make them consistent.
The message after the change is:
[drm] JPEG decode initialized successfully.
Signed-off-by: David (Ming Qiang) Wu
This patch adds 'ring hang' events to the driver.
This is done by adding a 'reset_ring_hang' bool variable to the
struct 'amdgpu_reset_context' in the amdgpu_reset.h file.
The purpose for this 'reset_ring_hang' variable is whenever a GPU
reset is initiated due to a ring hang, the reset_ring_hang sh
Acked-by: Alex Deucher
On Thu, May 9, 2024 at 2:47 PM David (Ming Qiang) Wu wrote:
>
> We do not directly enable/disable VCN IRQ in vcn 5.0.0.
> And we do not handle the IRQ state as well. So the calls to
> disable IRQ and set state are removed. This effectively gets
> rid of the warining of
>
gpu_id needs to be unique for user space to identify GPUs via KFD
interface. In the current implementation there is a very small
probability of having non unique gpu_ids.
v2: Add check to confirm if gpu_id is unique. If not unique, find one
Changed commit header to reflect the above
v3: Use cr
On suspend, we need to set power gating state to GATE when
VCN5 is busy, otherwise we will get following error on resume:
[drm:amdgpu_ring_test_helper [amdgpu]] *ERROR* ring vcn_unified_0 test failed
(-110)
[drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block
failed -110
amd
On 5/9/2024 14:35, Pratap Nirujogi wrote:
Enable ISP for ISP V4.1.0 and V4.1.1 in amdgpu_discovery.
Signed-off-by: Pratap Nirujogi
Reviewed-by: Mario Limonciello
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 22 +++
1 file changed, 22 insertions(+)
diff --git a/driv
On 5/9/2024 14:35, Pratap Nirujogi wrote:
ISP hw block is supported in some of the AMD GPU versions, add support
to discover ISP IP in amdgpu_discovery.
Signed-off-by: Pratap Nirujogi
Reviewed-by: Mario Limonciello
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/a
On 5/9/2024 14:35, Pratap Nirujogi wrote:
Add the isp driver in amdgpu to support ISP device on the APUs that
supports ISP IP block. ISP hw block is used for camera front-end, pre
and post processing operations.
Signed-off-by: Pratap Nirujogi
Change-Id: I67ef206e5eca1fe74e495c3262746be495e17d09
[AMD Official Use Only - General]
Thanks Mario for the inputs and clarifications on the offline chat.
I submitted a fresh set of 3 patches addressing the comments, adding the
cover-letter and brief change log in the cutlist in patch-2.
Hope this is in the right format. Incase this needs to be f
Enable ISP for ISP V4.1.0 and V4.1.1 in amdgpu_discovery.
Signed-off-by: Pratap Nirujogi
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 22 +++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_d
ISP hw block is supported in some of the AMD GPU versions, add support
to discover ISP IP in amdgpu_discovery.
Signed-off-by: Pratap Nirujogi
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
drivers/gpu/drm/amd/include/amd_shared.h
Add the isp driver in amdgpu to support ISP device on the APUs that
supports ISP IP block. ISP hw block is used for camera front-end, pre
and post processing operations.
Pratap Nirujogi (3):
drm/amd/amdgpu: Add ISP support to amdgpu_discovery
drm/amd/amdgpu: Add ISP driver support
drm/amd/am
Add the isp driver in amdgpu to support ISP device on the APUs that
supports ISP IP block. ISP hw block is used for camera front-end, pre
and post processing operations.
Signed-off-by: Pratap Nirujogi
Change-Id: I67ef206e5eca1fe74e495c3262746be495e17d09
---
Changes in v2:
- Remove adding IORESOU
On 5/9/2024 07:43, Linux regression tracking (Thorsten Leemhuis) wrote:
On 18.04.24 21:43, Harry Wentland wrote:
On 2024-03-07 01:29, Wayne Lin wrote:
[Why]
Commit:
- commit 5aa1dfcdf0a4 ("drm/mst: Refactor the flow for payload
allocation/removement")
accidently overwrite the commit
- commit 5
We do not directly enable/disable VCN IRQ in vcn 5.0.0.
And we do not handle the IRQ state as well. So the calls to
disable IRQ and set state are removed. This effectively gets
rid of the warining of
"WARN_ON(!amdgpu_irq_enabled(adev, src, type))"
in amdgpu_irq_put().
Signed-off-by: David (M
On Thu, May 9, 2024 at 4:58 AM oushixiong wrote:
>
> From: Shixiong Ou
>
> In some causes, HPD signals will jitter when plugging in
> or unplugging HDMI.
>
> Rescheduling the hotplug work for a second when EDID may still be
> readable but HDP is disconnected, and fixes this issue.
>
> Signed-off-
[AMD Official Use Only - General]
Hi Alex,
Please see inline comments.
RE: You should replace 162 with whatever the src id you need for your IP is.
162 was the src id for ACP. I think it's something else for ISP.
Also, if you need both the client id and the src id, you should update
am
[AMD Official Use Only - General]
Thanks, I'll take a look.
In general make sure that you prefix new versions with "PATCH v2", "PATCH v3"
etc
and include a changelog below the cutlist or in the cover letter.
There is a --subject-prefix argument for git send-email you can use.
It's okay this ti
[AMD Official Use Only - General]
Hi Mario,
I addressed the comments, submitted the updated patchset, please review and let
us know your comments.
Thanks,
Pratap
-Original Message-
From: Limonciello, Mario
Sent: Thursday, May 9, 2024 10:15 AM
To: Nirujogi, Pratap ; amd-gfx@lists.freed
Add the isp driver in amdgpu to support ISP device on the APUs that
supports ISP IP block. ISP hw block is used for camera front-end, pre
and post processing operations.
Signed-off-by: Pratap Nirujogi
Change-Id: I67ef206e5eca1fe74e495c3262746be495e17d09
---
drivers/gpu/drm/amd/amdgpu/Makefile
On Thu, May 9, 2024 at 8:02 AM Heiner Kallweit wrote:
>
> Support for I2C_CLASS_SPD is currently being removed from the kernel.
> Only remaining step is to remove the definition of I2C_CLASS_SPD.
> Setting I2C_CLASS_SPD in a driver is a no-op meanwhile, so remove it
> here.
>
> Signed-off-by: He
OLED panels don't support the ABM, they shouldn't offer the
panel_power_savings attribute to the user. Check whether aux BL
control support was enabled to decide whether to offer it.
Reported-by: Gergo Koteles
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3359
Signed-off-by: Mario Limon
On Wed, May 8, 2024 at 11:17 AM Pratap Nirujogi wrote:
>
> Add the isp driver in amdgpu to support ISP device on the APUs that
> supports ISP IP block. ISP hw block is used for camera front-end, pre
> and post processing operations.
>
> Signed-off-by: Pratap Nirujogi
> ---
> drivers/gpu/drm/amd/
On Wed, May 8, 2024 at 9:52 PM shaoyunl wrote:
>
> This reverts commit 9606c08e178f953d22e50b05c64b4b1a48051f3e.
>
> Signed-off-by: shaoyunl
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/mes_v12_0.c| 14 ++
> drivers/gpu/drm/amd/include/mes_v12_api_def.h | 3 +
On 5/8/2024 09:50, Pratap Nirujogi wrote:
Add the isp driver in amdgpu to support ISP device on the APUs that
supports ISP IP block. ISP hw block is used for camera front-end, pre
and post processing operations.
Signed-off-by: Pratap Nirujogi
---
drivers/gpu/drm/amd/amdgpu/Makefile |
On 18.04.24 21:43, Harry Wentland wrote:
> On 2024-03-07 01:29, Wayne Lin wrote:
>> [Why]
>> Commit:
>> - commit 5aa1dfcdf0a4 ("drm/mst: Refactor the flow for payload
>> allocation/removement")
>> accidently overwrite the commit
>> - commit 54d217406afe ("drm: use mgr->dev in drm_dbg_kms in
>> dr
On 08/05/2024 20:08, Friedrich Vock wrote:
On 08.05.24 20:09, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
The logic assumed any migration attempt worked and therefore would over-
account the amount of data migrated during buffer re-validation. As a
consequence client can be unfairly penalised
Support for I2C_CLASS_SPD is currently being removed from the kernel.
Only remaining step is to remove the definition of I2C_CLASS_SPD.
Setting I2C_CLASS_SPD in a driver is a no-op meanwhile, so remove it
here.
Signed-off-by: Heiner Kallweit
---
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_p
[AMD Official Use Only - General]
please fix similar issues in other xxx_ppt.c file together? e. g: navi10_ppt.c,
etc
Best Regards,
Kevin
-Original Message-
From: Ma, Jun
Sent: Thursday, May 9, 2024 5:37 PM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth ; Deucher, Alexander
; Wang
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Ma, Jun
Sent: Thursday, May 9, 2024 5:37 PM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth ; Deucher, Alexander
; Wang, Yang(Kevin) ;
Koenig, Christian ; Ma, Jun
Subject: [PATC
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Lazar, Lijo
Sent: Thursday, May 9, 2024 4:59 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Wang, Yang(Kevin)
Subject: [PATCH] drm/amd/pm: Fix aldebar
[AMD Official Use Only - General]
Reviewed-by: Asad Kamal
Thanks & Regards
Asad
-Original Message-
From: amd-gfx On Behalf Of Lijo Lazar
Sent: Thursday, May 9, 2024 2:29 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Wang, Yang(Kevin)
Subject: [PATCH]
On 08/05/2024 19:09, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Last few days I was looking at the situation with VRAM over subscription, what
happens versus what perhaps should happen. Browsing through the driver and
running some simple experiments.
I ended up with this patch series which,
Add gfx queue register for all instances in ip dump
for gfx10.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 83 +
2 files changed, 84 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu
add prints before and after during ip registers
dump. It avoids user to think of system being
stuck/hung as register dump takes time after a
gpu hang.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/
add support to dump registers of all instances of
cp registers in gfx10
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 117 +++-
2 files changed, 114 insertions(+), 4 deletions(-)
diff --git a/driver
Update the memory pointer from ip_dump to ipdump_core
to make it specific to core registers and rest other
registers to be dumped in their respective memories.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 14 +++---
*** BLURB HERE ***
Sunil Khatri (4):
drm/amdgpu: update the ip_dump to ipdump_core
drm/amdgpu: Add support to dump gfx10 cp registers
drm/amdgpu: add support to dump gfx10 queue registers
drm/amdgpu: add prints while ip registr dump
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +
dri
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